| Correctness issues: |
| |
| - some eflags manipulation incorrectly reset the bit 0x2. |
| - rework eflags optimization (will be a consequence of TCG port) |
| - SVM: rework the implementation: simplify code, move most intercept |
| tests as dynamic, correct segment access, verify exception safety, |
| cpu save/restore, SMM save/restore. |
| - x86_64: fxsave/fxrestore intel/amd differences |
| - x86_64: lcall/ljmp intel/amd differences ? |
| - x86_64: cmpxchgl intel/amd differences ? |
| - x86_64: cmovl intel/amd differences ? |
| - cmpxchg16b + cmpxchg8b cpuid test |
| - x86: monitor invalid |
| - better code fetch (different exception handling + CS.limit support) |
| - user/kernel PUSHL/POPL in helper.c |
| - add missing cpuid tests |
| - return UD exception if LOCK prefix incorrectly used |
| - test ldt limit < 7 ? |
| - fix some 16 bit sp push/pop overflow (pusha/popa, lcall lret) |
| - full support of segment limit/rights |
| - full x87 exception support |
| - improve x87 bit exactness (use bochs code ?) |
| - DRx register support |
| - CR0.AC emulation |
| - SSE alignment checks |
| - fix SSE min/max with nans |
| |
| Optimizations/Features: |
| |
| - finish TCG port |
| - add SVM nested paging support |
| - add VMX support |
| - add AVX support |
| - add SSE5 support |
| - faster EFLAGS update: consider SZAP, C, O can be updated separately |
| with a bit field in CC_OP and more state variables. |
| - evaluate x87 stack pointer statically |
| - find a way to avoid translating several time the same TB if CR0.TS |
| is set or not. |
| - move kqemu support outside target-i386. |
