| /* Configuration for the Xtensa architecture for GDB, the GNU debugger. | |
| Copyright (c) 2003-2020 Tensilica Inc. | |
| Permission is hereby granted, free of charge, to any person obtaining | |
| a copy of this software and associated documentation files (the | |
| "Software"), to deal in the Software without restriction, including | |
| without limitation the rights to use, copy, modify, merge, publish, | |
| distribute, sublicense, and/or sell copies of the Software, and to | |
| permit persons to whom the Software is furnished to do so, subject to | |
| the following conditions: | |
| The above copyright notice and this permission notice shall be included | |
| in all copies or substantial portions of the Software. | |
| THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | |
| EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF | |
| MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. | |
| IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY | |
| CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, | |
| TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE | |
| SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. */ | |
| XTREG( 0, 0,32, 4, 4,0x0020,0x0006,-2, 9,0x2100,pc, 0,0,0,0,0,0) | |
| XTREG( 1, 4,32, 4, 4,0x0100,0x0006,-2, 1,0x0002,ar0, 0,0,0,0,0,0) | |
| XTREG( 2, 8,32, 4, 4,0x0101,0x0006,-2, 1,0x0002,ar1, 0,0,0,0,0,0) | |
| XTREG( 3, 12,32, 4, 4,0x0102,0x0006,-2, 1,0x0002,ar2, 0,0,0,0,0,0) | |
| XTREG( 4, 16,32, 4, 4,0x0103,0x0006,-2, 1,0x0002,ar3, 0,0,0,0,0,0) | |
| XTREG( 5, 20,32, 4, 4,0x0104,0x0006,-2, 1,0x0002,ar4, 0,0,0,0,0,0) | |
| XTREG( 6, 24,32, 4, 4,0x0105,0x0006,-2, 1,0x0002,ar5, 0,0,0,0,0,0) | |
| XTREG( 7, 28,32, 4, 4,0x0106,0x0006,-2, 1,0x0002,ar6, 0,0,0,0,0,0) | |
| XTREG( 8, 32,32, 4, 4,0x0107,0x0006,-2, 1,0x0002,ar7, 0,0,0,0,0,0) | |
| XTREG( 9, 36,32, 4, 4,0x0108,0x0006,-2, 1,0x0002,ar8, 0,0,0,0,0,0) | |
| XTREG( 10, 40,32, 4, 4,0x0109,0x0006,-2, 1,0x0002,ar9, 0,0,0,0,0,0) | |
| XTREG( 11, 44,32, 4, 4,0x010a,0x0006,-2, 1,0x0002,ar10, 0,0,0,0,0,0) | |
| XTREG( 12, 48,32, 4, 4,0x010b,0x0006,-2, 1,0x0002,ar11, 0,0,0,0,0,0) | |
| XTREG( 13, 52,32, 4, 4,0x010c,0x0006,-2, 1,0x0002,ar12, 0,0,0,0,0,0) | |
| XTREG( 14, 56,32, 4, 4,0x010d,0x0006,-2, 1,0x0002,ar13, 0,0,0,0,0,0) | |
| XTREG( 15, 60,32, 4, 4,0x010e,0x0006,-2, 1,0x0002,ar14, 0,0,0,0,0,0) | |
| XTREG( 16, 64,32, 4, 4,0x010f,0x0006,-2, 1,0x0002,ar15, 0,0,0,0,0,0) | |
| XTREG( 17, 68,32, 4, 4,0x0110,0x0006,-2, 1,0x0002,ar16, 0,0,0,0,0,0) | |
| XTREG( 18, 72,32, 4, 4,0x0111,0x0006,-2, 1,0x0002,ar17, 0,0,0,0,0,0) | |
| XTREG( 19, 76,32, 4, 4,0x0112,0x0006,-2, 1,0x0002,ar18, 0,0,0,0,0,0) | |
| XTREG( 20, 80,32, 4, 4,0x0113,0x0006,-2, 1,0x0002,ar19, 0,0,0,0,0,0) | |
| XTREG( 21, 84,32, 4, 4,0x0114,0x0006,-2, 1,0x0002,ar20, 0,0,0,0,0,0) | |
| XTREG( 22, 88,32, 4, 4,0x0115,0x0006,-2, 1,0x0002,ar21, 0,0,0,0,0,0) | |
| XTREG( 23, 92,32, 4, 4,0x0116,0x0006,-2, 1,0x0002,ar22, 0,0,0,0,0,0) | |
| XTREG( 24, 96,32, 4, 4,0x0117,0x0006,-2, 1,0x0002,ar23, 0,0,0,0,0,0) | |
| XTREG( 25,100,32, 4, 4,0x0118,0x0006,-2, 1,0x0002,ar24, 0,0,0,0,0,0) | |
| XTREG( 26,104,32, 4, 4,0x0119,0x0006,-2, 1,0x0002,ar25, 0,0,0,0,0,0) | |
| XTREG( 27,108,32, 4, 4,0x011a,0x0006,-2, 1,0x0002,ar26, 0,0,0,0,0,0) | |
| XTREG( 28,112,32, 4, 4,0x011b,0x0006,-2, 1,0x0002,ar27, 0,0,0,0,0,0) | |
| XTREG( 29,116,32, 4, 4,0x011c,0x0006,-2, 1,0x0002,ar28, 0,0,0,0,0,0) | |
| XTREG( 30,120,32, 4, 4,0x011d,0x0006,-2, 1,0x0002,ar29, 0,0,0,0,0,0) | |
| XTREG( 31,124,32, 4, 4,0x011e,0x0006,-2, 1,0x0002,ar30, 0,0,0,0,0,0) | |
| XTREG( 32,128,32, 4, 4,0x011f,0x0006,-2, 1,0x0002,ar31, 0,0,0,0,0,0) | |
| XTREG( 33,132,32, 4, 4,0x0200,0x0006,-2, 2,0x1100,lbeg, 0,0,0,0,0,0) | |
| XTREG( 34,136,32, 4, 4,0x0201,0x0006,-2, 2,0x1100,lend, 0,0,0,0,0,0) | |
| XTREG( 35,140,32, 4, 4,0x0202,0x0006,-2, 2,0x1100,lcount, 0,0,0,0,0,0) | |
| XTREG( 36,144, 6, 4, 4,0x0203,0x0006,-2, 2,0x1100,sar, 0,0,0,0,0,0) | |
| XTREG( 37,148, 3, 4, 4,0x0248,0x0006,-2, 2,0x1002,windowbase, 0,0,0,0,0,0) | |
| XTREG( 38,152, 8, 4, 4,0x0249,0x0006,-2, 2,0x1002,windowstart, 0,0,0,0,0,0) | |
| XTREG( 39,156,32, 4, 4,0x02b0,0x0002,-2, 2,0x1000,configid0, 0,0,0,0,0,0) | |
| XTREG( 40,160,32, 4, 4,0x02d0,0x0002,-2, 2,0x1000,configid1, 0,0,0,0,0,0) | |
| XTREG( 41,164,19, 4, 4,0x02e6,0x0006,-2, 2,0x1100,ps, 0,0,0,0,0,0) | |
| XTREG( 42,168,32, 4, 4,0x03e7,0x0006,-2, 3,0x0110,threadptr, 0,0,0,0,0,0) | |
| XTREG( 43,172,16, 4, 4,0x0204,0x0006,-1, 2,0x1100,br, 0,0,0,0,0,0) | |
| XTREG( 44,176,32, 4, 4,0x020c,0x0006,-1, 2,0x1100,scompare1, 0,0,0,0,0,0) | |
| XTREG( 45,180,32, 4, 4,0x0210,0x0006,-1, 2,0x1100,acclo, 0,0,0,0,0,0) | |
| XTREG( 46,184, 8, 4, 4,0x0211,0x0006,-1, 2,0x1100,acchi, 0,0,0,0,0,0) | |
| XTREG( 47,188,32, 4, 4,0x0220,0x0006,-1, 2,0x1100,m0, 0,0,0,0,0,0) | |
| XTREG( 48,192,32, 4, 4,0x0221,0x0006,-1, 2,0x1100,m1, 0,0,0,0,0,0) | |
| XTREG( 49,196,32, 4, 4,0x0222,0x0006,-1, 2,0x1100,m2, 0,0,0,0,0,0) | |
| XTREG( 50,200,32, 4, 4,0x0223,0x0006,-1, 2,0x1100,m3, 0,0,0,0,0,0) | |
| XTREG( 51,204,32, 4, 4,0x03e6,0x000e,-1, 3,0x0110,expstate, 0,0,0,0,0,0) | |
| XTREG( 52,208,64, 8, 8,0x0030,0x0006, 0, 4,0x0401,f0, | |
| "03:03:54:00","03:03:14:00",0,0,0,0) | |
| XTREG( 53,216,64, 8, 8,0x0031,0x0006, 0, 4,0x0401,f1, | |
| "03:13:54:00","03:13:14:00",0,0,0,0) | |
| XTREG( 54,224,64, 8, 8,0x0032,0x0006, 0, 4,0x0401,f2, | |
| "03:23:54:00","03:23:14:00",0,0,0,0) | |
| XTREG( 55,232,64, 8, 8,0x0033,0x0006, 0, 4,0x0401,f3, | |
| "03:33:54:00","03:33:14:00",0,0,0,0) | |
| XTREG( 56,240,64, 8, 8,0x0034,0x0006, 0, 4,0x0401,f4, | |
| "03:43:54:00","03:43:14:00",0,0,0,0) | |
| XTREG( 57,248,64, 8, 8,0x0035,0x0006, 0, 4,0x0401,f5, | |
| "03:53:54:00","03:53:14:00",0,0,0,0) | |
| XTREG( 58,256,64, 8, 8,0x0036,0x0006, 0, 4,0x0401,f6, | |
| "03:63:54:00","03:63:14:00",0,0,0,0) | |
| XTREG( 59,264,64, 8, 8,0x0037,0x0006, 0, 4,0x0401,f7, | |
| "03:73:54:00","03:73:14:00",0,0,0,0) | |
| XTREG( 60,272,64, 8, 8,0x0038,0x0006, 0, 4,0x0401,f8, | |
| "03:83:54:00","03:83:14:00",0,0,0,0) | |
| XTREG( 61,280,64, 8, 8,0x0039,0x0006, 0, 4,0x0401,f9, | |
| "03:93:54:00","03:93:14:00",0,0,0,0) | |
| XTREG( 62,288,64, 8, 8,0x003a,0x0006, 0, 4,0x0401,f10, | |
| "03:a3:54:00","03:a3:14:00",0,0,0,0) | |
| XTREG( 63,296,64, 8, 8,0x003b,0x0006, 0, 4,0x0401,f11, | |
| "03:b3:54:00","03:b3:14:00",0,0,0,0) | |
| XTREG( 64,304,64, 8, 8,0x003c,0x0006, 0, 4,0x0401,f12, | |
| "03:c3:54:00","03:c3:14:00",0,0,0,0) | |
| XTREG( 65,312,64, 8, 8,0x003d,0x0006, 0, 4,0x0401,f13, | |
| "03:d3:54:00","03:d3:14:00",0,0,0,0) | |
| XTREG( 66,320,64, 8, 8,0x003e,0x0006, 0, 4,0x0401,f14, | |
| "03:e3:54:00","03:e3:14:00",0,0,0,0) | |
| XTREG( 67,328,64, 8, 8,0x003f,0x0006, 0, 4,0x0401,f15, | |
| "03:f3:54:00","03:f3:14:00",0,0,0,0) | |
| XTREG( 68,336,32, 4, 4,0x03e8,0x0006, 0, 3,0x0100,fcr, 0,0,0,0,0,0) | |
| XTREG( 69,340,32, 4, 4,0x03e9,0x0006, 0, 3,0x0100,fsr, 0,0,0,0,0,0) | |
| XTREG( 70,344,32, 4, 4,0x0253,0x0007,-2, 2,0x1000,ptevaddr, 0,0,0,0,0,0) | |
| XTREG( 71,348,32, 4, 4,0x0259,0x000d,-2, 2,0x1000,mmid, 0,0,0,0,0,0) | |
| XTREG( 72,352,32, 4, 4,0x025a,0x0007,-2, 2,0x1000,rasid, 0,0,0,0,0,0) | |
| XTREG( 73,356,25, 4, 4,0x025b,0x0007,-2, 2,0x1000,itlbcfg, 0,0,0,0,0,0) | |
| XTREG( 74,360,25, 4, 4,0x025c,0x0007,-2, 2,0x1000,dtlbcfg, 0,0,0,0,0,0) | |
| XTREG( 75,364,16, 4, 4,0x025f,0x0007,-2, 2,0x1000,eraccess, 0,0,0,0,0,0) | |
| XTREG( 76,368, 2, 4, 4,0x0260,0x0007,-2, 2,0x1000,ibreakenable,0,0,0,0,0,0) | |
| XTREG( 77,372, 6, 4, 4,0x0263,0x0007,-2, 2,0x1000,atomctl, 0,0,0,0,0,0) | |
| XTREG( 78,376,32, 4, 4,0x0268,0x0007,-2, 2,0x1000,ddr, 0,0,0,0,0,0) | |
| XTREG( 79,380,32, 4, 4,0x0280,0x0007,-2, 2,0x1000,ibreaka0, 0,0,0,0,0,0) | |
| XTREG( 80,384,32, 4, 4,0x0281,0x0007,-2, 2,0x1000,ibreaka1, 0,0,0,0,0,0) | |
| XTREG( 81,388,32, 4, 4,0x0290,0x0007,-2, 2,0x1000,dbreaka0, 0,0,0,0,0,0) | |
| XTREG( 82,392,32, 4, 4,0x0291,0x0007,-2, 2,0x1000,dbreaka1, 0,0,0,0,0,0) | |
| XTREG( 83,396,32, 4, 4,0x02a0,0x0007,-2, 2,0x1000,dbreakc0, 0,0,0,0,0,0) | |
| XTREG( 84,400,32, 4, 4,0x02a1,0x0007,-2, 2,0x1000,dbreakc1, 0,0,0,0,0,0) | |
| XTREG( 85,404,32, 4, 4,0x02b1,0x0007,-2, 2,0x1000,epc1, 0,0,0,0,0,0) | |
| XTREG( 86,408,32, 4, 4,0x02b2,0x0007,-2, 2,0x1000,epc2, 0,0,0,0,0,0) | |
| XTREG( 87,412,32, 4, 4,0x02b3,0x0007,-2, 2,0x1000,epc3, 0,0,0,0,0,0) | |
| XTREG( 88,416,32, 4, 4,0x02b4,0x0007,-2, 2,0x1000,epc4, 0,0,0,0,0,0) | |
| XTREG( 89,420,32, 4, 4,0x02b5,0x0007,-2, 2,0x1000,epc5, 0,0,0,0,0,0) | |
| XTREG( 90,424,32, 4, 4,0x02b6,0x0007,-2, 2,0x1000,epc6, 0,0,0,0,0,0) | |
| XTREG( 91,428,32, 4, 4,0x02b7,0x0007,-2, 2,0x1000,epc7, 0,0,0,0,0,0) | |
| XTREG( 92,432,32, 4, 4,0x02c0,0x0007,-2, 2,0x1000,depc, 0,0,0,0,0,0) | |
| XTREG( 93,436,19, 4, 4,0x02c2,0x0007,-2, 2,0x1000,eps2, 0,0,0,0,0,0) | |
| XTREG( 94,440,19, 4, 4,0x02c3,0x0007,-2, 2,0x1000,eps3, 0,0,0,0,0,0) | |
| XTREG( 95,444,19, 4, 4,0x02c4,0x0007,-2, 2,0x1000,eps4, 0,0,0,0,0,0) | |
| XTREG( 96,448,19, 4, 4,0x02c5,0x0007,-2, 2,0x1000,eps5, 0,0,0,0,0,0) | |
| XTREG( 97,452,19, 4, 4,0x02c6,0x0007,-2, 2,0x1000,eps6, 0,0,0,0,0,0) | |
| XTREG( 98,456,19, 4, 4,0x02c7,0x0007,-2, 2,0x1000,eps7, 0,0,0,0,0,0) | |
| XTREG( 99,460,32, 4, 4,0x02d1,0x0007,-2, 2,0x1000,excsave1, 0,0,0,0,0,0) | |
| XTREG(100,464,32, 4, 4,0x02d2,0x0007,-2, 2,0x1000,excsave2, 0,0,0,0,0,0) | |
| XTREG(101,468,32, 4, 4,0x02d3,0x0007,-2, 2,0x1000,excsave3, 0,0,0,0,0,0) | |
| XTREG(102,472,32, 4, 4,0x02d4,0x0007,-2, 2,0x1000,excsave4, 0,0,0,0,0,0) | |
| XTREG(103,476,32, 4, 4,0x02d5,0x0007,-2, 2,0x1000,excsave5, 0,0,0,0,0,0) | |
| XTREG(104,480,32, 4, 4,0x02d6,0x0007,-2, 2,0x1000,excsave6, 0,0,0,0,0,0) | |
| XTREG(105,484,32, 4, 4,0x02d7,0x0007,-2, 2,0x1000,excsave7, 0,0,0,0,0,0) | |
| XTREG(106,488, 8, 4, 4,0x02e0,0x0007,-2, 2,0x1000,cpenable, 0,0,0,0,0,0) | |
| XTREG(107,492,22, 4, 4,0x02e2,0x000b,-2, 2,0x1000,interrupt, 0,0,0,0,0,0) | |
| XTREG(108,496,22, 4, 4,0x02e2,0x000d,-2, 2,0x1000,intset, 0,0,0,0,0,0) | |
| XTREG(109,500,22, 4, 4,0x02e3,0x000d,-2, 2,0x1000,intclear, 0,0,0,0,0,0) | |
| XTREG(110,504,22, 4, 4,0x02e4,0x0007,-2, 2,0x1000,intenable, 0,0,0,0,0,0) | |
| XTREG(111,508,32, 4, 4,0x02e7,0x0007,-2, 2,0x1000,vecbase, 0,0,0,0,0,0) | |
| XTREG(112,512, 6, 4, 4,0x02e8,0x0007,-2, 2,0x1000,exccause, 0,0,0,0,0,0) | |
| XTREG(113,516,12, 4, 4,0x02e9,0x0003,-2, 2,0x1000,debugcause, 0,0,0,0,0,0) | |
| XTREG(114,520,32, 4, 4,0x02ea,0x000f,-2, 2,0x1000,ccount, 0,0,0,0,0,0) | |
| XTREG(115,524,32, 4, 4,0x02eb,0x0003,-2, 2,0x1000,prid, 0,0,0,0,0,0) | |
| XTREG(116,528,32, 4, 4,0x02ec,0x000f,-2, 2,0x1000,icount, 0,0,0,0,0,0) | |
| XTREG(117,532, 4, 4, 4,0x02ed,0x0007,-2, 2,0x1000,icountlevel, 0,0,0,0,0,0) | |
| XTREG(118,536,32, 4, 4,0x02ee,0x0007,-2, 2,0x1000,excvaddr, 0,0,0,0,0,0) | |
| XTREG(119,540,32, 4, 4,0x02f0,0x000f,-2, 2,0x1000,ccompare0, 0,0,0,0,0,0) | |
| XTREG(120,544,32, 4, 4,0x02f1,0x000f,-2, 2,0x1000,ccompare1, 0,0,0,0,0,0) | |
| XTREG(121,548,32, 4, 4,0x02f2,0x000f,-2, 2,0x1000,ccompare2, 0,0,0,0,0,0) | |
| XTREG(122,552,32, 4, 4,0x02f4,0x0007,-2, 2,0x1000,misc0, 0,0,0,0,0,0) | |
| XTREG(123,556,32, 4, 4,0x02f5,0x0007,-2, 2,0x1000,misc1, 0,0,0,0,0,0) | |
| XTREG(124,560,32, 4, 4,0x0000,0x0006,-2, 8,0x2100,a0, 0,0,0,0,0,0) | |
| XTREG(125,564,32, 4, 4,0x0001,0x0006,-2, 8,0x2100,a1, 0,0,0,0,0,0) | |
| XTREG(126,568,32, 4, 4,0x0002,0x0006,-2, 8,0x2100,a2, 0,0,0,0,0,0) | |
| XTREG(127,572,32, 4, 4,0x0003,0x0006,-2, 8,0x2100,a3, 0,0,0,0,0,0) | |
| XTREG(128,576,32, 4, 4,0x0004,0x0006,-2, 8,0x2100,a4, 0,0,0,0,0,0) | |
| XTREG(129,580,32, 4, 4,0x0005,0x0006,-2, 8,0x2100,a5, 0,0,0,0,0,0) | |
| XTREG(130,584,32, 4, 4,0x0006,0x0006,-2, 8,0x2100,a6, 0,0,0,0,0,0) | |
| XTREG(131,588,32, 4, 4,0x0007,0x0006,-2, 8,0x2100,a7, 0,0,0,0,0,0) | |
| XTREG(132,592,32, 4, 4,0x0008,0x0006,-2, 8,0x2100,a8, 0,0,0,0,0,0) | |
| XTREG(133,596,32, 4, 4,0x0009,0x0006,-2, 8,0x2100,a9, 0,0,0,0,0,0) | |
| XTREG(134,600,32, 4, 4,0x000a,0x0006,-2, 8,0x2100,a10, 0,0,0,0,0,0) | |
| XTREG(135,604,32, 4, 4,0x000b,0x0006,-2, 8,0x2100,a11, 0,0,0,0,0,0) | |
| XTREG(136,608,32, 4, 4,0x000c,0x0006,-2, 8,0x2100,a12, 0,0,0,0,0,0) | |
| XTREG(137,612,32, 4, 4,0x000d,0x0006,-2, 8,0x2100,a13, 0,0,0,0,0,0) | |
| XTREG(138,616,32, 4, 4,0x000e,0x0006,-2, 8,0x2100,a14, 0,0,0,0,0,0) | |
| XTREG(139,620,32, 4, 4,0x000f,0x0006,-2, 8,0x2100,a15, 0,0,0,0,0,0) | |
| XTREG(140,624, 1, 1, 1,0x0010,0x0006,-2, 6,0x1010,b0, | |
| 0,0,&xtensa_mask0,0,0,0) | |
| XTREG(141,625, 1, 1, 1,0x0011,0x0006,-2, 6,0x1010,b1, | |
| 0,0,&xtensa_mask1,0,0,0) | |
| XTREG(142,626, 1, 1, 1,0x0012,0x0006,-2, 6,0x1010,b2, | |
| 0,0,&xtensa_mask2,0,0,0) | |
| XTREG(143,627, 1, 1, 1,0x0013,0x0006,-2, 6,0x1010,b3, | |
| 0,0,&xtensa_mask3,0,0,0) | |
| XTREG(144,628, 1, 1, 1,0x0014,0x0006,-2, 6,0x1010,b4, | |
| 0,0,&xtensa_mask4,0,0,0) | |
| XTREG(145,629, 1, 1, 1,0x0015,0x0006,-2, 6,0x1010,b5, | |
| 0,0,&xtensa_mask5,0,0,0) | |
| XTREG(146,630, 1, 1, 1,0x0016,0x0006,-2, 6,0x1010,b6, | |
| 0,0,&xtensa_mask6,0,0,0) | |
| XTREG(147,631, 1, 1, 1,0x0017,0x0006,-2, 6,0x1010,b7, | |
| 0,0,&xtensa_mask7,0,0,0) | |
| XTREG(148,632, 1, 1, 1,0x0018,0x0006,-2, 6,0x1010,b8, | |
| 0,0,&xtensa_mask8,0,0,0) | |
| XTREG(149,633, 1, 1, 1,0x0019,0x0006,-2, 6,0x1010,b9, | |
| 0,0,&xtensa_mask9,0,0,0) | |
| XTREG(150,634, 1, 1, 1,0x001a,0x0006,-2, 6,0x1010,b10, | |
| 0,0,&xtensa_mask10,0,0,0) | |
| XTREG(151,635, 1, 1, 1,0x001b,0x0006,-2, 6,0x1010,b11, | |
| 0,0,&xtensa_mask11,0,0,0) | |
| XTREG(152,636, 1, 1, 1,0x001c,0x0006,-2, 6,0x1010,b12, | |
| 0,0,&xtensa_mask12,0,0,0) | |
| XTREG(153,637, 1, 1, 1,0x001d,0x0006,-2, 6,0x1010,b13, | |
| 0,0,&xtensa_mask13,0,0,0) | |
| XTREG(154,638, 1, 1, 1,0x001e,0x0006,-2, 6,0x1010,b14, | |
| 0,0,&xtensa_mask14,0,0,0) | |
| XTREG(155,639, 1, 1, 1,0x001f,0x0006,-2, 6,0x1010,b15, | |
| 0,0,&xtensa_mask15,0,0,0) | |
| XTREG(156,640, 4, 4, 4,0x2008,0x0006,-2, 6,0x1010,psintlevel, | |
| 0,0,&xtensa_mask16,0,0,0) | |
| XTREG(157,644, 1, 4, 4,0x2009,0x0006,-2, 6,0x1010,psum, | |
| 0,0,&xtensa_mask17,0,0,0) | |
| XTREG(158,648, 1, 4, 4,0x200a,0x0006,-2, 6,0x1010,pswoe, | |
| 0,0,&xtensa_mask18,0,0,0) | |
| XTREG(159,652, 2, 4, 4,0x200b,0x0006,-2, 6,0x1010,psring, | |
| 0,0,&xtensa_mask19,0,0,0) | |
| XTREG(160,656, 1, 4, 4,0x200c,0x0006,-2, 6,0x1010,psexcm, | |
| 0,0,&xtensa_mask20,0,0,0) | |
| XTREG(161,660, 2, 4, 4,0x200d,0x0006,-2, 6,0x1010,pscallinc, | |
| 0,0,&xtensa_mask21,0,0,0) | |
| XTREG(162,664, 4, 4, 4,0x200e,0x0006,-2, 6,0x1010,psowb, | |
| 0,0,&xtensa_mask22,0,0,0) | |
| XTREG(163,668,40, 8, 4,0x200f,0x0006,-2, 6,0x1010,acc, | |
| 0,0,&xtensa_mask23,0,0,0) | |
| XTREG(164,676, 4, 4, 4,0x2014,0x0006,-2, 6,0x1010,dbnum, | |
| 0,0,&xtensa_mask24,0,0,0) | |
| XTREG(165,680, 8, 4, 4,0x2015,0x0006,-2, 6,0x1010,asid3, | |
| 0,0,&xtensa_mask25,0,0,0) | |
| XTREG(166,684, 8, 4, 4,0x2016,0x0006,-2, 6,0x1010,asid2, | |
| 0,0,&xtensa_mask26,0,0,0) | |
| XTREG(167,688, 8, 4, 4,0x2017,0x0006,-2, 6,0x1010,asid1, | |
| 0,0,&xtensa_mask27,0,0,0) | |
| XTREG(168,692, 1, 4, 4,0x2018,0x0006,-2, 6,0x1010,instpgszid6, | |
| 0,0,&xtensa_mask28,0,0,0) | |
| XTREG(169,696, 1, 4, 4,0x2019,0x0006,-2, 6,0x1010,instpgszid5, | |
| 0,0,&xtensa_mask29,0,0,0) | |
| XTREG(170,700, 2, 4, 4,0x201a,0x0006,-2, 6,0x1010,instpgszid4, | |
| 0,0,&xtensa_mask30,0,0,0) | |
| XTREG(171,704, 1, 4, 4,0x201b,0x0006,-2, 6,0x1010,datapgszid6, | |
| 0,0,&xtensa_mask31,0,0,0) | |
| XTREG(172,708, 1, 4, 4,0x201c,0x0006,-2, 6,0x1010,datapgszid5, | |
| 0,0,&xtensa_mask32,0,0,0) | |
| XTREG(173,712, 2, 4, 4,0x201d,0x0006,-2, 6,0x1010,datapgszid4, | |
| 0,0,&xtensa_mask33,0,0,0) | |
| XTREG(174,716,10, 4, 4,0x201e,0x0006,-2, 6,0x1010,ptbase, | |
| 0,0,&xtensa_mask34,0,0,0) | |
| XTREG(175,720, 2, 4, 4,0x201f,0x0006, 0, 5,0x1010,roundmode, | |
| 0,0,&xtensa_mask35,0,0,0) | |
| XTREG(176,724, 1, 4, 4,0x2020,0x0006, 0, 5,0x1010,invalidenable, | |
| 0,0,&xtensa_mask36,0,0,0) | |
| XTREG(177,728, 1, 4, 4,0x2021,0x0006, 0, 5,0x1010,divzeroenable, | |
| 0,0,&xtensa_mask37,0,0,0) | |
| XTREG(178,732, 1, 4, 4,0x2022,0x0006, 0, 5,0x1010,overflowenable, | |
| 0,0,&xtensa_mask38,0,0,0) | |
| XTREG(179,736, 1, 4, 4,0x2023,0x0006, 0, 5,0x1010,underflowenable, | |
| 0,0,&xtensa_mask39,0,0,0) | |
| XTREG(180,740, 1, 4, 4,0x2024,0x0006, 0, 5,0x1010,inexactenable, | |
| 0,0,&xtensa_mask40,0,0,0) | |
| XTREG(181,744, 1, 4, 4,0x2025,0x0006, 0, 5,0x1010,invalidflag, | |
| 0,0,&xtensa_mask41,0,0,0) | |
| XTREG(182,748, 1, 4, 4,0x2026,0x0006, 0, 5,0x1010,divzeroflag, | |
| 0,0,&xtensa_mask42,0,0,0) | |
| XTREG(183,752, 1, 4, 4,0x2027,0x0006, 0, 5,0x1010,overflowflag, | |
| 0,0,&xtensa_mask43,0,0,0) | |
| XTREG(184,756, 1, 4, 4,0x2028,0x0006, 0, 5,0x1010,underflowflag, | |
| 0,0,&xtensa_mask44,0,0,0) | |
| XTREG(185,760, 1, 4, 4,0x2029,0x0006, 0, 5,0x1010,inexactflag, | |
| 0,0,&xtensa_mask45,0,0,0) | |
| XTREG(186,764,20, 4, 4,0x202a,0x0006, 0, 5,0x1010,fpreserved20, | |
| 0,0,&xtensa_mask46,0,0,0) | |
| XTREG(187,768,20, 4, 4,0x202b,0x0006, 0, 5,0x1010,fpreserved20a, | |
| 0,0,&xtensa_mask47,0,0,0) | |
| XTREG(188,772, 5, 4, 4,0x202c,0x0006, 0, 5,0x1010,fpreserved5, | |
| 0,0,&xtensa_mask48,0,0,0) | |
| XTREG_END |