| # |
| # HPPA instruction decode definitions. |
| # |
| # Copyright (c) 2018 Richard Henderson <rth@twiddle.net> |
| # |
| # This library is free software; you can redistribute it and/or |
| # modify it under the terms of the GNU Lesser General Public |
| # License as published by the Free Software Foundation; either |
| # version 2 of the License, or (at your option) any later version. |
| # |
| # This library is distributed in the hope that it will be useful, |
| # but WITHOUT ANY WARRANTY; without even the implied warranty of |
| # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
| # Lesser General Public License for more details. |
| # |
| # You should have received a copy of the GNU Lesser General Public |
| # License along with this library; if not, see <http://www.gnu.org/licenses/>. |
| # |
| |
| #### |
| # Field definitions |
| #### |
| |
| %assemble_sr3 13:1 14:2 |
| %assemble_sr3x 13:1 14:2 !function=expand_sr3x |
| |
| %assemble_12 0:s1 2:1 3:10 !function=expand_shl2 |
| |
| %sm_imm 16:10 !function=expand_sm_imm |
| |
| %im5_0 0:s1 1:4 |
| %im5_16 16:s1 17:4 |
| %ma_to_m 5:1 13:1 !function=ma_to_m |
| |
| #### |
| # Argument set definitions |
| #### |
| |
| # All insns that need to form a virtual address should use this set. |
| &ldst t b x disp sp m scale size |
| |
| &rr_cf t r cf |
| &rrr_cf t r1 r2 cf |
| &rrr_cf_sh t r1 r2 cf sh |
| |
| &rrb_c_f disp n c f r1 r2 |
| &rib_c_f disp n c f r i |
| |
| #### |
| # Format definitions |
| #### |
| |
| @rr_cf ...... r:5 ..... cf:4 ....... t:5 &rr_cf |
| @rrr_cf ...... r2:5 r1:5 cf:4 ....... t:5 &rrr_cf |
| @rrr_cf_sh ...... r2:5 r1:5 cf:4 .... sh:2 . t:5 &rrr_cf_sh |
| @rrr_cf_sh0 ...... r2:5 r1:5 cf:4 ....... t:5 &rrr_cf_sh sh=0 |
| |
| @rrb_cf ...... r2:5 r1:5 c:3 ........... n:1 . \ |
| &rrb_c_f disp=%assemble_12 |
| @rib_cf ...... r:5 ..... c:3 ........... n:1 . \ |
| &rib_c_f disp=%assemble_12 i=%im5_16 |
| |
| #### |
| # System |
| #### |
| |
| break 000000 ----- ----- --- 00000000 ----- |
| |
| mtsp 000000 ----- r:5 ... 11000001 00000 sp=%assemble_sr3 |
| mtctl 000000 t:5 r:5 --- 11000010 00000 |
| mtsarcm 000000 01011 r:5 --- 11000110 00000 |
| mtsm 000000 00000 r:5 000 11000011 00000 |
| |
| mfia 000000 ----- 00000 --- 10100101 t:5 |
| mfsp 000000 ----- 00000 ... 00100101 t:5 sp=%assemble_sr3 |
| mfctl 000000 r:5 00000- e:1 -01000101 t:5 |
| |
| sync 000000 ----- ----- 000 00100000 00000 # sync, syncdma |
| |
| ldsid 000000 b:5 ----- sp:2 0 10000101 t:5 |
| |
| rsm 000000 .......... 000 01110011 t:5 i=%sm_imm |
| ssm 000000 .......... 000 01101011 t:5 i=%sm_imm |
| |
| rfi 000000 ----- ----- --- 01100000 00000 |
| rfi_r 000000 ----- ----- --- 01100101 00000 |
| |
| #### |
| # Memory Management |
| #### |
| |
| @addrx ...... b:5 x:5 .. ........ m:1 ..... \ |
| &ldst disp=0 scale=0 t=0 sp=0 size=0 |
| |
| nop 000001 ----- ----- -- 11001010 0 ----- # fdc, disp |
| nop_addrx 000001 ..... ..... -- 01001010 . ----- @addrx # fdc, index |
| nop_addrx 000001 ..... ..... -- 01001011 . ----- @addrx # fdce |
| nop_addrx 000001 ..... ..... --- 0001010 . ----- @addrx # fic 0x0a |
| nop_addrx 000001 ..... ..... -- 01001111 . 00000 @addrx # fic 0x4f |
| nop_addrx 000001 ..... ..... --- 0001011 . ----- @addrx # fice |
| nop_addrx 000001 ..... ..... -- 01001110 . 00000 @addrx # pdc |
| |
| probe 000001 b:5 ri:5 sp:2 imm:1 100011 write:1 0 t:5 |
| |
| ixtlbx 000001 b:5 r:5 sp:2 0100000 addr:1 0 00000 data=1 |
| ixtlbx 000001 b:5 r:5 ... 000000 addr:1 0 00000 \ |
| sp=%assemble_sr3x data=0 |
| |
| pxtlbx 000001 b:5 x:5 sp:2 0100100 local:1 m:1 ----- data=1 |
| pxtlbx 000001 b:5 x:5 ... 000100 local:1 m:1 ----- \ |
| sp=%assemble_sr3x data=0 |
| |
| lpa 000001 b:5 x:5 sp:2 01001101 m:1 t:5 \ |
| &ldst disp=0 scale=0 size=0 |
| |
| lci 000001 ----- ----- -- 01001100 0 t:5 |
| |
| #### |
| # Arith/Log |
| #### |
| |
| andcm 000010 ..... ..... .... 000000 0 ..... @rrr_cf |
| and 000010 ..... ..... .... 001000 0 ..... @rrr_cf |
| or 000010 ..... ..... .... 001001 0 ..... @rrr_cf |
| xor 000010 ..... ..... .... 001010 0 ..... @rrr_cf |
| uxor 000010 ..... ..... .... 001110 0 ..... @rrr_cf |
| ds 000010 ..... ..... .... 010001 0 ..... @rrr_cf |
| cmpclr 000010 ..... ..... .... 100010 0 ..... @rrr_cf |
| uaddcm 000010 ..... ..... .... 100110 0 ..... @rrr_cf |
| uaddcm_tc 000010 ..... ..... .... 100111 0 ..... @rrr_cf |
| dcor 000010 ..... 00000 .... 101110 0 ..... @rr_cf |
| dcor_i 000010 ..... 00000 .... 101111 0 ..... @rr_cf |
| |
| add 000010 ..... ..... .... 0110.. 0 ..... @rrr_cf_sh |
| add_l 000010 ..... ..... .... 1010.. 0 ..... @rrr_cf_sh |
| add_tsv 000010 ..... ..... .... 1110.. 0 ..... @rrr_cf_sh |
| add_c 000010 ..... ..... .... 011100 0 ..... @rrr_cf_sh0 |
| add_c_tsv 000010 ..... ..... .... 111100 0 ..... @rrr_cf_sh0 |
| |
| sub 000010 ..... ..... .... 010000 0 ..... @rrr_cf |
| sub_tsv 000010 ..... ..... .... 110000 0 ..... @rrr_cf |
| sub_tc 000010 ..... ..... .... 010011 0 ..... @rrr_cf |
| sub_tsv_tc 000010 ..... ..... .... 110011 0 ..... @rrr_cf |
| sub_b 000010 ..... ..... .... 010100 0 ..... @rrr_cf |
| sub_b_tsv 000010 ..... ..... .... 110100 0 ..... @rrr_cf |
| |
| #### |
| # Index Mem |
| #### |
| |
| @ldstx ...... b:5 x:5 sp:2 scale:1 ....... m:1 t:5 &ldst disp=0 |
| @ldim5 ...... b:5 ..... sp:2 ......... t:5 \ |
| &ldst disp=%im5_16 x=0 scale=0 m=%ma_to_m |
| @stim5 ...... b:5 t:5 sp:2 ......... ..... \ |
| &ldst disp=%im5_0 x=0 scale=0 m=%ma_to_m |
| |
| ld 000011 ..... ..... .. . 1 -- 00 size:2 ...... @ldim5 |
| ld 000011 ..... ..... .. . 0 -- 00 size:2 ...... @ldstx |
| st 000011 ..... ..... .. . 1 -- 10 size:2 ...... @stim5 |
| ldc 000011 ..... ..... .. . 1 -- 0111 ...... @ldim5 size=2 |
| ldc 000011 ..... ..... .. . 0 -- 0111 ...... @ldstx size=2 |
| lda 000011 ..... ..... .. . 1 -- 0110 ...... @ldim5 size=2 |
| lda 000011 ..... ..... .. . 0 -- 0110 ...... @ldstx size=2 |
| sta 000011 ..... ..... .. . 1 -- 1110 ...... @stim5 size=2 |
| stby 000011 b:5 r:5 sp:2 a:1 1 -- 1100 m:1 ..... disp=%im5_0 |
| |
| #### |
| # Floating-point Multiply Add |
| #### |
| |
| &mpyadd rm1 rm2 ta ra tm |
| @mpyadd ...... rm1:5 rm2:5 ta:5 ra:5 . tm:5 &mpyadd |
| |
| fmpyadd_f 000110 ..... ..... ..... ..... 0 ..... @mpyadd |
| fmpyadd_d 000110 ..... ..... ..... ..... 1 ..... @mpyadd |
| fmpysub_f 100110 ..... ..... ..... ..... 0 ..... @mpyadd |
| fmpysub_d 100110 ..... ..... ..... ..... 1 ..... @mpyadd |
| |
| #### |
| # Conditional Branches |
| #### |
| |
| bb_sar 110000 00000 r:5 c:1 10 ........... n:1 . disp=%assemble_12 |
| bb_imm 110001 p:5 r:5 c:1 10 ........... n:1 . disp=%assemble_12 |
| |
| movb 110010 ..... ..... ... ........... . . @rrb_cf f=0 |
| movbi 110011 ..... ..... ... ........... . . @rib_cf f=0 |
| |
| cmpb 100000 ..... ..... ... ........... . . @rrb_cf f=0 |
| cmpb 100010 ..... ..... ... ........... . . @rrb_cf f=1 |
| cmpbi 100001 ..... ..... ... ........... . . @rib_cf f=0 |
| cmpbi 100011 ..... ..... ... ........... . . @rib_cf f=1 |
| |
| addb 101000 ..... ..... ... ........... . . @rrb_cf f=0 |
| addb 101010 ..... ..... ... ........... . . @rrb_cf f=1 |
| addbi 101001 ..... ..... ... ........... . . @rib_cf f=0 |
| addbi 101011 ..... ..... ... ........... . . @rib_cf f=1 |
