[build] Fix building for big-endian targets

Fix build errors that arise when building for a big-endian target such
as s390x.  (Runtime endianness errors may remain: this fixes only
those errors that are detected at build time.)

Signed-off-by: Michael Brown <mcb30@ipxe.org>

src/drivers/bus/pcibridge.c

diff --git a/src/drivers/bus/pcibridge.c b/src/drivers/bus/pcibridge.c
index 67c9758..79e86f5 100644
--- a/src/drivers/bus/pcibridge.c
+++ b/src/drivers/bus/pcibridge.c
@@ -82,7 +82,7 @@
 
 	/* Read bus configuration */
 	pci_read_config_dword ( pci, PCI_PRIMARY, &bridge->buses );
-	cpu_to_le32s ( &buses );
+	cpu_to_le32s ( &bridge->buses );
 
 	/* Read memory base and limit */
 	pci_read_config_word ( pci, PCI_MEM_BASE, &base );

src/drivers/net/epic100.c

diff --git a/src/drivers/net/epic100.c b/src/drivers/net/epic100.c
index 03b394e..87ca8b3 100644
--- a/src/drivers/net/epic100.c
+++ b/src/drivers/net/epic100.c
@@ -380,7 +380,7 @@
     unsigned long status;
     entry = cur_rx % RX_RING_SIZE;
 
-    if ((rx_ring[entry].status & cpu_to_le32(RRING_OWN)) == RRING_OWN)
+    if (rx_ring[entry].status & cpu_to_le32(RRING_OWN))
 	return (0);
 
     if ( ! retrieve ) return 1;

src/drivers/net/vxge/vxge_config.c

diff --git a/src/drivers/net/vxge/vxge_config.c b/src/drivers/net/vxge/vxge_config.c
index 8c6ee9e..3663e0d 100644
--- a/src/drivers/net/vxge/vxge_config.c
+++ b/src/drivers/net/vxge/vxge_config.c
@@ -739,17 +739,16 @@
 enum vxge_hw_status
 __vxge_hw_vpath_swapper_set(struct vxge_hw_vpath_reg __iomem *vpath_reg)
 {
+	u64 val64;
 	vxge_trace();
 
-#if (__BYTE_ORDER != __BIG_ENDIAN)
-	u64 val64;
-
-	val64 = readq(&vpath_reg->vpath_general_cfg1);
-	wmb();
-	val64 |= VXGE_HW_VPATH_GENERAL_CFG1_CTL_BYTE_SWAPEN;
-	writeq(val64, &vpath_reg->vpath_general_cfg1);
-	wmb();
-#endif
+	if (__BYTE_ORDER != __BIG_ENDIAN) {
+		val64 = readq(&vpath_reg->vpath_general_cfg1);
+		wmb();
+		val64 |= VXGE_HW_VPATH_GENERAL_CFG1_CTL_BYTE_SWAPEN;
+		writeq(val64, &vpath_reg->vpath_general_cfg1);
+		wmb();
+	}
 	return VXGE_HW_OK;
 }
 
@@ -1372,10 +1371,9 @@
 
 	val64 |= VXGE_HW_KDFC_TRPL_FIFO_0_CTRL_MODE(
 		 VXGE_HW_KDFC_TRPL_FIFO_0_CTRL_MODE_NON_OFFLOAD_ONLY) |
-#if (__BYTE_ORDER != __BIG_ENDIAN)
-		 VXGE_HW_KDFC_TRPL_FIFO_0_CTRL_SWAP_EN |
-#endif
 		 VXGE_HW_KDFC_TRPL_FIFO_0_CTRL_SELECT(0);
+	if (__BYTE_ORDER != __BIG_ENDIAN)
+		val64 |= VXGE_HW_KDFC_TRPL_FIFO_0_CTRL_SWAP_EN;
 
 	writeq(val64, &vp_reg->kdfc_trpl_fifo_0_ctrl);
 	writeq((u64)0, &vp_reg->kdfc_trpl_fifo_0_wb_address);

src/include/ipxe/ieee80211.h

diff --git a/src/include/ipxe/ieee80211.h b/src/include/ipxe/ieee80211.h
index 4e44f43..0e3eeee 100644
--- a/src/include/ipxe/ieee80211.h
+++ b/src/include/ipxe/ieee80211.h
@@ -849,7 +849,7 @@
 /** Make OUI plus type byte into 32-bit integer for easy comparison */
 #if __BYTE_ORDER == __BIG_ENDIAN
 #define _MKOUI( a, b, c, t )	\
-		( ( ( a ) << 24 ) | ( ( b ) << 16 ) | ( ( c ) << 8 ) | ( d ) )
+		( ( ( a ) << 24 ) | ( ( b ) << 16 ) | ( ( c ) << 8 ) | ( t ) )
 #define  OUI_ORG_MASK		0xFFFFFF00
 #define  OUI_TYPE_MASK		0x000000FF
 #else