/** @file | |
TIS (TPM Interface Specification) functions used by TPM1.2. | |
Copyright (c) 2013 - 2018, Intel Corporation. All rights reserved.<BR> | |
(C) Copyright 2015 Hewlett Packard Enterprise Development LP<BR> | |
SPDX-License-Identifier: BSD-2-Clause-Patent | |
**/ | |
#include <Uefi.h> | |
#include <IndustryStandard/Tpm12.h> | |
#include <Library/BaseLib.h> | |
#include <Library/BaseMemoryLib.h> | |
#include <Library/IoLib.h> | |
#include <Library/TimerLib.h> | |
#include <Library/DebugLib.h> | |
#include <Library/Tpm12CommandLib.h> | |
#include <Library/PcdLib.h> | |
#include <IndustryStandard/TpmPtp.h> | |
#include <IndustryStandard/TpmTis.h> | |
typedef enum { | |
PtpInterfaceTis, | |
PtpInterfaceFifo, | |
PtpInterfaceCrb, | |
PtpInterfaceMax, | |
} PTP_INTERFACE_TYPE; | |
// | |
// Max TPM command/response length | |
// | |
#define TPMCMDBUFLENGTH 1024 | |
/** | |
Check whether TPM chip exist. | |
@param[in] TisReg Pointer to TIS register. | |
@retval TRUE TPM chip exists. | |
@retval FALSE TPM chip is not found. | |
**/ | |
BOOLEAN | |
Tpm12TisPcPresenceCheck ( | |
IN TIS_PC_REGISTERS_PTR TisReg | |
) | |
{ | |
UINT8 RegRead; | |
RegRead = MmioRead8 ((UINTN)&TisReg->Access); | |
return (BOOLEAN)(RegRead != (UINT8)-1); | |
} | |
/** | |
Return PTP interface type. | |
@param[in] Register Pointer to PTP register. | |
@return PTP interface type. | |
**/ | |
PTP_INTERFACE_TYPE | |
Tpm12GetPtpInterface ( | |
IN VOID *Register | |
) | |
{ | |
PTP_CRB_INTERFACE_IDENTIFIER InterfaceId; | |
PTP_FIFO_INTERFACE_CAPABILITY InterfaceCapability; | |
if (!Tpm12TisPcPresenceCheck (Register)) { | |
return PtpInterfaceMax; | |
} | |
// | |
// Check interface id | |
// | |
InterfaceId.Uint32 = MmioRead32 ((UINTN)&((PTP_CRB_REGISTERS *)Register)->InterfaceId); | |
InterfaceCapability.Uint32 = MmioRead32 ((UINTN)&((PTP_FIFO_REGISTERS *)Register)->InterfaceCapability); | |
if ((InterfaceId.Bits.InterfaceType == PTP_INTERFACE_IDENTIFIER_INTERFACE_TYPE_CRB) && | |
(InterfaceId.Bits.InterfaceVersion == PTP_INTERFACE_IDENTIFIER_INTERFACE_VERSION_CRB) && | |
(InterfaceId.Bits.CapCRB != 0)) | |
{ | |
return PtpInterfaceCrb; | |
} | |
if ((InterfaceId.Bits.InterfaceType == PTP_INTERFACE_IDENTIFIER_INTERFACE_TYPE_FIFO) && | |
(InterfaceId.Bits.InterfaceVersion == PTP_INTERFACE_IDENTIFIER_INTERFACE_VERSION_FIFO) && | |
(InterfaceId.Bits.CapFIFO != 0) && | |
(InterfaceCapability.Bits.InterfaceVersion == INTERFACE_CAPABILITY_INTERFACE_VERSION_PTP)) | |
{ | |
return PtpInterfaceFifo; | |
} | |
if (InterfaceId.Bits.InterfaceType == PTP_INTERFACE_IDENTIFIER_INTERFACE_TYPE_TIS) { | |
return PtpInterfaceTis; | |
} | |
return PtpInterfaceMax; | |
} | |
/** | |
Check whether the value of a TPM chip register satisfies the input BIT setting. | |
@param[in] Register Address port of register to be checked. | |
@param[in] BitSet Check these data bits are set. | |
@param[in] BitClear Check these data bits are clear. | |
@param[in] TimeOut The max wait time (unit MicroSecond) when checking register. | |
@retval EFI_SUCCESS The register satisfies the check bit. | |
@retval EFI_TIMEOUT The register can't run into the expected status in time. | |
**/ | |
EFI_STATUS | |
Tpm12TisPcWaitRegisterBits ( | |
IN UINT8 *Register, | |
IN UINT8 BitSet, | |
IN UINT8 BitClear, | |
IN UINT32 TimeOut | |
) | |
{ | |
UINT8 RegRead; | |
UINT32 WaitTime; | |
for (WaitTime = 0; WaitTime < TimeOut; WaitTime += 30) { | |
RegRead = MmioRead8 ((UINTN)Register); | |
if (((RegRead & BitSet) == BitSet) && ((RegRead & BitClear) == 0)) { | |
return EFI_SUCCESS; | |
} | |
MicroSecondDelay (30); | |
} | |
return EFI_TIMEOUT; | |
} | |
/** | |
Get BurstCount by reading the burstCount field of a TIS register | |
in the time of default TIS_TIMEOUT_D. | |
@param[in] TisReg Pointer to TIS register. | |
@param[out] BurstCount Pointer to a buffer to store the got BurstCount. | |
@retval EFI_SUCCESS Get BurstCount. | |
@retval EFI_INVALID_PARAMETER TisReg is NULL or BurstCount is NULL. | |
@retval EFI_TIMEOUT BurstCount can't be got in time. | |
**/ | |
EFI_STATUS | |
Tpm12TisPcReadBurstCount ( | |
IN TIS_PC_REGISTERS_PTR TisReg, | |
OUT UINT16 *BurstCount | |
) | |
{ | |
UINT32 WaitTime; | |
UINT8 DataByte0; | |
UINT8 DataByte1; | |
if ((BurstCount == NULL) || (TisReg == NULL)) { | |
return EFI_INVALID_PARAMETER; | |
} | |
WaitTime = 0; | |
do { | |
// | |
// TIS_PC_REGISTERS_PTR->burstCount is UINT16, but it is not 2bytes aligned, | |
// so it needs to use MmioRead8 to read two times | |
// | |
DataByte0 = MmioRead8 ((UINTN)&TisReg->BurstCount); | |
DataByte1 = MmioRead8 ((UINTN)&TisReg->BurstCount + 1); | |
*BurstCount = (UINT16)((DataByte1 << 8) + DataByte0); | |
if (*BurstCount != 0) { | |
return EFI_SUCCESS; | |
} | |
MicroSecondDelay (30); | |
WaitTime += 30; | |
} while (WaitTime < TIS_TIMEOUT_D); | |
return EFI_TIMEOUT; | |
} | |
/** | |
Set TPM chip to ready state by sending ready command TIS_PC_STS_READY | |
to Status Register in time. | |
@param[in] TisReg Pointer to TIS register. | |
@retval EFI_SUCCESS TPM chip enters into ready state. | |
@retval EFI_INVALID_PARAMETER TisReg is NULL. | |
@retval EFI_TIMEOUT TPM chip can't be set to ready state in time. | |
**/ | |
EFI_STATUS | |
Tpm12TisPcPrepareCommand ( | |
IN TIS_PC_REGISTERS_PTR TisReg | |
) | |
{ | |
EFI_STATUS Status; | |
if (TisReg == NULL) { | |
return EFI_INVALID_PARAMETER; | |
} | |
MmioWrite8 ((UINTN)&TisReg->Status, TIS_PC_STS_READY); | |
Status = Tpm12TisPcWaitRegisterBits ( | |
&TisReg->Status, | |
TIS_PC_STS_READY, | |
0, | |
TIS_TIMEOUT_B | |
); | |
return Status; | |
} | |
/** | |
Get the control of TPM chip by sending requestUse command TIS_PC_ACC_RQUUSE | |
to ACCESS Register in the time of default TIS_TIMEOUT_A. | |
@param[in] TisReg Pointer to TIS register. | |
@retval EFI_SUCCESS Get the control of TPM chip. | |
@retval EFI_INVALID_PARAMETER TisReg is NULL. | |
@retval EFI_NOT_FOUND TPM chip doesn't exit. | |
@retval EFI_TIMEOUT Can't get the TPM control in time. | |
**/ | |
EFI_STATUS | |
Tpm12TisPcRequestUseTpm ( | |
IN TIS_PC_REGISTERS_PTR TisReg | |
) | |
{ | |
EFI_STATUS Status; | |
if (TisReg == NULL) { | |
return EFI_INVALID_PARAMETER; | |
} | |
if (!Tpm12TisPcPresenceCheck (TisReg)) { | |
return EFI_NOT_FOUND; | |
} | |
MmioWrite8 ((UINTN)&TisReg->Access, TIS_PC_ACC_RQUUSE); | |
Status = Tpm12TisPcWaitRegisterBits ( | |
&TisReg->Access, | |
(UINT8)(TIS_PC_ACC_ACTIVE |TIS_PC_VALID), | |
0, | |
TIS_TIMEOUT_A | |
); | |
return Status; | |
} | |
/** | |
Send a command to TPM for execution and return response data. | |
@param[in] TisReg TPM register space base address. | |
@param[in] BufferIn Buffer for command data. | |
@param[in] SizeIn Size of command data. | |
@param[in, out] BufferOut Buffer for response data. | |
@param[in, out] SizeOut Size of response data. | |
@retval EFI_SUCCESS Operation completed successfully. | |
@retval EFI_BUFFER_TOO_SMALL Response data buffer is too small. | |
@retval EFI_DEVICE_ERROR Unexpected device behavior. | |
@retval EFI_UNSUPPORTED Unsupported TPM version | |
**/ | |
EFI_STATUS | |
Tpm12TisTpmCommand ( | |
IN TIS_PC_REGISTERS_PTR TisReg, | |
IN UINT8 *BufferIn, | |
IN UINT32 SizeIn, | |
IN OUT UINT8 *BufferOut, | |
IN OUT UINT32 *SizeOut | |
) | |
{ | |
EFI_STATUS Status; | |
UINT16 BurstCount; | |
UINT32 Index; | |
UINT32 TpmOutSize; | |
UINT16 Data16; | |
UINT32 Data32; | |
UINT16 RspTag; | |
DEBUG_CODE_BEGIN (); | |
UINTN DebugSize; | |
DEBUG ((DEBUG_VERBOSE, "Tpm12TisTpmCommand Send - ")); | |
if (SizeIn > 0x100) { | |
DebugSize = 0x40; | |
} else { | |
DebugSize = SizeIn; | |
} | |
for (Index = 0; Index < DebugSize; Index++) { | |
DEBUG ((DEBUG_VERBOSE, "%02x ", BufferIn[Index])); | |
} | |
if (DebugSize != SizeIn) { | |
DEBUG ((DEBUG_VERBOSE, "...... ")); | |
for (Index = SizeIn - 0x20; Index < SizeIn; Index++) { | |
DEBUG ((DEBUG_VERBOSE, "%02x ", BufferIn[Index])); | |
} | |
} | |
DEBUG ((DEBUG_VERBOSE, "\n")); | |
DEBUG_CODE_END (); | |
TpmOutSize = 0; | |
Status = Tpm12TisPcPrepareCommand (TisReg); | |
if (EFI_ERROR (Status)) { | |
DEBUG ((DEBUG_ERROR, "Tpm12 is not ready for command!\n")); | |
return EFI_DEVICE_ERROR; | |
} | |
// | |
// Send the command data to Tpm | |
// | |
Index = 0; | |
while (Index < SizeIn) { | |
Status = Tpm12TisPcReadBurstCount (TisReg, &BurstCount); | |
if (EFI_ERROR (Status)) { | |
Status = EFI_DEVICE_ERROR; | |
goto Exit; | |
} | |
for ( ; BurstCount > 0 && Index < SizeIn; BurstCount--) { | |
MmioWrite8 ((UINTN)&TisReg->DataFifo, *(BufferIn + Index)); | |
Index++; | |
} | |
} | |
// | |
// Check the Tpm status STS_EXPECT change from 1 to 0 | |
// | |
Status = Tpm12TisPcWaitRegisterBits ( | |
&TisReg->Status, | |
(UINT8)TIS_PC_VALID, | |
TIS_PC_STS_EXPECT, | |
TIS_TIMEOUT_C | |
); | |
if (EFI_ERROR (Status)) { | |
DEBUG ((DEBUG_ERROR, "Tpm12 The send buffer too small!\n")); | |
Status = EFI_BUFFER_TOO_SMALL; | |
goto Exit; | |
} | |
// | |
// Executed the TPM command and waiting for the response data ready | |
// | |
MmioWrite8 ((UINTN)&TisReg->Status, TIS_PC_STS_GO); | |
Status = Tpm12TisPcWaitRegisterBits ( | |
&TisReg->Status, | |
(UINT8)(TIS_PC_VALID | TIS_PC_STS_DATA), | |
0, | |
TIS_TIMEOUT_B | |
); | |
if (EFI_ERROR (Status)) { | |
DEBUG ((DEBUG_ERROR, "Wait for Tpm12 response data time out!!\n")); | |
Status = EFI_DEVICE_ERROR; | |
goto Exit; | |
} | |
// | |
// Get response data header | |
// | |
Index = 0; | |
BurstCount = 0; | |
while (Index < sizeof (TPM_RSP_COMMAND_HDR)) { | |
Status = Tpm12TisPcReadBurstCount (TisReg, &BurstCount); | |
if (EFI_ERROR (Status)) { | |
Status = EFI_DEVICE_ERROR; | |
goto Exit; | |
} | |
for ( ; BurstCount > 0; BurstCount--) { | |
*(BufferOut + Index) = MmioRead8 ((UINTN)&TisReg->DataFifo); | |
Index++; | |
if (Index == sizeof (TPM_RSP_COMMAND_HDR)) { | |
break; | |
} | |
} | |
} | |
DEBUG_CODE_BEGIN (); | |
DEBUG ((DEBUG_VERBOSE, "Tpm12TisTpmCommand ReceiveHeader - ")); | |
for (Index = 0; Index < sizeof (TPM_RSP_COMMAND_HDR); Index++) { | |
DEBUG ((DEBUG_VERBOSE, "%02x ", BufferOut[Index])); | |
} | |
DEBUG ((DEBUG_VERBOSE, "\n")); | |
DEBUG_CODE_END (); | |
// | |
// Check the response data header (tag, parasize and returncode) | |
// | |
CopyMem (&Data16, BufferOut, sizeof (UINT16)); | |
RspTag = SwapBytes16 (Data16); | |
if ((RspTag != TPM_TAG_RSP_COMMAND) && (RspTag != TPM_TAG_RSP_AUTH1_COMMAND) && (RspTag != TPM_TAG_RSP_AUTH2_COMMAND)) { | |
DEBUG ((DEBUG_ERROR, "TPM12: Response tag error - current tag value is %x\n", RspTag)); | |
Status = EFI_UNSUPPORTED; | |
goto Exit; | |
} | |
CopyMem (&Data32, (BufferOut + 2), sizeof (UINT32)); | |
TpmOutSize = SwapBytes32 (Data32); | |
if (*SizeOut < TpmOutSize) { | |
Status = EFI_BUFFER_TOO_SMALL; | |
goto Exit; | |
} | |
*SizeOut = TpmOutSize; | |
// | |
// Continue reading the remaining data | |
// | |
while ( Index < TpmOutSize ) { | |
for ( ; BurstCount > 0; BurstCount--) { | |
*(BufferOut + Index) = MmioRead8 ((UINTN)&TisReg->DataFifo); | |
Index++; | |
if (Index == TpmOutSize) { | |
Status = EFI_SUCCESS; | |
goto Exit; | |
} | |
} | |
Status = Tpm12TisPcReadBurstCount (TisReg, &BurstCount); | |
if (EFI_ERROR (Status)) { | |
Status = EFI_DEVICE_ERROR; | |
goto Exit; | |
} | |
} | |
Exit: | |
DEBUG_CODE_BEGIN (); | |
DEBUG ((DEBUG_VERBOSE, "Tpm12TisTpmCommand Receive - ")); | |
for (Index = 0; Index < TpmOutSize; Index++) { | |
DEBUG ((DEBUG_VERBOSE, "%02x ", BufferOut[Index])); | |
} | |
DEBUG ((DEBUG_VERBOSE, "\n")); | |
DEBUG_CODE_END (); | |
MmioWrite8 ((UINTN)&TisReg->Status, TIS_PC_STS_READY); | |
return Status; | |
} | |
/** | |
This service enables the sending of commands to the TPM12. | |
@param[in] InputParameterBlockSize Size of the TPM12 input parameter block. | |
@param[in] InputParameterBlock Pointer to the TPM12 input parameter block. | |
@param[in,out] OutputParameterBlockSize Size of the TPM12 output parameter block. | |
@param[in] OutputParameterBlock Pointer to the TPM12 output parameter block. | |
@retval EFI_SUCCESS The command byte stream was successfully sent to the device and a response was successfully received. | |
@retval EFI_DEVICE_ERROR The command was not successfully sent to the device or a response was not successfully received from the device. | |
@retval EFI_BUFFER_TOO_SMALL The output parameter block is too small. | |
**/ | |
EFI_STATUS | |
EFIAPI | |
Tpm12SubmitCommand ( | |
IN UINT32 InputParameterBlockSize, | |
IN UINT8 *InputParameterBlock, | |
IN OUT UINT32 *OutputParameterBlockSize, | |
IN UINT8 *OutputParameterBlock | |
) | |
{ | |
PTP_INTERFACE_TYPE PtpInterface; | |
// | |
// Special handle for TPM1.2 to check PTP too, because PTP/TIS share same register address. | |
// | |
PtpInterface = Tpm12GetPtpInterface ((VOID *)(UINTN)PcdGet64 (PcdTpmBaseAddress)); | |
switch (PtpInterface) { | |
case PtpInterfaceFifo: | |
case PtpInterfaceTis: | |
return Tpm12TisTpmCommand ( | |
(TIS_PC_REGISTERS_PTR)(UINTN)PcdGet64 (PcdTpmBaseAddress), | |
InputParameterBlock, | |
InputParameterBlockSize, | |
OutputParameterBlock, | |
OutputParameterBlockSize | |
); | |
case PtpInterfaceCrb: | |
// | |
// No need to support CRB because it is only accept TPM2 command. | |
// | |
default: | |
return EFI_DEVICE_ERROR; | |
} | |
} | |
/** | |
Check whether the value of a TPM chip register satisfies the input BIT setting. | |
@param[in] Register Address port of register to be checked. | |
@param[in] BitSet Check these data bits are set. | |
@param[in] BitClear Check these data bits are clear. | |
@param[in] TimeOut The max wait time (unit MicroSecond) when checking register. | |
@retval EFI_SUCCESS The register satisfies the check bit. | |
@retval EFI_TIMEOUT The register can't run into the expected status in time. | |
**/ | |
EFI_STATUS | |
Tpm12PtpCrbWaitRegisterBits ( | |
IN UINT32 *Register, | |
IN UINT32 BitSet, | |
IN UINT32 BitClear, | |
IN UINT32 TimeOut | |
) | |
{ | |
UINT32 RegRead; | |
UINT32 WaitTime; | |
for (WaitTime = 0; WaitTime < TimeOut; WaitTime += 30) { | |
RegRead = MmioRead32 ((UINTN)Register); | |
if (((RegRead & BitSet) == BitSet) && ((RegRead & BitClear) == 0)) { | |
return EFI_SUCCESS; | |
} | |
MicroSecondDelay (30); | |
} | |
return EFI_TIMEOUT; | |
} | |
/** | |
Get the control of TPM chip. | |
@param[in] CrbReg Pointer to CRB register. | |
@retval EFI_SUCCESS Get the control of TPM chip. | |
@retval EFI_INVALID_PARAMETER CrbReg is NULL. | |
@retval EFI_NOT_FOUND TPM chip doesn't exit. | |
@retval EFI_TIMEOUT Can't get the TPM control in time. | |
**/ | |
EFI_STATUS | |
Tpm12PtpCrbRequestUseTpm ( | |
IN PTP_CRB_REGISTERS_PTR CrbReg | |
) | |
{ | |
EFI_STATUS Status; | |
MmioWrite32 ((UINTN)&CrbReg->LocalityControl, PTP_CRB_LOCALITY_CONTROL_REQUEST_ACCESS); | |
Status = Tpm12PtpCrbWaitRegisterBits ( | |
&CrbReg->LocalityStatus, | |
PTP_CRB_LOCALITY_STATUS_GRANTED, | |
0, | |
PTP_TIMEOUT_A | |
); | |
return Status; | |
} | |
/** | |
This service requests use TPM12. | |
@retval EFI_SUCCESS Get the control of TPM12 chip. | |
@retval EFI_NOT_FOUND TPM12 not found. | |
@retval EFI_DEVICE_ERROR Unexpected device behavior. | |
**/ | |
EFI_STATUS | |
EFIAPI | |
Tpm12RequestUseTpm ( | |
VOID | |
) | |
{ | |
PTP_INTERFACE_TYPE PtpInterface; | |
// | |
// Special handle for TPM1.2 to check PTP too, because PTP/TIS share same register address. | |
// Some other program might leverage this function to check the existence of TPM chip. | |
// | |
PtpInterface = Tpm12GetPtpInterface ((VOID *)(UINTN)PcdGet64 (PcdTpmBaseAddress)); | |
switch (PtpInterface) { | |
case PtpInterfaceCrb: | |
return Tpm12PtpCrbRequestUseTpm ((PTP_CRB_REGISTERS_PTR)(UINTN)PcdGet64 (PcdTpmBaseAddress)); | |
case PtpInterfaceFifo: | |
case PtpInterfaceTis: | |
return Tpm12TisPcRequestUseTpm ((TIS_PC_REGISTERS_PTR)(UINTN)PcdGet64 (PcdTpmBaseAddress)); | |
default: | |
return EFI_NOT_FOUND; | |
} | |
} |