| /** @file |
| Header file of Serial port hardware definition. |
| |
| Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.<BR> |
|
|
| This program and the accompanying materials are licensed and made available under
|
| the terms and conditions of the BSD License that accompanies this distribution.
|
| The full text of the license may be found at
|
| http://opensource.org/licenses/bsd-license.php.
|
|
|
| THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
| WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. |
| |
| **/ |
| |
| #ifndef __PLATFORM_SERIAL_PORT_LIB_H_ |
| #define __PLATFORM_SERIAL_PORT_LIB_H_ |
| |
| #include <Base.h> |
| #include <Library/BaseLib.h> |
| #include <Library/IoLib.h> |
| #include <Library/PcdLib.h> |
| #include <Library/SerialPortLib.h> |
| |
| // |
| // UART Register Offsets |
| // |
| #define BAUD_LOW_OFFSET 0x00 |
| #define BAUD_HIGH_OFFSET 0x01 |
| #define IER_OFFSET 0x01 |
| #define LCR_SHADOW_OFFSET 0x01 |
| #define FCR_SHADOW_OFFSET 0x02 |
| #define IR_CONTROL_OFFSET 0x02 |
| #define FCR_OFFSET 0x02 |
| #define EIR_OFFSET 0x02 |
| #define BSR_OFFSET 0x03 |
| #define LCR_OFFSET 0x03 |
| #define MCR_OFFSET 0x04 |
| #define LSR_OFFSET 0x05 |
| #define MSR_OFFSET 0x06 |
| |
| // |
| // UART Register Bit Defines |
| // |
| #define LSR_TXRDY 0x20 |
| #define LSR_RXDA 0x01 |
| #define DLAB 0x01 |
| |
| #define UART_DATA 8 |
| #define UART_STOP 1 |
| #define UART_PARITY 0 |
| #define UART_BREAK_SET 0 |
| |
| VOID |
| InitializeSio ( |
| VOID |
| ); |
| |
| #endif |