)]}'
{
  "commit": "80768e454d548a7f7f53374a3a0ff8ec4bbae778",
  "tree": "a44fdfa838ed794fb004d7b9505771d11af0e2cb",
  "parents": [
    "d6e3386709b3e49322a94ffadc2aaab9944ab77b"
  ],
  "author": {
    "name": "Jamin Lin",
    "email": "jamin_lin@aspeedtech.com",
    "time": "Thu Jun 26 17:16:18 2025 +0800"
  },
  "committer": {
    "name": "Jamin Lin",
    "email": "jamin_lin@aspeedtech.com",
    "time": "Mon Jul 07 13:58:52 2025 +0800"
  },
  "message": "ast27x0: Initialize and enable SSP/TSP using SCU with reserved-memory from DTB\n\nThis commit adds support for bringing up the SSP and TSP co-processors\non AST2700. The initialization and control logic are performed via SCU\nregister programming. Memory layout for firmware regions is retrieved\nfrom reserved-memory nodes in the SPL device tree.\n\nFeatures included:\n\n- Add find_fmc_image() to locate FMC v2 image and extract payload range.\n- Load and validate SPL DTB located after FMC payload.\n- Parse reserved-memory nodes for SSP, TSP, ATF, OP-TEE, and IPC regions.\n- Define struct mem_region and reserved_mem_info for memory layout data.\n- Implement ssp_init() and ssp_enable() for SSP SCU setup and launch.\n- Implement tsp_init() and tsp_enable() for TSP SCU setup and launch.\n- Extend load_other_fit_images() to detect \"sspfw\" and \"tspfw\" images.\n- Enable SSP/TSP after loading firmware from FIT image.\n- Add SCU register definitions in struct ast2700_scu0.\n\nNote: DTB is only used to retrieve memory layout for reserved regions.\nThe SSP and TSP initialization and activation are done via SCU registers.\n\nCode adapted from:\nhttps://github.com/AspeedTech-BMC/u-boot/blob/aspeed-master-v2023.10/board/aspeed/ibex_ast2700/ssp_tsp.c\n\nSigned-off-by: Jamin Lin \u003cjamin_lin@aspeedtech.com\u003e\n",
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