diff --git a/arch/Kconfig b/arch/Kconfig
index fffddac..4e384d1 100644
--- a/arch/Kconfig
+++ b/arch/Kconfig
@@ -351,6 +351,18 @@
 	 Note that, its up to the individual architectures to implement
 	 this functionality.
 
+config SYS_IMMR
+	hex
+	depends on PPC || FSL_LSCH2 || FSL_LSCH3 || ARCH_LS1021A
+	default 0xFF000000 if MPC8xx
+	default 0xF0000000 if ARCH_MPC8313
+	default 0xE0000000 if MPC83xx && !ARCH_MPC8313
+	default 0x01000000 if ARCH_LS1021A || FSL_LSCH2 || FSL_LSCH3
+	default SYS_CCSRBAR_DEFAULT
+	help
+	  Address for the Internal Memory-Mapped Registers (IMMR) window used
+	  to configure the features of many Freescale / NXP SoCs.
+
 config SKIP_LOWLEVEL_INIT
 	bool "Skip the calls to certain low level initialization functions"
 	depends on ARM || NDS32 || MIPS || RISCV
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
index c9be076..06adf66 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
@@ -11,7 +11,6 @@
 #include <linux/bitops.h>
 #endif
 
-#define CONFIG_SYS_IMMR				0x01000000
 #define CONFIG_SYS_DCSRBAR			0x20000000
 #define CONFIG_SYS_DCSR_DCFG_ADDR	(CONFIG_SYS_DCSRBAR + 0x00140000)
 #define CONFIG_SYS_DCSR_COP_CCP_ADDR	(CONFIG_SYS_DCSRBAR + 0x02008040)
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
index b64d7fb..863618a 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
@@ -9,7 +9,6 @@
 #ifndef __ARCH_FSL_LSCH3_IMMAP_H_
 #define __ARCH_FSL_LSCH3_IMMAP_H_
 
-#define CONFIG_SYS_IMMR				0x01000000
 #define CONFIG_SYS_FSL_DDR_ADDR			(CONFIG_SYS_IMMR + 0x00080000)
 #define CONFIG_SYS_FSL_DDR2_ADDR		(CONFIG_SYS_IMMR + 0x00090000)
 #define CONFIG_SYS_FSL_DDR3_ADDR		0x08210000
diff --git a/arch/arm/include/asm/arch-ls102xa/config.h b/arch/arm/include/asm/arch-ls102xa/config.h
index 3884948..0e1f9e0 100644
--- a/arch/arm/include/asm/arch-ls102xa/config.h
+++ b/arch/arm/include/asm/arch-ls102xa/config.h
@@ -11,7 +11,6 @@
 #define OCRAM_BASE_S_ADDR			0x10010000
 #define OCRAM_S_SIZE				0x00010000
 
-#define CONFIG_SYS_IMMR				0x01000000
 #define CONFIG_SYS_DCSRBAR			0x20000000
 
 #define CONFIG_SYS_DCSR_DCFG_ADDR	(CONFIG_SYS_DCSRBAR + 0x00220000)
diff --git a/arch/powerpc/cpu/mpc83xx/Kconfig b/arch/powerpc/cpu/mpc83xx/Kconfig
index cff98f7..d58d278 100644
--- a/arch/powerpc/cpu/mpc83xx/Kconfig
+++ b/arch/powerpc/cpu/mpc83xx/Kconfig
@@ -179,13 +179,6 @@
 	select SYS_CACHE_SHIFT_5
 	select FSL_ELBC
 
-config SYS_IMMR
-	hex "Value for IMMR"
-	default 0xE0000000
-	help
-	  Address for the Internal Memory-Mapped Registers (IMMR) window used
-	  to configure the features of the SoC.
-
 source "arch/powerpc/cpu/mpc83xx/hrcw/Kconfig"
 source "arch/powerpc/cpu/mpc83xx/bats/Kconfig"
 source "arch/powerpc/cpu/mpc83xx/lblaw/Kconfig"
diff --git a/arch/powerpc/cpu/mpc83xx/start.S b/arch/powerpc/cpu/mpc83xx/start.S
index c4953df..91c8778 100644
--- a/arch/powerpc/cpu/mpc83xx/start.S
+++ b/arch/powerpc/cpu/mpc83xx/start.S
@@ -115,9 +115,6 @@
 #ifndef CONFIG_DEFAULT_IMMR
 #error CONFIG_DEFAULT_IMMR must be defined
 #endif /* CONFIG_DEFAULT_IMMR */
-#ifndef CONFIG_SYS_IMMR
-#define CONFIG_SYS_IMMR CONFIG_DEFAULT_IMMR
-#endif /* CONFIG_SYS_IMMR */
 
 /*
  * After configuration, a system reset exception is executed using the
diff --git a/arch/powerpc/cpu/mpc8xx/Kconfig b/arch/powerpc/cpu/mpc8xx/Kconfig
index 091bbaf..d630711 100644
--- a/arch/powerpc/cpu/mpc8xx/Kconfig
+++ b/arch/powerpc/cpu/mpc8xx/Kconfig
@@ -84,9 +84,6 @@
 	help
 	  Debug Event Register (37-47)
 
-config SYS_IMMR
-	hex "Value for IMMR"
-
 source "board/cssi/MCR3000/Kconfig"
 
 endmenu
diff --git a/configs/MCR3000_defconfig b/configs/MCR3000_defconfig
index b9c5843..04fe756 100644
--- a/configs/MCR3000_defconfig
+++ b/configs/MCR3000_defconfig
@@ -4,7 +4,6 @@
 CONFIG_ENV_SECT_SIZE=0x2000
 CONFIG_DEFAULT_DEVICE_TREE="mcr3000"
 CONFIG_MPC8xx=y
-CONFIG_SYS_IMMR=0xFF000000
 CONFIG_TARGET_MCR3000=y
 CONFIG_8xx_GCLK_FREQ=132000000
 CONFIG_CMD_IMMAP=y
diff --git a/configs/ids8313_defconfig b/configs/ids8313_defconfig
index 006c80c..4ee97ae 100644
--- a/configs/ids8313_defconfig
+++ b/configs/ids8313_defconfig
@@ -8,7 +8,6 @@
 CONFIG_MPC83xx=y
 CONFIG_HIGH_BATS=y
 CONFIG_TARGET_IDS8313=y
-CONFIG_SYS_IMMR=0xF0000000
 CONFIG_CORE_PLL_RATIO_2_1=y
 CONFIG_PCI_HOST_MODE_ENABLE=y
 CONFIG_BOOT_ROM_INTERFACE_GPCM_8BIT=y
diff --git a/include/configs/M5208EVBE.h b/include/configs/M5208EVBE.h
index 717e3e4..5ed624c 100644
--- a/include/configs/M5208EVBE.h
+++ b/include/configs/M5208EVBE.h
@@ -38,7 +38,6 @@
 #define CONFIG_MCFTMR
 
 /* I2C */
-#define CONFIG_SYS_IMMR			CONFIG_SYS_MBAR
 
 #define CONFIG_UDP_CHECKSUM
 
diff --git a/include/configs/M5235EVB.h b/include/configs/M5235EVB.h
index 2e5220f..90f1664 100644
--- a/include/configs/M5235EVB.h
+++ b/include/configs/M5235EVB.h
@@ -47,7 +47,6 @@
 #define CONFIG_MCFTMR
 
 /* I2C */
-#define CONFIG_SYS_IMMR		CONFIG_SYS_MBAR
 #define CONFIG_SYS_I2C_PINMUX_REG	(gpio->par_qspi)
 #define CONFIG_SYS_I2C_PINMUX_CLR	~(GPIO_PAR_FECI2C_SCL_MASK | GPIO_PAR_FECI2C_SDA_MASK)
 #define CONFIG_SYS_I2C_PINMUX_SET	(GPIO_PAR_FECI2C_SCL_I2CSCL | GPIO_PAR_FECI2C_SDA_I2CSDA)
diff --git a/include/configs/M5253DEMO.h b/include/configs/M5253DEMO.h
index ff29096..c5d8aa3 100644
--- a/include/configs/M5253DEMO.h
+++ b/include/configs/M5253DEMO.h
@@ -67,7 +67,6 @@
 #define CONFIG_HOSTNAME		"M5253DEMO"
 
 /* I2C */
-#define CONFIG_SYS_IMMR		CONFIG_SYS_MBAR
 #define CONFIG_SYS_I2C_PINMUX_REG	(*(u32 *) (CONFIG_SYS_MBAR+0x19C))
 #define CONFIG_SYS_I2C_PINMUX_CLR	(0xFFFFE7FF)
 #define CONFIG_SYS_I2C_PINMUX_SET	(0)
diff --git a/include/configs/M5275EVB.h b/include/configs/M5275EVB.h
index 7ca9164..b18f031 100644
--- a/include/configs/M5275EVB.h
+++ b/include/configs/M5275EVB.h
@@ -58,7 +58,6 @@
 #endif
 
 /* I2C */
-#define CONFIG_SYS_IMMR		CONFIG_SYS_MBAR
 #define CONFIG_SYS_I2C_PINMUX_REG	(gpio_reg->par_feci2c)
 #define CONFIG_SYS_I2C_PINMUX_CLR	(0xFFF0)
 #define CONFIG_SYS_I2C_PINMUX_SET	(0x000F)
diff --git a/include/configs/M53017EVB.h b/include/configs/M53017EVB.h
index 58b75b2..5db189a 100644
--- a/include/configs/M53017EVB.h
+++ b/include/configs/M53017EVB.h
@@ -53,7 +53,6 @@
 #define CONFIG_MCFTMR
 
 /* I2C */
-#define CONFIG_SYS_IMMR			CONFIG_SYS_MBAR
 
 #define CONFIG_UDP_CHECKSUM
 
diff --git a/include/configs/M5329EVB.h b/include/configs/M5329EVB.h
index f172db0..16343b5 100644
--- a/include/configs/M5329EVB.h
+++ b/include/configs/M5329EVB.h
@@ -47,7 +47,6 @@
 #define CONFIG_MCFTMR
 
 /* I2C */
-#define CONFIG_SYS_IMMR		CONFIG_SYS_MBAR
 
 #define CONFIG_UDP_CHECKSUM
 
diff --git a/include/configs/M5373EVB.h b/include/configs/M5373EVB.h
index ddcd752..ccc59eb 100644
--- a/include/configs/M5373EVB.h
+++ b/include/configs/M5373EVB.h
@@ -49,7 +49,6 @@
 #define CONFIG_MCFTMR
 
 /* I2C */
-#define CONFIG_SYS_IMMR		CONFIG_SYS_MBAR
 
 #define CONFIG_UDP_CHECKSUM
 
diff --git a/include/configs/astro_mcf5373l.h b/include/configs/astro_mcf5373l.h
index 1af3438..d87ca30 100644
--- a/include/configs/astro_mcf5373l.h
+++ b/include/configs/astro_mcf5373l.h
@@ -58,7 +58,6 @@
 #define CONFIG_MCFTMR
 
 /* I2C */
-#define CONFIG_SYS_IMMR			CONFIG_SYS_MBAR
 
 /*
  * Defines processor clock - important for correct timings concerning serial
diff --git a/include/configs/eb_cpu5282.h b/include/configs/eb_cpu5282.h
index bf1cfc3..62b62e0 100644
--- a/include/configs/eb_cpu5282.h
+++ b/include/configs/eb_cpu5282.h
@@ -185,8 +185,6 @@
  * I2C
  */
 
-#define CONFIG_SYS_IMMR			CONFIG_SYS_MBAR
-
 #ifdef CONFIG_CMD_DATE
 #define CONFIG_RTC_DS1338
 #define CONFIG_I2C_RTC_ADDR		0x68
diff --git a/include/mpc85xx.h b/include/mpc85xx.h
index ce6d083..2c69a60 100644
--- a/include/mpc85xx.h
+++ b/include/mpc85xx.h
@@ -60,8 +60,4 @@
 #define CONFIG_SYS_CCSRBAR_PHYS ((CONFIG_SYS_CCSRBAR_PHYS_HIGH * 1ull) << 32 | \
 				 CONFIG_SYS_CCSRBAR_PHYS_LOW)
 
-#ifndef CONFIG_SYS_IMMR
-#define CONFIG_SYS_IMMR			CONFIG_SYS_CCSRBAR
-#endif
-
 #endif	/* __MPC85xx_H__ */