// SPDX-License-Identifier: GPL-2.0
/*
 * Common AM625 SK dts file for SPLs
 * Copyright (C) 2021-2022 Texas Instruments Incorporated - https://www.ti.com/
 */

/ {
	chosen {
		stdout-path = "serial2:115200n8";
		tick-timer = &timer1;
	};

	aliases {
		mmc1 = &sdhci1;
	};

	memory@80000000 {
		bootph-pre-ram;
	};
};

&cbass_main{
	bootph-pre-ram;

	timer1: timer@2400000 {
		compatible = "ti,omap5430-timer";
		reg = <0x00 0x2400000 0x00 0x80>;
		ti,timer-alwon;
		clock-frequency = <25000000>;
		bootph-pre-ram;
	};
};

&dmss {
	bootph-pre-ram;
};

&secure_proxy_main {
	bootph-pre-ram;
};

&dmsc {
	bootph-pre-ram;
};

&k3_pds {
	bootph-pre-ram;
};

&k3_clks {
	bootph-pre-ram;
};

&k3_reset {
	bootph-pre-ram;
};

&wkup_conf {
	bootph-pre-ram;
};

&chipid {
	bootph-pre-ram;
};

&main_pmx0 {
	bootph-pre-ram;
};

&main_uart0 {
	bootph-pre-ram;
};

&main_uart0_pins_default {
	bootph-pre-ram;
};

&main_uart1 {
	bootph-pre-ram;
};

&cbass_mcu {
	bootph-pre-ram;
};

&cbass_wakeup {
	bootph-pre-ram;
};

&mcu_pmx0 {
	bootph-pre-ram;
};

&wkup_uart0 {
	bootph-pre-ram;
};

&sdhci1 {
	bootph-pre-ram;
};

&main_mmc1_pins_default {
	bootph-pre-ram;
};

&fss {
	bootph-pre-ram;
};

&ospi0_pins_default {
	bootph-pre-ram;
};

&ospi0 {
	bootph-pre-ram;

	flash@0 {
		bootph-pre-ram;

		partitions {
			bootph-pre-ram;

			partition@3fc0000 {
				bootph-pre-ram;
			};
		};
	};
};

&cpsw3g {
	reg = <0x0 0x8000000 0x0 0x200000>,
	      <0x0 0x43000200 0x0 0x8>;
	reg-names = "cpsw_nuss", "mac_efuse";
	/delete-property/ ranges;
	bootph-pre-ram;

	cpsw-phy-sel@04044 {
		compatible = "ti,am64-phy-gmii-sel";
		reg = <0x0 0x00104044 0x0 0x8>;
		bootph-pre-ram;
	};
};

&cpsw_port1 {
	bootph-pre-ram;
};

&cpsw_port2 {
	status = "disabled";
};