Merge tag 'u-boot-nand-20240617' of https://source.denx.de/u-boot/custodians/u-boot-nand-flash
Pull request for u-boot-nand-20240617
The first patch is by Arseniy Krasnov and adds support for OTP area
access on MX30LFxG18AC chip series.
The second patch is by John Watts and adds MTD dependency in Kconfig
for UBI.
The last patch is by Ravi Minnikanti and fixes bitflip return value on
page read.
diff --git a/arch/arm/dts/rk3566-anbernic-rgxx3-u-boot.dtsi b/arch/arm/dts/rk3566-anbernic-rgxx3-u-boot.dtsi
index 793ed4a..c7e8498 100644
--- a/arch/arm/dts/rk3566-anbernic-rgxx3-u-boot.dtsi
+++ b/arch/arm/dts/rk3566-anbernic-rgxx3-u-boot.dtsi
@@ -4,7 +4,7 @@
/ {
chosen {
- u-boot,spl-boot-order = "same-as-spl", &sdmmc1, &sdmmc0;
+ u-boot,spl-boot-order = &sdmmc0, &sdhci;
};
};
diff --git a/arch/arm/mach-stm32mp/stm32mp1/psci.c b/arch/arm/mach-stm32mp/stm32mp1/psci.c
index 4f2379d..e991039 100644
--- a/arch/arm/mach-stm32mp/stm32mp1/psci.c
+++ b/arch/arm/mach-stm32mp/stm32mp1/psci.c
@@ -809,6 +809,27 @@
clrbits_le32(STM32_SYSCFG_BASE + SYSCFG_CMPCR, SYSCFG_CMPCR_SW_CTRL);
/*
+ * Make sure the OS would not get any spurious IWDG pretimeout IRQ
+ * right after the system wakes up. This may happen in case the SoC
+ * got woken up by another source than the IWDG pretimeout and the
+ * pretimeout IRQ arrived immediately afterward, but too late to be
+ * handled by the main loop above. In case either of the IWDG is
+ * enabled, ping it first and then return to the OS.
+ */
+
+ /* Ping IWDG1 and ACK pretimer IRQ */
+ if (gic_enabled[4] & BIT(22)) {
+ writel(IWDG_KR_RELOAD_KEY, STM32_IWDG1_BASE + IWDG_KR);
+ writel(IWDG_EWCR_EWIC, STM32_IWDG1_BASE + IWDG_EWCR);
+ }
+
+ /* Ping IWDG2 and ACK pretimer IRQ */
+ if (gic_enabled[4] & BIT(23)) {
+ writel(IWDG_KR_RELOAD_KEY, STM32_IWDG2_BASE + IWDG_KR);
+ writel(IWDG_EWCR_EWIC, STM32_IWDG2_BASE + IWDG_EWCR);
+ }
+
+ /*
* The system has resumed successfully. Rewrite LR register stored
* on stack with 'ep' value, so that on return from this PSCI call,
* the code would jump to that 'ep' resume entry point code path
diff --git a/board/anbernic/rgxx3_rk3566/rgxx3-rk3566.c b/board/anbernic/rgxx3_rk3566/rgxx3-rk3566.c
index 099eea6..5c57b90 100644
--- a/board/anbernic/rgxx3_rk3566/rgxx3-rk3566.c
+++ b/board/anbernic/rgxx3_rk3566/rgxx3-rk3566.c
@@ -6,14 +6,12 @@
#include <abuf.h>
#include <adc.h>
#include <asm/io.h>
-#include <command.h>
#include <display.h>
#include <dm.h>
#include <dm/lists.h>
#include <env.h>
#include <fdt_support.h>
#include <linux/delay.h>
-#include <linux/iopoll.h>
#include <mipi_dsi.h>
#include <mmc.h>
#include <panel.h>
@@ -21,8 +19,6 @@
#include <stdlib.h>
#include <video_bridge.h>
-#define BOOT_BROM_DOWNLOAD 0xef08a53c
-
#define GPIO0_BASE 0xfdd60000
#define GPIO4_BASE 0xfe770000
#define GPIO_SWPORT_DR_L 0x0000
@@ -36,14 +32,6 @@
#define GPIO_WRITEMASK(bits) ((bits) << 16)
-#define SARADC_BASE 0xfe720000
-#define SARADC_DATA 0x0000
-#define SARADC_STAS 0x0004
-#define SARADC_ADC_STATUS BIT(0)
-#define SARADC_CTRL 0x0008
-#define SARADC_INPUT_SRC_MSK 0x7
-#define SARADC_POWER_CTRL BIT(3)
-
#define DTB_DIR "rockchip/"
struct rg3xx_model {
@@ -170,63 +158,11 @@
};
/*
- * The device has internal eMMC, and while some devices have an exposed
- * clk pin you can ground to force a bypass not all devices do. As a
- * result it may be possible for some devices to become a perma-brick
- * if a corrupted TPL or SPL stage with a valid header is flashed to
- * the internal eMMC. Add functionality to read ADC channel 0 (the func
- * button) as early as possible in the boot process to provide some
- * protection against this. If we ever get an open TPL stage, we should
- * consider moving this function there.
- */
-void read_func_button(void)
-{
- int ret;
- u32 reg;
-
- /* Turn off SARADC to reset it. */
- writel(0, (SARADC_BASE + SARADC_CTRL));
-
- /* Enable channel 0 and power on SARADC. */
- writel(((0 & SARADC_INPUT_SRC_MSK) | SARADC_POWER_CTRL),
- (SARADC_BASE + SARADC_CTRL));
-
- /*
- * Wait for data to be ready. Use timeout of 20000us from
- * rockchip_saradc driver.
- */
- ret = readl_poll_timeout((SARADC_BASE + SARADC_STAS), reg,
- !(reg & SARADC_ADC_STATUS), 20000);
- if (ret) {
- printf("ADC Timeout");
- return;
- }
-
- /* Read the data from the SARADC. */
- reg = readl((SARADC_BASE + SARADC_DATA));
-
- /* Turn the SARADC back off so it's ready to be used again. */
- writel(0, (SARADC_BASE + SARADC_CTRL));
-
- /*
- * If the value is less than 30 the button is being pressed.
- * Reset the device back into Rockchip download mode.
- */
- if (reg <= 30) {
- printf("download key pressed, entering download mode...");
- writel(BOOT_BROM_DOWNLOAD, CONFIG_ROCKCHIP_BOOT_MODE_REG);
- do_reset(NULL, 0, 0, NULL);
- }
-};
-
-/*
* Start LED very early so user knows device is on. Set color
* to red.
*/
void spl_board_init(void)
{
- read_func_button();
-
/* Set GPIO0_C5, GPIO0_C6, and GPIO0_C7 to output. */
writel(GPIO_WRITEMASK(GPIO_C7 | GPIO_C6 | GPIO_C5) | \
(GPIO_C7 | GPIO_C6 | GPIO_C5),
diff --git a/board/bsh/imx8mn_smm_s2/ddr3l_timing_256m.c b/board/bsh/imx8mn_smm_s2/ddr3l_timing_256m.c
index 0da6418..33452d2 100644
--- a/board/bsh/imx8mn_smm_s2/ddr3l_timing_256m.c
+++ b/board/bsh/imx8mn_smm_s2/ddr3l_timing_256m.c
@@ -18,15 +18,15 @@
{ 0x3d400304, 0x1 },
{ 0x3d400030, 0x20 },
{ 0x3d400000, 0xa1040001 },
- { 0x3d400064, 0x610040 },
+ { 0x3d400064, 0x300040 },
{ 0x3d4000d0, 0xc00200c5 },
{ 0x3d4000d4, 0x1000b },
{ 0x3d4000dc, 0x1d700004 },
- { 0x3d4000e0, 0x180000 },
+ { 0x3d4000e0, 0x580000 },
{ 0x3d4000e4, 0x90000 },
- { 0x3d4000f0, 0x0 },
+ { 0x3d4000f0, 0x2 },
{ 0x3d4000f4, 0xee5 },
- { 0x3d400100, 0xc101b0e },
+ { 0x3d400100, 0xc100d0e },
{ 0x3d400104, 0x30314 },
{ 0x3d400108, 0x4060509 },
{ 0x3d40010c, 0x2006 },
@@ -67,10 +67,10 @@
{ 0x3d400498, 0x7ff },
{ 0x3d40049c, 0xe00 },
{ 0x3d4004a0, 0x7ff },
- { 0x3d402064, 0x28001b },
+ { 0x3d402064, 0x14001b },
{ 0x3d4020dc, 0x12200004 },
- { 0x3d4020e0, 0x0 },
- { 0x3d402100, 0x7090b07 },
+ { 0x3d4020e0, 0x400000 },
+ { 0x3d402100, 0x7090507 },
{ 0x3d402104, 0x20209 },
{ 0x3d402108, 0x3030407 },
{ 0x3d40210c, 0x2006 },
@@ -680,12 +680,13 @@
{ 0x54006, 0x140 },
{ 0x54007, 0x1000 },
{ 0x54008, 0x101 },
+ { 0x54009, 0x200 },
{ 0x5400b, 0x31f },
{ 0x5400c, 0xc8 },
{ 0x54012, 0x1 },
{ 0x5402f, 0x1d70 },
{ 0x54030, 0x4 },
- { 0x54031, 0x18 },
+ { 0x54031, 0x58 },
{ 0x5403a, 0x1323 },
{ 0xd0000, 0x1 },
};
@@ -700,11 +701,13 @@
{ 0x54006, 0x140 },
{ 0x54007, 0x1000 },
{ 0x54008, 0x101 },
+ { 0x54009, 0x200 },
{ 0x5400b, 0x21f },
{ 0x5400c, 0xc8 },
{ 0x54012, 0x1 },
{ 0x5402f, 0x1220 },
{ 0x54030, 0x4 },
+ { 0x54031, 0x40 },
{ 0x5403a, 0x1323 },
{ 0xd0000, 0x1 },
};
@@ -886,11 +889,11 @@
{ 0xd00e7, 0x400 },
{ 0x90017, 0x0 },
{ 0x90026, 0x2b },
- { 0x2000b, 0x32 },
+ { 0x2000b, 0x1c2 },
{ 0x2000c, 0x64 },
{ 0x2000d, 0x3e8 },
{ 0x2000e, 0x2c },
- { 0x12000b, 0x14 },
+ { 0x12000b, 0xbb },
{ 0x12000c, 0x26 },
{ 0x12000d, 0x1a1 },
{ 0x12000e, 0x10 },
diff --git a/board/bsh/imx8mn_smm_s2/ddr3l_timing_512m.c b/board/bsh/imx8mn_smm_s2/ddr3l_timing_512m.c
index f845395..ca14a47 100644
--- a/board/bsh/imx8mn_smm_s2/ddr3l_timing_512m.c
+++ b/board/bsh/imx8mn_smm_s2/ddr3l_timing_512m.c
@@ -18,15 +18,15 @@
{ 0x3d400304, 0x1 },
{ 0x3d400030, 0x20 },
{ 0x3d400000, 0xa1040001 },
- { 0x3d400064, 0x610068 },
+ { 0x3d400064, 0x300068 },
{ 0x3d4000d0, 0xc00200c5 },
{ 0x3d4000d4, 0x1000b },
{ 0x3d4000dc, 0x1d700004 },
- { 0x3d4000e0, 0x180000 },
+ { 0x3d4000e0, 0x580000 },
{ 0x3d4000e4, 0x90000 },
- { 0x3d4000f0, 0x0 },
+ { 0x3d4000f0, 0x2 },
{ 0x3d4000f4, 0xee5 },
- { 0x3d400100, 0xc101b0e },
+ { 0x3d400100, 0xc100d0e },
{ 0x3d400104, 0x30314 },
{ 0x3d400108, 0x4060509 },
{ 0x3d40010c, 0x2006 },
@@ -700,11 +700,13 @@
{ 0x54006, 0x140 },
{ 0x54007, 0x1000 },
{ 0x54008, 0x101 },
+ { 0x54009, 0x200 },
{ 0x5400b, 0x21f },
{ 0x5400c, 0xc8 },
{ 0x54012, 0x1 },
{ 0x5402f, 0x1220 },
{ 0x54030, 0x4 },
+ { 0x54031, 0x40 },
{ 0x5403a, 0x1323 },
{ 0xd0000, 0x1 },
};
@@ -886,11 +888,11 @@
{ 0xd00e7, 0x400 },
{ 0x90017, 0x0 },
{ 0x90026, 0x2b },
- { 0x2000b, 0x32 },
+ { 0x2000b, 0x1c2 },
{ 0x2000c, 0x64 },
{ 0x2000d, 0x3e8 },
{ 0x2000e, 0x2c },
- { 0x12000b, 0x14 },
+ { 0x12000b, 0xbb },
{ 0x12000c, 0x26 },
{ 0x12000d, 0x1a1 },
{ 0x12000e, 0x10 },
diff --git a/boot/bootm.c b/boot/bootm.c
index 032f5a4..9879e1b 100644
--- a/boot/bootm.c
+++ b/boot/bootm.c
@@ -964,7 +964,7 @@
goto unmap_initrd;
if (IS_ENABLED(CONFIG_MEASURE_DEVICETREE)) {
- ret = tcg2_measure_data(dev, &elog, 0, images->ft_len,
+ ret = tcg2_measure_data(dev, &elog, 1, images->ft_len,
(u8 *)images->ft_addr,
EV_TABLE_OF_DEVICES,
strlen("dts") + 1,
diff --git a/doc/board/phytec/phycore-am62x.rst b/doc/board/phytec/phycore-am62x.rst
index bc6d524..681ac53 100644
--- a/doc/board/phytec/phycore-am62x.rst
+++ b/doc/board/phytec/phycore-am62x.rst
@@ -155,4 +155,4 @@
-------------------
Please see :doc:`../ti/am62x_sk` chapter for further AM62 SoC related documentation
-and https://docs.phytec.com/phycore-am62x for vendor documentation.
+and https://docs.phytec.com/projects/yocto-phycore-am62x/en/latest/ for vendor documentation.
diff --git a/doc/board/phytec/phycore-am64x.rst b/doc/board/phytec/phycore-am64x.rst
index a27ad01..ad9f47d 100644
--- a/doc/board/phytec/phycore-am64x.rst
+++ b/doc/board/phytec/phycore-am64x.rst
@@ -9,7 +9,7 @@
with different carrier boards. This module can come with different sizes and
models for DDR, eMMC, SPI NOR Flash and various SoCs from the AM64x family.
-A development Kit, called `phyBOARD-Lyra <https://www.phytec.com/product/phyboard-am64x>`_
+A development Kit, called `phyBOARD-Electra <https://www.phytec.com/product/phyboard-am64x>`_
is used as a carrier board reference design around the AM64x SoM.
Quickstart
@@ -156,4 +156,4 @@
-------------------
Please see :doc:`../ti/am64x_evm` chapter for further AM64 SoC related documentation
-and https://docs.phytec.com/phycore-am64x for vendor documentation.
+and https://docs.phytec.com/projects/yocto-phycore-am64x/en/latest/ for vendor documentation.
diff --git a/doc/usage/fit/signature.rst b/doc/usage/fit/signature.rst
index 03a71b5..b868dcb 100644
--- a/doc/usage/fit/signature.rst
+++ b/doc/usage/fit/signature.rst
@@ -15,7 +15,7 @@
key is kept secret and the public key is stored in a non-volatile place,
any image can be verified in this way.
-See verified-boot.txt for more general information on verified boot.
+See :doc:`verified-boot` for more general information on verified boot.
Concepts
diff --git a/doc/usage/measured_boot.rst b/doc/usage/measured_boot.rst
index 9691904..05c439e 100644
--- a/doc/usage/measured_boot.rst
+++ b/doc/usage/measured_boot.rst
@@ -7,19 +7,46 @@
of the boot process, extending the results in the TPM and logging the
component's measurement in memory for the operating system to consume.
+The functionality is available when booting via the EFI subsystem or 'bootm'
+command.
+
+UEFI measured boot
+------------------
+
+The EFI subsystem implements the `EFI TCG protocol
+<https://trustedcomputinggroup.org/resource/tcg-efi-protocol-specification/>`_
+and the `TCG PC Client Specific Platform Firmware Profile Specification
+<https://trustedcomputinggroup.org/resource/pc-client-specific-platform-firmware-profile-specification/>`_
+which defines the binaries to be measured and the corresponding PCRs to be used.
+
+Requirements
+~~~~~~~~~~~~
+
+* A hardware TPM 2.0 supported by an enabled U-Boot driver
+* CONFIG_EFI_TCG2_PROTOCOL=y
+* CONFIG_EFI_TCG2_PROTOCOL_EVENTLOG_SIZE=y
+* optional CONFIG_EFI_TCG2_PROTOCOL_MEASURE_DTB=y will measure the loaded DTB
+ in PCR 1
+
+Legacy measured boot
+--------------------
+
+The commands booti, bootm, and bootz can be used for measured boot
+using the legacy entry point of the Linux kernel.
+
By default, U-Boot will measure the operating system (linux) image, the
initrd image, and the "bootargs" environment variable. By enabling
-CONFIG_MEASURE_DEVICETREE, U-Boot will also measure the devicetree image.
+CONFIG_MEASURE_DEVICETREE, U-Boot will also measure the devicetree image in PCR1.
The operating system typically would verify that the hashes found in the
TPM PCRs match the contents of the event log. This can further be checked
against the hash results of previous boots.
Requirements
-------------
+~~~~~~~~~~~~
-* A hardware TPM 2.0 supported by the U-Boot drivers
-* CONFIG_TPM=y
+* A hardware TPM 2.0 supported by an enabled U-Boot driver
+* CONFIG_TPMv2=y
* CONFIG_MEASURED_BOOT=y
* Device-tree configuration of the TPM device to specify the memory area
for event logging. The TPM device node must either contain a phandle to
diff --git a/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c b/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c
index 8ef0899..8245b85 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c
@@ -14,10 +14,10 @@
#include <linux/libfdt.h>
#include "pinctrl-rockchip.h"
+#include <dt-bindings/pinctrl/rockchip.h>
#define MAX_ROCKCHIP_PINS_ENTRIES 30
#define MAX_ROCKCHIP_GPIO_PER_BANK 32
-#define RK_FUNC_GPIO 0
static int rockchip_verify_config(struct udevice *dev, u32 bank, u32 pin)
{
@@ -132,8 +132,12 @@
if (bank->iomux[iomux_num].type & IOMUX_GPIO_ONLY)
return RK_FUNC_GPIO;
- regmap = (bank->iomux[iomux_num].type & IOMUX_SOURCE_PMU)
- ? priv->regmap_pmu : priv->regmap_base;
+ if (bank->iomux[iomux_num].type & IOMUX_SOURCE_PMU)
+ regmap = priv->regmap_pmu;
+ else if (bank->iomux[iomux_num].type & IOMUX_L_SOURCE_PMU)
+ regmap = (pin % 8 < 4) ? priv->regmap_pmu : priv->regmap_base;
+ else
+ regmap = priv->regmap_base;
/* get basic quadrupel of mux registers and the correct reg inside */
mux_type = bank->iomux[iomux_num].type;
@@ -143,6 +147,28 @@
if (bank->recalced_mask & BIT(pin))
rockchip_get_recalced_mux(bank, pin, ®, &bit, &mask);
+ if (IS_ENABLED(CONFIG_ROCKCHIP_RK3588)) {
+ if (bank->bank_num == 0) {
+ if (pin >= RK_PB4 && pin <= RK_PD7) {
+ u32 reg0 = 0;
+
+ reg0 = reg + 0x4000 - 0xC; /* PMU2_IOC_BASE */
+ ret = regmap_read(regmap, reg0, &val);
+ if (ret)
+ return ret;
+
+ ret = ((val >> bit) & mask);
+ if (ret != 8)
+ return ret;
+
+ reg = reg + 0x8000; /* BUS_IOC_BASE */
+ regmap = priv->regmap_base;
+ }
+ } else if (bank->bank_num > 0) {
+ reg += 0x8000; /* BUS_IOC_BASE */
+ }
+ }
+
ret = regmap_read(regmap, reg, &val);
if (ret)
return ret;
@@ -172,7 +198,7 @@
}
if (bank->iomux[iomux_num].type & IOMUX_GPIO_ONLY) {
- if (mux != IOMUX_GPIO_ONLY) {
+ if (mux != RK_FUNC_GPIO) {
debug("pin %d only supports a gpio mux\n", pin);
return -ENOTSUPP;
}
@@ -532,12 +558,14 @@
/* preset iomux offset value, set new start value */
if (iom->offset >= 0) {
- if (iom->type & IOMUX_SOURCE_PMU)
+ if ((iom->type & IOMUX_SOURCE_PMU) ||
+ (iom->type & IOMUX_L_SOURCE_PMU))
pmu_offs = iom->offset;
else
grf_offs = iom->offset;
} else { /* set current iomux offset */
- iom->offset = (iom->type & IOMUX_SOURCE_PMU) ?
+ iom->offset = ((iom->type & IOMUX_SOURCE_PMU) ||
+ (iom->type & IOMUX_L_SOURCE_PMU)) ?
pmu_offs : grf_offs;
}
diff --git a/drivers/power/regulator/rk8xx.c b/drivers/power/regulator/rk8xx.c
index 1bd4605..3125835 100644
--- a/drivers/power/regulator/rk8xx.c
+++ b/drivers/power/regulator/rk8xx.c
@@ -520,7 +520,7 @@
if (ret < 0)
return ret;
- return ret & mask ? true : false;
+ return (ret & mask) ? true : false;
}
static int _buck_set_suspend_enable(struct udevice *pmic, int buck, bool enable)
@@ -585,7 +585,7 @@
val = pmic_reg_read(pmic, RK816_REG_DCDC_SLP_EN);
if (val < 0)
return val;
- ret = val & mask ? 1 : 0;
+ ret = (val & mask) ? 1 : 0;
break;
case RK806_ID:
{
@@ -608,7 +608,7 @@
val = pmic_reg_read(pmic, REG_SLEEP_SET_OFF1);
if (val < 0)
return val;
- ret = val & mask ? 0 : 1;
+ ret = (val & mask) ? 0 : 1;
break;
case RK809_ID:
case RK817_ID:
@@ -620,7 +620,7 @@
val = pmic_reg_read(pmic, RK817_POWER_SLP_EN(0));
if (val < 0)
return val;
- ret = val & mask ? 1 : 0;
+ ret = (val & mask) ? 1 : 0;
break;
default:
ret = -EINVAL;
@@ -723,7 +723,7 @@
if (ret < 0)
return ret;
- return ret & mask ? true : false;
+ return (ret & mask) ? true : false;
}
static int _nldo_get_enable(struct udevice *pmic, int nldo)
@@ -980,7 +980,7 @@
val = pmic_reg_read(pmic, RK816_REG_LDO_SLP_EN);
if (val < 0)
return val;
- ret = val & mask ? 1 : 0;
+ ret = (val & mask) ? 1 : 0;
break;
case RK808_ID:
case RK818_ID:
@@ -988,7 +988,7 @@
val = pmic_reg_read(pmic, REG_SLEEP_SET_OFF2);
if (val < 0)
return val;
- ret = val & mask ? 0 : 1;
+ ret = (val & mask) ? 0 : 1;
break;
case RK809_ID:
case RK817_ID:
@@ -997,13 +997,13 @@
val = pmic_reg_read(pmic, RK817_POWER_SLP_EN(0));
if (val < 0)
return val;
- ret = val & mask ? 1 : 0;
+ ret = (val & mask) ? 1 : 0;
} else {
mask = 1 << ldo;
val = pmic_reg_read(pmic, RK817_POWER_SLP_EN(1));
if (val < 0)
return val;
- ret = val & mask ? 1 : 0;
+ ret = (val & mask) ? 1 : 0;
}
break;
}
@@ -1134,14 +1134,14 @@
return _buck_get_enable(dev->parent, buck);
}
-static int _ldo_get_value(struct udevice *dev, const struct rk8xx_reg_info *info)
+static int _ldo_get_value(struct udevice *pmic, const struct rk8xx_reg_info *info)
{
int mask = info->vsel_mask;
int ret, val;
if (info->vsel_reg == NA)
return -ENOSYS;
- ret = pmic_reg_read(dev->parent, info->vsel_reg);
+ ret = pmic_reg_read(pmic, info->vsel_reg);
if (ret < 0)
return ret;
val = ret & mask;
@@ -1154,7 +1154,7 @@
int ldo = dev->driver_data - 1;
const struct rk8xx_reg_info *info = get_ldo_reg(dev->parent, ldo, 0);
- return _ldo_get_value(dev, info);
+ return _ldo_get_value(dev->parent, info);
}
static int nldo_get_value(struct udevice *dev)
@@ -1162,7 +1162,7 @@
int nldo = dev->driver_data - 1;
const struct rk8xx_reg_info *info = get_nldo_reg(dev->parent, nldo, 0);
- return _ldo_get_value(dev, info);
+ return _ldo_get_value(dev->parent, info);
}
static int pldo_get_value(struct udevice *dev)
@@ -1170,10 +1170,10 @@
int pldo = dev->driver_data - 1;
const struct rk8xx_reg_info *info = get_pldo_reg(dev->parent, pldo, 0);
- return _ldo_get_value(dev, info);
+ return _ldo_get_value(dev->parent, info);
}
-static int _ldo_set_value(struct udevice *dev, const struct rk8xx_reg_info *info, int uvolt)
+static int _ldo_set_value(struct udevice *pmic, const struct rk8xx_reg_info *info, int uvolt)
{
int mask = info->vsel_mask;
int val;
@@ -1189,7 +1189,7 @@
debug("%s: volt=%d, reg=0x%x, mask=0x%x, val=0x%x\n",
__func__, uvolt, info->vsel_reg, mask, val);
- return pmic_clrsetbits(dev->parent, info->vsel_reg, mask, val);
+ return pmic_clrsetbits(pmic, info->vsel_reg, mask, val);
}
static int ldo_set_value(struct udevice *dev, int uvolt)
@@ -1197,7 +1197,7 @@
int ldo = dev->driver_data - 1;
const struct rk8xx_reg_info *info = get_ldo_reg(dev->parent, ldo, uvolt);
- return _ldo_set_value(dev, info, uvolt);
+ return _ldo_set_value(dev->parent, info, uvolt);
}
static int nldo_set_value(struct udevice *dev, int uvolt)
@@ -1205,7 +1205,7 @@
int nldo = dev->driver_data - 1;
const struct rk8xx_reg_info *info = get_nldo_reg(dev->parent, nldo, uvolt);
- return _ldo_set_value(dev, info, uvolt);
+ return _ldo_set_value(dev->parent, info, uvolt);
}
static int pldo_set_value(struct udevice *dev, int uvolt)
@@ -1213,10 +1213,10 @@
int pldo = dev->driver_data - 1;
const struct rk8xx_reg_info *info = get_pldo_reg(dev->parent, pldo, uvolt);
- return _ldo_set_value(dev, info, uvolt);
+ return _ldo_set_value(dev->parent, info, uvolt);
}
-static int _ldo_set_suspend_value(struct udevice *dev, const struct rk8xx_reg_info *info, int uvolt)
+static int _ldo_set_suspend_value(struct udevice *pmic, const struct rk8xx_reg_info *info, int uvolt)
{
int mask = info->vsel_mask;
int val;
@@ -1232,7 +1232,7 @@
debug("%s: volt=%d, reg=0x%x, mask=0x%x, val=0x%x\n",
__func__, uvolt, info->vsel_sleep_reg, mask, val);
- return pmic_clrsetbits(dev->parent, info->vsel_sleep_reg, mask, val);
+ return pmic_clrsetbits(pmic, info->vsel_sleep_reg, mask, val);
}
static int ldo_set_suspend_value(struct udevice *dev, int uvolt)
@@ -1259,7 +1259,7 @@
return _ldo_set_suspend_value(dev->parent, info, uvolt);
}
-static int _ldo_get_suspend_value(struct udevice *dev, const struct rk8xx_reg_info *info)
+static int _ldo_get_suspend_value(struct udevice *pmic, const struct rk8xx_reg_info *info)
{
int mask = info->vsel_mask;
int val, ret;
@@ -1267,7 +1267,7 @@
if (info->vsel_sleep_reg == NA)
return -ENOSYS;
- ret = pmic_reg_read(dev->parent, info->vsel_sleep_reg);
+ ret = pmic_reg_read(pmic, info->vsel_sleep_reg);
if (ret < 0)
return ret;
@@ -1438,7 +1438,7 @@
if (ret < 0)
return ret;
- return ret & mask ? true : false;
+ return (ret & mask) ? true : false;
}
static int switch_set_suspend_value(struct udevice *dev, int uvolt)
@@ -1493,21 +1493,21 @@
val = pmic_reg_read(dev->parent, REG_SLEEP_SET_OFF1);
if (val < 0)
return val;
- ret = val & mask ? 0 : 1;
+ ret = (val & mask) ? 0 : 1;
break;
case RK809_ID:
mask = 1 << (sw + 6);
val = pmic_reg_read(dev->parent, RK817_POWER_SLP_EN(0));
if (val < 0)
return val;
- ret = val & mask ? 1 : 0;
+ ret = (val & mask) ? 1 : 0;
break;
case RK818_ID:
mask = 1 << 6;
val = pmic_reg_read(dev->parent, REG_SLEEP_SET_OFF1);
if (val < 0)
return val;
- ret = val & mask ? 0 : 1;
+ ret = (val & mask) ? 0 : 1;
break;
}
diff --git a/include/bootmeth.h b/include/bootmeth.h
index 0fc3610..9f94f8c 100644
--- a/include/bootmeth.h
+++ b/include/bootmeth.h
@@ -40,7 +40,7 @@
/**
* get_state_desc() - get detailed state information
*
- * Prodecues a textual description of the state of the bootmeth. This
+ * Produces a textual description of the state of the boot method. This
* can include newline characters if it extends to multiple lines. It
* must be a nul-terminated string.
*
@@ -138,7 +138,7 @@
* @dev: Bootmethod device to boot
* @bflow: Bootflow to boot
* Return: does not return on success, since it should boot the
- * Operating Systemn. Returns -EFAULT if that fails, -ENOTSUPP if
+ * operating system. Returns -EFAULT if that fails, -ENOTSUPP if
* trying method resulted in finding out that is not actually
* supported for this boot and should not be tried again unless
* something changes, other -ve on other error
@@ -151,7 +151,7 @@
/**
* bootmeth_get_state_desc() - get detailed state information
*
- * Prodecues a textual description of the state of the bootmeth. This
+ * Produces a textual description of the state of the boot method. This
* can include newline characters if it extends to multiple lines. It
* must be a nul-terminated string.
*
@@ -244,7 +244,7 @@
* @dev: Bootmethod device to use
* @bflow: Bootflow to read
* Return: does not return on success, since it should boot the
- * Operating Systemn. Returns -EFAULT if that fails, other -ve on
+ * operating system. Returns -EFAULT if that fails, other -ve on
* other error
*/
int bootmeth_read_all(struct udevice *dev, struct bootflow *bflow);
@@ -255,7 +255,7 @@
* @dev: Bootmethod device to boot
* @bflow: Bootflow to boot
* Return: does not return on success, since it should boot the
- * Operating Systemn. Returns -EFAULT if that fails, other -ve on
+ * operating system. Returns -EFAULT if that fails, other -ve on
* other error
*/
int bootmeth_boot(struct udevice *dev, struct bootflow *bflow);
@@ -264,7 +264,7 @@
* bootmeth_setup_iter_order() - Set up the ordering of bootmeths to scan
*
* This sets up the ordering information in @iter, based on the selected
- * ordering of the bootmethds in bootstd_priv->bootmeth_order. If there is no
+ * ordering of the boot methods in bootstd_priv->bootmeth_order. If there is no
* ordering there, then all bootmethods are added
*
* @iter: Iterator to update with the order
diff --git a/lib/efi_loader/efi_tcg2.c b/lib/efi_loader/efi_tcg2.c
index 945aafb..d56bd56 100644
--- a/lib/efi_loader/efi_tcg2.c
+++ b/lib/efi_loader/efi_tcg2.c
@@ -1331,7 +1331,7 @@
sha256_update(&hash_ctx, (u8 *)dtb + fdt_off_mem_rsvmap(dtb), rsvmap_size);
sha256_finish(&hash_ctx, blob->data + blob->blob_description_size);
- ret = measure_event(dev, 0, EV_POST_CODE, event_size, (u8 *)blob);
+ ret = measure_event(dev, 1, EV_POST_CODE, event_size, (u8 *)blob);
free(blob);
return ret;
diff --git a/tools/rkcommon.c b/tools/rkcommon.c
index 12c27b3..3e52236 100644
--- a/tools/rkcommon.c
+++ b/tools/rkcommon.c
@@ -470,7 +470,7 @@
* If no 'imagename' is specified via the commandline (e.g. if this is
* 'dumpimage -l' w/o any further constraints), we accept any spl_info.
*/
- if (params->imagename == NULL)
+ if (params->imagename == NULL || !strlen(params->imagename))
return 0;
/* Match the 'imagename' against the 'spl_hdr' found */
