xive: Fix NSR value when dumping the state of thread context
There's no reason to skip 2 bits when printing the Notification Source
Register (NSR) of any thread context ring. So it's got to be a silly
mistake and we should shift by 56 bits and not 58 :-)
Signed-off-by: Frederic Barrat <fbarrat@linux.ibm.com>
Reviewed-by: Dan Horák <dan@danny.cz>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Reza Arbab <arbab@linux.ibm.com>
diff --git a/hw/xive.c b/hw/xive.c
index 34b92f1..6055276 100644
--- a/hw/xive.c
+++ b/hw/xive.c
@@ -4971,7 +4971,7 @@
" W2 W3\n", pir);
prlog(PR_INFO, "CPU[%04x]: %02x %02x %02x %02x %02x "
"%02x %02x %02x %08x %08x\n", pir,
- (uint8_t)(v0 >> 58) & 0xff, (uint8_t)(v0 >> 48) & 0xff,
+ (uint8_t)(v0 >> 56) & 0xff, (uint8_t)(v0 >> 48) & 0xff,
(uint8_t)(v0 >> 40) & 0xff, (uint8_t)(v0 >> 32) & 0xff,
(uint8_t)(v0 >> 24) & 0xff, (uint8_t)(v0 >> 16) & 0xff,
(uint8_t)(v0 >> 8) & 0xff, (uint8_t)(v0 ) & 0xff,
diff --git a/hw/xive2.c b/hw/xive2.c
index ea55423..8e2a1f2 100644
--- a/hw/xive2.c
+++ b/hw/xive2.c
@@ -4464,7 +4464,7 @@
" W2 W3\n", pir);
prlog(PR_INFO, "CPU[%04x]: %02x %02x %02x %02x %02x "
"%02x %02x %02x %08x %08x\n", pir,
- (uint8_t)(v0 >> 58) & 0xff, (uint8_t)(v0 >> 48) & 0xff,
+ (uint8_t)(v0 >> 56) & 0xff, (uint8_t)(v0 >> 48) & 0xff,
(uint8_t)(v0 >> 40) & 0xff, (uint8_t)(v0 >> 32) & 0xff,
(uint8_t)(v0 >> 24) & 0xff, (uint8_t)(v0 >> 16) & 0xff,
(uint8_t)(v0 >> 8) & 0xff, (uint8_t)(v0 ) & 0xff,
