chiptod: properly zero TB SPR when cleaning up for invalid TB
The existing sequence writes TBU twice and leaves TBL unchanged. This
may not really matter if it's being resynced from the chiptod soon, but
it's possible it could clear a parity error.
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
diff --git a/hw/chiptod.c b/hw/chiptod.c
index 7c0a1ff..736bd03 100644
--- a/hw/chiptod.c
+++ b/hw/chiptod.c
@@ -1556,8 +1556,9 @@
* restored after the next rendez-vous
*/
if (!(tfmr & SPR_TFMR_TB_VALID)) {
+ mtspr(SPR_TBWL, 0);
mtspr(SPR_TBWU, 0);
- mtspr(SPR_TBWU, 0);
+ mtspr(SPR_TBWL, 0);
}
}
