commit bfdb3f86e9116fc79ce63c231373b084aad11218
author Matt DeVillier <matt.devillier@gmail.com> Fri Aug 12 14:21:58 2016 -0500
committer Gerd Hoffmann <kraxel@redhat.com> Tue Mar 17 15:39:26 2020 +0100
tree 75a6f98c66b807d4a04edc18462dece3b051056e
parent 29ee1fb85cf07eaa38eba5df49b86419cacc205d

ps2port: adjust init routine to fix PS/2 keyboard issues

PS/2 keyboards on Chromebooks with upstream coreboot + SeaBIOS often
fail to init properly / register keystrokes.  Modify ps2port init
to match that of TianoCore, which doesn't have said issues.

Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de>
Message-Id: <248435f9-c169-e1db-fc3e-62185b74899c@molgen.mpg.de>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>

src/hw/ps2port.c

diff --git a/src/hw/ps2port.c b/src/hw/ps2port.c
index 88b1059..2c334c0 100644
--- a/src/hw/ps2port.c
+++ b/src/hw/ps2port.c
@@ -465,6 +465,14 @@
     if (ret)
         return;
 
+    // Disable KB/mouse interfaces
+    ret = i8042_command(I8042_CMD_KBD_DISABLE, NULL);
+    if (ret)
+        return;
+    ret = i8042_command(I8042_CMD_AUX_DISABLE, NULL);
+    if (ret)
+        return;
+
     // Controller self-test.
     u8 param[2];
     ret = i8042_command(I8042_CMD_CTL_TEST, param);
@@ -475,6 +483,11 @@
         return;
     }
 
+    // KB write CMD
+    ret = i8042_command(I8042_CMD_CTL_WCTR, NULL);
+    if (ret)
+        return;
+
     // Controller keyboard test.
     ret = i8042_command(I8042_CMD_KBD_TEST, param);
     if (ret)
@@ -505,11 +518,6 @@
         return;
     }
 
-    /* Disable keyboard */
-    ret = ps2_kbd_command(ATKBD_CMD_RESET_DIS, NULL);
-    if (ret)
-        return;
-
     // Set scancode command (mode 2)
     param[0] = 0x02;
     ret = ps2_kbd_command(ATKBD_CMD_SSCANSET, param);