parisc: Enable PSW_Q bit at bootup
Qemu currently only supports PSW_Q handling, so enable it by default.
Signed-off-by: Helge Deller <deller@gmx.de>
diff --git a/src/parisc/head.S b/src/parisc/head.S
index b578790..28541dd 100644
--- a/src/parisc/head.S
+++ b/src/parisc/head.S
@@ -101,6 +101,7 @@
.align 0x80
ENTRY(startup)
rsm PSW_I, %r0 /* disable local irqs */
+ ssm PSW_Q, %r0 /* enable PSW_Q flag */
/* Make sure space registers are set to zero */
mtsp %r0,%sr0
@@ -152,7 +153,7 @@
/* IDLE LOOP for SMP CPUs - wait for rendenzvous. */
mfctl CPU_HPA_CR_REG, %r25 /* get CPU HPA from cr7 */
- rsm PSW_I | PSW_Q, %r0 /* disable local irqs */
+ rsm PSW_I, %r0 /* disable local irqs */
mtctl %r0, CR_EIEM /* disable all external irqs */
/* EIRR : clear all pending external intr */
