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qemu / qemu / fea445e8fe9acea4f775a832815ee22bdf2b0222 / target / riscv / pmp.c
  1. 1a25e59 target/riscv: pmp: Ignore writes when RW=01 and MML=0 by Ivan Klokov · 1 year, 3 months ago
  2. 6f5bb7d target/riscv/pmp: Use hwaddr instead of target_ulong for RV32 by Ivan Klokov · 1 year, 4 months ago
  3. ac66f2f target/riscv: pmp: Ignore writes when RW=01 by Mayuresh Chitale · 1 year, 5 months ago
  4. 4bf501d target/riscv: pmp: Clear pmp/smepmp bits on reset by Mayuresh Chitale · 1 year, 5 months ago
  5. 095fe72 Add epmp to extensions list and rename it to smepmp by Himanshu Chauhan · 1 year, 5 months ago
  6. 4e3adce target/riscv/pmp.c: respect mseccfg.RLB for pmpaddrX changes by Leon Schuermann · 1 year, 6 months ago
  7. a574b27 target/riscv: Smepmp: Return error when access permission not allowed in PMP by Himanshu Chauhan · 1 year, 9 months ago
  8. 89fbbad target/riscv: Deny access if access is partially inside the PMP entry by Weiwei Li · 1 year, 10 months ago
  9. 1b63f2f target/riscv: Separate pmp_update_rule() in pmpcfg_csr_write by Weiwei Li · 1 year, 10 months ago
  10. e924074 target/riscv: Flush TLB only when pmpcfg/pmpaddr really changes by Weiwei Li · 1 year, 10 months ago
  11. 7c4c31f target/riscv: Flush TLB when pmpaddr is updated by Weiwei Li · 1 year, 10 months ago
  12. 2b3e127 target/riscv: Update the next rule addr in pmpaddr_csr_write() by Weiwei Li · 1 year, 10 months ago
  13. 37e7905 target/riscv: Flush TLB when MMWP or MML bits are changed by Weiwei Li · 1 year, 10 months ago
  14. 97ec5ae target/riscv: Remove unused paramters in pmp_hart_has_privs_default() by Weiwei Li · 1 year, 10 months ago
  15. b84ffd6 target/riscv: Make RLB/MML/MMWP bits writable only when Smepmp is enabled by Weiwei Li · 1 year, 10 months ago
  16. e9c3971 target/riscv: Change the return type of pmp_hart_has_privs() to bool by Weiwei Li · 1 year, 10 months ago
  17. 093ce83 target/riscv: Make the short cut really work in pmp_hart_has_privs by Weiwei Li · 1 year, 10 months ago
  18. dc7b599 target/riscv: Update pmp_get_tlb_size() by Weiwei Li · 1 year, 10 months ago
  19. 246f879 target/riscv: Fix lines with over 80 characters by Weiwei Li · 2 years ago
  20. 3b57254 target/riscv: Fix format for comments by Weiwei Li · 2 years ago
  21. c45eff3 target/riscv: Fix format for indentation by Weiwei Li · 2 years ago
  22. dcf654a target/riscv: remove RISCV_FEATURE_MMU by Daniel Henrique Barboza · 2 years, 1 month ago
  23. 3fe40ef target/riscv: remove RISCV_FEATURE_PMP by Daniel Henrique Barboza · 2 years, 1 month ago
  24. 6a3ffda target/riscv: remove RISCV_FEATURE_EPMP by Daniel Henrique Barboza · 2 years, 1 month ago
  25. 90b1faf target/riscv: Smepmp: Skip applying default rules when address matches by Himanshu Chauhan · 2 years, 1 month ago
  26. 824cac6 target/riscv: Fix PMP propagation for tlb by LIU Zhiwei · 2 years, 5 months ago
  27. 4756642 target/riscv: pmp: Fixup TLB size calculation by Alistair Francis · 2 years, 5 months ago
  28. 2e98339 target/riscv/pmp: guard against PMP ranges with a negative size by Nicolas Pitre · 2 years, 9 months ago
  29. 6248a8f target/riscv/pmp: fix NAPOT range computation overflow by Nicolas Pitre · 3 years ago
  30. 79f26b3 target/riscv: Adjust pmpcfg access with mxl by LIU Zhiwei · 3 years, 2 months ago
  31. b4cb178 target/riscv: pmp: Fix some typos by Bin Meng · 3 years, 9 months ago
  32. 787a4ba target/riscv/pmp: Add assert for ePMP operations by Alistair Francis · 3 years, 10 months ago
  33. 8ab6d3f target/riscv/pmp: Remove outdated comment by Alistair Francis · 3 years, 11 months ago
  34. ae39e4c target/riscv: Implementation of enhanced PMP (ePMP) by Hou Weiying · 3 years, 11 months ago
  35. 2582a95 target/riscv: Add ePMP CSR access functions by Hou Weiying · 3 years, 11 months ago
  36. 94c6ba8 target/riscv: Fix the PMP is locked check when using TOR by Alistair Francis · 3 years, 11 months ago
  37. 2c2e0f2 target/riscv: flush TLB pages if PMP permission has been changed by Jim Shu · 4 years, 1 month ago
  38. b297129 target/riscv: propagate PMP permission to TLB page by Jim Shu · 4 years, 1 month ago
  39. d102f19 target/riscv/pmp: Raise exception if no PMP entry is configured by Atish Patra · 4 years, 3 months ago
  40. 24beb03 target/riscv: Add PMP state description by Yifei Jiang · 4 years, 5 months ago
  41. af3fc19 target/riscv: Change the TLB page size depends on PMP entries. by Zong Li · 4 years, 8 months ago
  42. fdd33b8 riscv: Fix bug in setting pmpcfg CSR for RISCV64 by Hou Weiying · 4 years, 7 months ago
  43. cfad709 target/riscv: Fix pmp NA4 implementation by Alexandre Mergnat · 4 years, 8 months ago
  44. 1145188 target/riscv: Use a smaller guess size for no-MMU PMP by Alistair Francis · 4 years, 11 months ago
  45. 9667e53 target/riscv: PMP violation due to wrong size parameter by Dayeol Lee · 5 years ago
  46. 6591efb target/riscv/pmp: Convert qemu_log_mask(LOG_TRACE) to trace events by Philippe Mathieu-Daudé · 6 years ago
  47. 0b84b66 target/riscv/pmp: Restrict priviledged PMP to system-mode emulation by Philippe Mathieu-Daudé · 6 years ago
  48. f816206 RISC-V: Fix a PMP bug where it succeeds even if PMP entry is off by Hesham Almatary · 6 years ago
  49. cc0fdb2 RISC-V: Check for the effective memory privilege mode during PMP checks by Hesham Almatary · 6 years ago
  50. 49db9fa target/riscv: Fix PMP range boundary address bug by Dayeol Lee · 6 years ago
  51. a8d2532 Include qemu-common.h exactly where needed by Markus Armbruster · 6 years ago
  52. aad5ac2 riscv: pmp: Log pmp access errors as guest errors by Alistair Francis · 6 years ago
  53. 71a150b target/riscv/pmp.c: Fix pmp_decode_napot() by Anup Patel · 6 years ago
  54. 4a9b31b target/riscv/pmp.c: pmpcfg_csr_read returns bogus value on RV64 by Dayeol Lee · 6 years ago
  55. 65c5b75 RISC-V Physical Memory Protection by Michael Clark · 7 years ago