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qemu / qemu / fb48f71b3dc1d7eff8bea99e1e4c2f352362ca9f / tcg
  1. b1d8e52 Fix undeclared symbol warnings from sparse by blueswir1 · 16 years ago
  2. bdffd4a TCG: add tcg_const_local_tl() by aurel32 · 16 years ago
  3. f24cb33 TCG: add logical operations found on alpha and powerpc processors by aurel32 · 16 years ago
  4. d4a9eb1 Add some missing static and const qualifiers, reg_names only used if NDEBUG set by blueswir1 · 16 years ago
  5. 3ee1b85 Optimize 64 bit bswap by malc · 16 years ago
  6. 88422e2 Fix tcg_gen_concat32_i64 on 64-bit hosts. by pbrook · 16 years ago
  7. f8edcba Avoid clobbering input register in qemu_ld64+bswap+useronly case by malc · 16 years ago
  8. 945ca82 Add concat32_i64 and concat_tl_i64 ops by blueswir1 · 16 years ago
  9. 36aa55d Add concat_i32_i64 op. by pbrook · 16 years ago
  10. f48f3ed Display TCGCond name in tcg dumper (original patch by Tristan Gingold) by blueswir1 · 16 years ago
  11. 9d0efc8 Use 64 bit loads for tlb addend only if addend size is 64 bits by blueswir1 · 16 years ago
  12. baf8cc5 Fix stack alignment on Sparc32 host by blueswir1 · 16 years ago
  13. 733fef0 TCG: Use x86-64 zero extension instructions. by pbrook · 16 years ago
  14. b6d1715 Implement TCG sign extension ops for x86-64. by pbrook · 16 years ago
  15. 00dbbb0 Revert "TCG: enable debug" by aurel32 · 16 years ago
  16. b24a39f TCG: enable debug by aurel32 · 16 years ago
  17. 79383c9 Fix some warnings that would be generated by gcc -Wredundant-decls by blueswir1 · 17 years ago
  18. 70fa887 Relax qemu_ld/st constraints for !SOFTMMU case by malc · 17 years ago
  19. 735ee40 Relax qemu_ld/st constraints for !SOFTMMU case by malc · 17 years ago
  20. 109719e Avoid clobbering input/aliased registers in !SOFTMMU+64bit+bswap case by malc · 17 years ago
  21. 0b7c1d8 Clear the upper 32 bits of addr_reg in TARGET_LONG_BITS == 32 case by malc · 17 years ago
  22. a2a546b Move tcg_out_tlb_read into #ifdef CONFIG_SOFTMMU block to avoid compiler warning by malc · 17 years ago
  23. 8fcd369 Fix some warnings that would be generated by gcc -Wmissing-prototypes by blueswir1 · 17 years ago
  24. 6f41b77 Fix 64 bit constant generation by blueswir1 · 17 years ago
  25. 90cbed4 Fix 32 bit address overflow by blueswir1 · 17 years ago
  26. bffe143 Restore AREG0 after calls by blueswir1 · 17 years ago
  27. 56fc64d Sparc code generator update (fix qemu_ld & qemu_st) by blueswir1 · 17 years ago
  28. 53c3748 Sparc code generator update by blueswir1 · 17 years ago
  29. bf6bca5 Account for MacOS X ABI reserved space in linkage area (Andreas Faerber) by malc · 17 years ago
  30. f9bf298 Preliminary MacOS X on PPC32 support by malc · 17 years ago
  31. 5278154 On ppc32 make tb_set_jmp_target1 behave like it does on a ppc64 by malc · 17 years ago
  32. fe6f943 Immediate versions of some operations by malc · 17 years ago
  33. 000a2d8 Do not try handle "special" arguments of and/or/xor/shl/shr, upper level does it by malc · 17 years ago
  34. e924bbe Set the L field of CMP[L][I] when dealing with 64 bit quantities by malc · 17 years ago
  35. 880e52b Fix preprocessor guard condition by malc · 17 years ago
  36. 95153fd Remove leftover from previous way to load 64 bit constants by malc · 17 years ago
  37. 4a40e23 Special-case some paths inside tcg_out_tlb_read by malc · 17 years ago
  38. 301f6d9 Fix the opcode value of LWA by malc · 17 years ago
  39. e97b640 Try to avoid glibc global register mangling, again by blueswir1 · 17 years ago
  40. c070355 Relax memory operations constraints by malc · 17 years ago
  41. b01d9fe Fix qemu_ld64 constraint list by malc · 17 years ago
  42. e03ae7f Use proper offset for LR save slot by malc · 17 years ago
  43. 5424fd1 Reduce amount of space reserved for tb jump by malc · 17 years ago
  44. 6fc9dbc Fix and improve 64 bit immediate loading by malc · 17 years ago
  45. 450e62e Fix EXTSW arguments by malc · 17 years ago
  46. e7d05e6 Use proper value for TCG_TARGET_CALL_STACK_OFFSET by malc · 17 years ago
  47. a69abbe Emit and use adhoc function descriptor for code_gen_prologue on PPC64 by malc · 17 years ago
  48. 6926be2 Remove neg_i32 debugging leftover by malc · 17 years ago
  49. e46b968 Provide extNs_M instructions by malc · 17 years ago
  50. 1d58ee9 Remove stray "i" from mul_i64 by malc · 17 years ago
  51. 810260a Preliminary PPC64/Linux host support by malc · 17 years ago
  52. d643ccc 64 bit signed comparison fix (Juergen Lock) by bellard · 17 years ago
  53. d795eb8 Fix 64 bit constant generation by blueswir1 · 17 years ago
  54. e924c48 Fuse EQ and NE handling in tcg_out_brcond2 by malc · 17 years ago
  55. 8c5e95d Mask LL portion of B to 24 bits in tcg_out_b (Thanks to Thiemo Seufer) by malc · 17 years ago
  56. a50f5b9 Suppress bogus compiler warnings. by pbrook · 17 years ago
  57. ca88500 According to gcc-4.3.0/gcc/config/rs6000/crtsavres.asm R13 is volatile by malc · 17 years ago
  58. a35e86c Shuffle contents of tcg_target_reg_alloc_order by malc · 17 years ago
  59. 17ca26e Save LR into proper place on callers stack frame by malc · 17 years ago
  60. c596def Reimplement brcond2 and refactor brcond by malc · 17 years ago
  61. 8df1ca4 Allocate register pair for 64-bit registers on 32-bit host. by ths · 17 years ago
  62. 0d5bd36 Remove stray variable by malc · 17 years ago
  63. 77b73de Use rem/div[u]_i32 drop div[u]2_i32 by malc · 17 years ago
  64. fa4fbfb Emit trampolines manually in prologue by malc · 17 years ago
  65. 5d79488 Fix test for signed div fast path by malc · 17 years ago
  66. 398ce98 Fix div[u]2. by malc · 17 years ago
  67. 0a878c4 PPC TCG Fixes by malc · 17 years ago
  68. c588979 Allocate a register pair instead of a single register. by ths · 17 years ago
  69. 1235fc0 Spelling fixes, by Stefan Weil. by ths · 17 years ago
  70. 932a690 support of long calls for PPC (malc) by bellard · 17 years ago
  71. f3f478a Fix signed/unsigned issues of immediate version of brcond (malc) by bellard · 17 years ago
  72. 2662e13 ppc TCG target (malc) by bellard · 17 years ago
  73. 560f92c jump simplification by bellard · 17 years ago
  74. affa326 jump optimizations by bellard · 17 years ago
  75. 0a6b7b7 update by bellard · 17 years ago
  76. b314f27 suppressed unused macro handling by bellard · 17 years ago
  77. 641d5fb added local temporaries by bellard · 17 years ago
  78. 8384dd6 Implement byte swapping accesses by blueswir1 · 17 years ago
  79. 9b7b85d Fix off-by-one unwinding error. by pbrook · 17 years ago
  80. d0660ed Relax a constraint for qemu_ld64 on ARM host. by balrog · 17 years ago
  81. eae6ce5 Fix a deadly typo, correct comments. by balrog · 17 years ago
  82. 3979144 Fix ARM host TLB. by pbrook · 17 years ago
  83. b101234 Implement 64-bit constant loads by blueswir1 · 17 years ago
  84. 26cc915 Use sethi and arith functions, fix comment by blueswir1 · 17 years ago
  85. 77fcd09 Fix stack offsets and alignment by blueswir1 · 17 years ago
  86. 64e3257 Define stack offsets by blueswir1 · 17 years ago
  87. bcb0126 More TCGv type fixes. by pbrook · 17 years ago
  88. cb63669 Fix ARM conditional branch bug. Add tcg_gen_brcondi. by pbrook · 17 years ago
  89. 91a3c1b Comment non-obvious calculation. Don't clobber r3 in qemu_st64. by balrog · 17 years ago
  90. e936243 A branch insn must not overwrite the branch target before relocation. by balrog · 17 years ago
  91. e8996ee added tcg_temp_free() and improved the handling of constants by bellard · 17 years ago
  92. 225b437 Fix qemu_ld/st for mem_index > 0 on arm host. by balrog · 17 years ago
  93. bedba0c Define TCG_TARGET_CALL_STACK_OFFSET on arm. by balrog · 17 years ago
  94. 24bf7b3 compilation fix by bellard · 17 years ago
  95. a23a9ec profiler clean up by bellard · 17 years ago
  96. 7e4597d added debug_insn_start debug instruction by bellard · 17 years ago
  97. 4dc81f2 debug output: write helper names by bellard · 17 years ago
  98. 39cf05d more generic call codegen by bellard · 17 years ago
  99. cf60bce fixed zero shifts (64 bit case) by bellard · 17 years ago
  100. 34151a2 small shift opts by bellard · 17 years ago