1. 7a9a5e7 Merge remote-tracking branch 'remotes/mjt/tags/pull-trivial-patches-2015-03-19' into staging by Peter Maydell · 10 years ago
  2. 327e975 target-mips: Fix warning from Sparse by Stefan Weil · 10 years ago
  3. 0af7a37 target-mips: save cpu state before calling MSA load and store helpers by Leon Alrae · 10 years ago
  4. a5f5339 target-mips: fix hflags modified in delay / forbidden slot by Leon Alrae · 10 years ago
  5. 62c6886 target-mips: fix CP0.BadVAddr by stopping translation on Address Error by Leon Alrae · 10 years ago
  6. 42a268c tcg: Change translator-side labels to a pointer by Richard Henderson · 10 years ago
  7. a195fdd Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into staging by Peter Maydell · 10 years ago
  8. ee74801 Merge remote-tracking branch 'remotes/lalrae/tags/mips-20150311' into staging by Peter Maydell · 10 years ago
  9. b16565b kvm: add machine state to kvm_arch_init by Marcel Apfelbaum · 10 years ago
  10. 6445111 target-mips: add missing MSACSR and restore fp_status and hflags by Leon Alrae · 10 years ago
  11. 04cd796 target-mips: replace cpu_save/cpu_load with VMStateDescription by Leon Alrae · 10 years ago
  12. 2994fd9 cpu: Make cpu_init() return QOM CPUState object by Eduardo Habkost · 10 years ago
  13. 5e88759 target-mips: pass 0 instead of -1 as rs in microMIPS LUI instruction by Leon Alrae · 10 years ago
  14. b40a153 target-mips: fix broken snapshotting by Leon Alrae · 10 years ago
  15. d3b1979 target-mips: use CP0EnLo_XI instead of magic number by Leon Alrae · 10 years ago
  16. 6489dd2 target-mips: ll and lld cause AdEL exception for unaligned address by Leon Alrae · 10 years ago
  17. fe23729 target-mips: fix detection of the end of the page during translation by Leon Alrae · 10 years ago
  18. 196a795 target-mips: Make CP0.Status.CU1 read-only for the 5Kc and 5KEc processors by Maciej W. Rozycki · 10 years ago
  19. fe700ad tcg: Introduce tcg_op_buf_count and tcg_op_buf_full by Richard Henderson · 11 years ago
  20. 0a7df5d tcg: Move emit of INDEX_op_end into gen_tb_end by Richard Henderson · 11 years ago
  21. b6f3b23 target-mips: Clean up switch fall through after commit fecd264 by Markus Armbruster · 10 years ago
  22. ff32e16 softfloat: expand out STATUS_VAR by Peter Maydell · 10 years ago
  23. e5a41ff softfloat: Expand out the STATUS_PARAM macro by Peter Maydell · 10 years ago
  24. 1535300 target-mips: Don't use _raw load/store accessors by Peter Maydell · 10 years ago
  25. ec53b45 exec.c: Drop TARGET_HAS_ICE define and checks by Peter Maydell · 10 years ago
  26. 9e03a04 kvm: extend kvm_irqchip_add_msi_route to work on s390 by Frank Blaschka · 10 years ago
  27. cd42d5b gen-icount: check cflags instead of use_icount global by Paolo Bonzini · 10 years ago
  28. bd79255 translate: check cflags instead of use_icount global by Paolo Bonzini · 10 years ago
  29. 84afc4d Merge remote-tracking branch 'remotes/lalrae/tags/mips-20141216' into staging by Peter Maydell · 10 years ago
  30. 339aaf5 qemu-log: add log category for MMU info by Antony Pavlov · 10 years ago
  31. d4fa535 target-mips: remove excp_names[] from linux-user as it is unused by Leon Alrae · 10 years ago
  32. 00fb4a1 target-mips: convert single case switch into if statement by Leon Alrae · 10 years ago
  33. 66991d1 target-mips: Fix DisasContext's ulri member initialization by Maciej W. Rozycki · 10 years ago
  34. 1a4d570 target-mips: Use local float status pointer across MSA macros by Maciej W. Rozycki · 10 years ago
  35. bb96238 target-mips: Add missing calls to synchronise SoftFloat status by Maciej W. Rozycki · 10 years ago
  36. 1d725ae target-mips: Also apply the CP0.Status mask to MTTC0 by Maciej W. Rozycki · 10 years ago
  37. cbb26c9 target-mips: gdbstub: Clean up FPU register handling by Maciej W. Rozycki · 10 years ago
  38. c48245f target-mips: Correct 32-bit address space wrapping by Maciej W. Rozycki · 10 years ago
  39. d922445 target-mips: Tighten ISA level checks by Maciej W. Rozycki · 10 years ago
  40. 90f12d7 target-mips: Fix CP0.Config3.ISAOnExc write accesses by Maciej W. Rozycki · 10 years ago
  41. 27e1fb1 target-mips: Output CP0.Config2-5 in the register dump by Maciej W. Rozycki · 10 years ago
  42. 7215d7e target-mips: Fix the 64-bit case for microMIPS MOVE16 and MOVEP by Maciej W. Rozycki · 10 years ago
  43. 81a423e target-mips: Correct the writes to Status and Cause registers via gdbstub by Maciej W. Rozycki · 10 years ago
  44. f88f79e target-mips: Correct the handling of writes to CP0.Status for MIPSr6 by Maciej W. Rozycki · 10 years ago
  45. c357747 target-mips: Correct MIPS16/microMIPS branch size calculation by Maciej W. Rozycki · 10 years ago
  46. 8fc605b target-mips: Restore the order of helpers by Maciej W. Rozycki · 10 years ago
  47. 51fdea9 target-mips: Remove unused `FLOAT_OP' macro by Maciej W. Rozycki · 10 years ago
  48. 2b09f94 target-mips: Make `helper_float_cvtw_s' consistent with the remaining helpers by Maciej W. Rozycki · 10 years ago
  49. d2bfa6e target-mips: Fix formatting in `decode_opc' by Maciej W. Rozycki · 10 years ago
  50. 6225a4a target-mips: Fix formatting in `mips_defs' by Maciej W. Rozycki · 10 years ago
  51. d75de74 target-mips: Fix formatting in `decode_extended_mips16_opc' by Maciej W. Rozycki · 10 years ago
  52. 4386f08 target-mips: Enable vectored interrupt support for the 74Kf CPU by Maciej W. Rozycki · 10 years ago
  53. 11f5ea1 target-mips: Add M14K and M14Kc MIPS32r2 microMIPS processors by Maciej W. Rozycki · 10 years ago
  54. 8280b12 target-mips: Make CP0.Config4 and CP0.Config5 registers signed by Maciej W. Rozycki · 10 years ago
  55. 36b86e0 target-mips: Add 5KEc and 5KEf MIPS64r2 processors by Maciej W. Rozycki · 10 years ago
  56. c7d4d98 target-mips: Make CP1.FIR read-only here too by Maciej W. Rozycki · 10 years ago
  57. 800675f target-mips: Correct the handling of register #72 on writes by Maciej W. Rozycki · 10 years ago
  58. 906b53a target-mips: kvm: do not use get_clock() by Paolo Bonzini · 10 years ago
  59. cb269f2 target-mips: fix multiple TCG registers covering same data by Yongbok Kim · 10 years ago
  60. 342368a mips: Ensure PC update with MTC0 single-stepping by Maciej W. Rozycki · 10 years ago
  61. 8547957 target-mips: fix for missing delay slot in BC1EQZ and BC1NEZ by Leon Alrae · 10 years ago
  62. e30614d mips: Set the CP0.Config3.DSP and CP0.Config3.DSP2P bits by Maciej W. Rozycki · 10 years ago
  63. 70409e6 mips: Add macros for CP0.Config3 and CP0.Config4 bits by Maciej W. Rozycki · 10 years ago
  64. 272f458 mips: Respect CP0.Status.CU1 for microMIPS FP branches by Maciej W. Rozycki · 10 years ago
  65. 55a2201 target-mips: add MSA support to mips32r5-generic by Yongbok Kim · 10 years ago
  66. f768587 target-mips: add MSA MI10 format instructions by Yongbok Kim · 10 years ago
  67. 3bdeb68 target-mips: add MSA 2RF format instructions by Yongbok Kim · 10 years ago
  68. cbe50b9 target-mips: add MSA VEC/2R format instructions by Yongbok Kim · 10 years ago
  69. 7d05b9c target-mips: add MSA 3RF format instructions by Yongbok Kim · 10 years ago
  70. 1e608ec target-mips: add MSA ELM format instructions by Yongbok Kim · 10 years ago
  71. 28f99f0 target-mips: add MSA 3R format instructions by Yongbok Kim · 10 years ago
  72. d4cf28d target-mips: add MSA BIT format instructions by Yongbok Kim · 10 years ago
  73. 80e7159 target-mips: add MSA I5 format instruction by Yongbok Kim · 10 years ago
  74. 4c78954 target-mips: add MSA I8 format instructions by Yongbok Kim · 10 years ago
  75. 5692c6e target-mips: add MSA branch instructions by Yongbok Kim · 10 years ago
  76. 42daa9b target-mips: add msa_helper.c by Yongbok Kim · 10 years ago
  77. 863f264 target-mips: add msa_reset(), global msa register by Yongbok Kim · 10 years ago
  78. 239dfeb target-mips: add MSA opcode enum by Yongbok Kim · 10 years ago
  79. 4cf8a45 target-mips: stop translation after ctc1 by Yongbok Kim · 10 years ago
  80. b7651e9 target-mips: remove duplicated mips/ieee mapping function by Yongbok Kim · 10 years ago
  81. b10ac20 target-mips: add MSA exceptions by Yongbok Kim · 10 years ago
  82. e97a391 target-mips: add MSA defines and data structure by Yongbok Kim · 10 years ago
  83. 2d9e48b target-mips: enable features in MIPS64R6-generic CPU by Leon Alrae · 10 years ago
  84. f31b035 target-mips: correctly handle access to unimplemented CP0 register by Leon Alrae · 10 years ago
  85. ba801af target-mips: add restrictions for possible values in registers by Leon Alrae · 10 years ago
  86. a63eb0c target-mips: CP0_Status.CU0 no longer allows the user to access CP0 by Leon Alrae · 10 years ago
  87. 339cd2a target-mips: implement forbidden slot by Leon Alrae · 10 years ago
  88. faf1f68 target-mips: add Config5.SBRI by Leon Alrae · 10 years ago
  89. 460c81f target-mips: update cpu_save/cpu_load to support new registers by Leon Alrae · 10 years ago
  90. aea1409 target-mips: add BadInstr and BadInstrP support by Leon Alrae · 10 years ago
  91. 9456c2f target-mips: add TLBINV support by Leon Alrae · 10 years ago
  92. 92ceb44 target-mips: add new Read-Inhibit and Execute-Inhibit exceptions by Leon Alrae · 10 years ago
  93. 7207c7f target-mips: update PageGrain and m{t,f}c0 EntryLo{0,1} by Leon Alrae · 10 years ago
  94. 2fb58b7 target-mips: add RI and XI fields to TLB entry by Leon Alrae · 10 years ago
  95. 9f6bced target-mips: distinguish between data load and instruction fetch by Leon Alrae · 10 years ago
  96. e98c0d1 target-mips: add KScratch registers by Leon Alrae · 10 years ago
  97. 74dda987 target-mips: add ULL suffix in bitswap to avoid compiler warning by Leon Alrae · 10 years ago
  98. 340fff7 target-mips: Remove unused gen_load_ACX, gen_store_ACX and cpu_ACX by Peter Maydell · 10 years ago
  99. 31efecc target-mips/dsp_helper.c: Add ifdef guards around various functions by Peter Maydell · 10 years ago
  100. c7986fd target-mips/translate.c: Add ifdef guard around check_mips64() by Peter Maydell · 10 years ago