1. afa0523 tcg: initial mips support by Aurelien Jarno · 15 years ago
  2. 7d30175 tcg: fix tcg_regset_{set,reset}_reg with more than 32 registers by Aurelien Jarno · 15 years ago
  3. 016b2b2 tcg/ppc64,x86_64: fix constraints of op_qemu_st64 by Aurelien Jarno · 15 years ago
  4. b785e47 tcg/i386: remove duplicate sar opcode by Magnus Damm · 15 years ago
  5. 6a95702 tcg: improve output log by Aurelien Jarno · 15 years ago
  6. 94f4af0 tcg: allocate s->op_dead_iargs dynamically by Aurelien Jarno · 15 years ago
  7. 8389c67 tcg: remove dead code by Aurelien Jarno · 15 years ago
  8. 5f0ce17 tcg/i386: add support for ext{8,16}u_i32 TCG ops by Aurelien Jarno · 15 years ago
  9. 6458421 tcg/x86_64: add support for ext{8,16,32}u_i{32,64} TCG ops by Aurelien Jarno · 15 years ago
  10. cfc8698 tcg: add ext{8,16,32}u_i{32,64} TCG ops by Aurelien Jarno · 15 years ago
  11. d685920 Revert part of 6692b043198d58a12317009edb98654c6839f043 by Aurelien Jarno · 15 years ago
  12. 6692b04 TCG: fix DEF2 macro by Aurelien Jarno · 15 years ago
  13. 17cf428 tcg/i386: generates dec/inc instead of sub/add when possible by Aurelien Jarno · 15 years ago
  14. b70650c tcg/i386: optimize and $0xff(ff), reg by Aurelien Jarno · 15 years ago
  15. a4b18c6 tcg/x86_64: generated dec/inc instead of sub/add when possible by Aurelien Jarno · 15 years ago
  16. d937032 tcg/ppc: always use tcg_out_call by malc · 15 years ago
  17. 7990496 ARM back-end: Use sxt[bh] instructions for ext{8, 6}s by Laurent Desnogues · 15 years ago
  18. d89c682 Suppress some variants of English in comments by Stefan Weil · 15 years ago
  19. 96e132e Compile TCG runtime library only once by Blue Swirl · 15 years ago
  20. b348113 tcg: fix size of local variables in tcg_gen_bswap64_i64 by Stefan Weil · 15 years ago
  21. abb6ae2 X86_64: Use proper jumps/calls when displacement exceeds +-2G by malc · 15 years ago
  22. c45851c When targeting PPU use rlwinm instead of andi. if possible by malc · 15 years ago
  23. 4e6f6d4 ARM back-end: Fix encode_imm by Laurent Desnogues · 15 years ago
  24. 94953e6 ARM back-end: Handle all possible immediates for ALU ops by Laurent Desnogues · 15 years ago
  25. f878d2d ARM back-end: Add TCG not by Laurent Desnogues · 15 years ago
  26. e2542fe rename WORDS_BIGENDIAN to HOST_WORDS_BIGENDIAN by Juan Quintela · 15 years ago
  27. 092c73e rename DEBUG_TCG to CONFIG_DEBUG_TCG by Juan Quintela · 15 years ago
  28. dfe5fff change HOST_SOLARIS to CONFIG_SOLARIS{_VERSION} by Juan Quintela · 15 years ago
  29. 871e6c3 Fix CONFIG_PROFILER by Blue Swirl · 15 years ago
  30. a71836d Fix rbase initialization by malc · 15 years ago
  31. cb4e581 this patch improves the ARM back-end in the following way: by Laurent Desnogues · 15 years ago
  32. d9885a0 tcg: Fix tcg_gen_rotr_i64 by Aurelien Jarno · 15 years ago
  33. f6548c0 PPC 32/64 GUEST_BASE support by malc · 15 years ago
  34. 4f4a67a Fix LHZX opcode value by malc · 15 years ago
  35. adea819 Userspace guest address offsetting by Juan Quintela · 15 years ago
  36. 379f669 Userspace guest address offsetting by Paul Brook · 16 years ago
  37. 2d69f35 ARM host fixes by Paul Brook · 16 years ago
  38. 5561650 Include assert.h from qemu-common.h by Paul Brook · 16 years ago
  39. cca8298 tcg: make sure NDEBUG is defined before including <assert.h> by aurel32 · 16 years ago
  40. f839394 Add a --enable-debug-tcg option to configure by aurel32 · 16 years ago
  41. 2ffebe2 Remove reserved registers from tcg_target_reg_alloc_order by malc · 16 years ago
  42. 9de187a Whack [LS]MW by malc · 16 years ago
  43. e23f2f3 Remove reserved registers from tcg_target_reg_alloc_order by malc · 16 years ago
  44. 3e00b3f tcg/tcg.h: fix a few typos by aurel32 · 16 years ago
  45. b9c18f5 tcg: add a CONST flag to TCG helpers by aurel32 · 16 years ago
  46. 34d5a9f tcg: improve comment about pure functions by aurel32 · 16 years ago
  47. 79d342d tcg/x86_64: optimize register allocation order by aurel32 · 16 years ago
  48. 1da92db Fix branches and TLB matches for 64 bit targets by blueswir1 · 16 years ago
  49. f843e52 Allocate space for static call args, increase stack frame size on Sparc64 by blueswir1 · 16 years ago
  50. 864951a tcg: fix _tl aliases for divu/remu by aurel32 · 16 years ago
  51. ab36421 tcg: add _tl aliases for div/divu/rem/remu by aurel32 · 16 years ago
  52. 604457d tcg/README: fix description of bswap32_i32/i64 by aurel32 · 16 years ago
  53. 86dbdd4 tcg/x86_64: add bswap16_i{32,64} and bswap32_i64 ops by aurel32 · 16 years ago
  54. 5d40cd6 tcg/x86: add bswap16_i32 ops by aurel32 · 16 years ago
  55. 4ad4ce1 tcg: update README wrt recent bswap changes by aurel32 · 16 years ago
  56. 911d79b tcg: add _tl aliases to bswap16/32/64 TCG ops by aurel32 · 16 years ago
  57. 9a5c57f tcg: add bswap16_i64 and bswap32_i64 TCG ops by aurel32 · 16 years ago
  58. dfa1a3f tcg: optimize tcg_gen_bswap16_i32 by aurel32 · 16 years ago
  59. 84aafb0 tcg: allow bswap16_i32 to be implemented by TCG backends by aurel32 · 16 years ago
  60. 66896cb tcg: rename bswap_i32/i64 functions by aurel32 · 16 years ago
  61. 0dd0dd5 tcg: move {not,neg}_i{32,64} definitions at the right place by aurel32 · 16 years ago
  62. e510508 tcg: fix commit r6805 by aurel32 · 16 years ago
  63. 419bafa tcg-arm: fix qemu_ld64 by aurel32 · 16 years ago
  64. 506bfcb tcg: update TODO by aurel32 · 16 years ago
  65. 9619376 tcg/x86: add not/neg/extu/bswap/rot i32 ops by aurel32 · 16 years ago
  66. 7fc8105 tcg: optimize logical operations by aurel32 · 16 years ago
  67. 43e860e Fix tcg after commit 6800 by aurel32 · 16 years ago
  68. fe75bcf tcg: use TCGV_EQUAL_I{32,64} by aurel32 · 16 years ago
  69. 44e6acb tcg: define TCGV_EQUAL_I{32,64} by aurel32 · 16 years ago
  70. c29d0de tcg: optimize nor(X, Y, Y), used on PPC for not(X, Y) by aurel32 · 16 years ago
  71. d260428 Implement TCG not ops for x86-64 by aurel32 · 16 years ago
  72. f31e937 tcg: don't define TCG rotation ops if they are not supported by aurel32 · 16 years ago
  73. d42f183 Implement TCG rotation ops for x86-64 by aurel32 · 16 years ago
  74. e63d7ab Prune unused TCG_AREGs by blueswir1 · 16 years ago
  75. 9e622b1 Sparse fixes: truncation by cast by blueswir1 · 16 years ago
  76. 9c22bc6 TCG: remove obsolete old_op_count profiler field by blueswir1 · 16 years ago
  77. 095271d Add missing r24..r26 to callee save registers by malc · 16 years ago
  78. eb2eb1d Add missing r24..r26 to calle save registers by malc · 16 years ago
  79. 2edd089 Add "static" by blueswir1 · 16 years ago
  80. a747723 Fix DEBUG_TCGV compile error. by aurel32 · 16 years ago
  81. 5db3ee7 R13 is reserved for small data area pointer by SVR4 PPC ABI by malc · 16 years ago
  82. 8fec2b8 global s/loglevel & X/qemu_loglevel_mask(X)/ (Eduardo Habkost) by aliguori · 16 years ago
  83. 93fcfe3 Convert references to logfile/loglevel to use qemu_log*() macros by aliguori · 16 years ago
  84. e58ffeb Remove all traces of __powerpc__ by malc · 16 years ago
  85. 5d04f23 tcg: remove tcg_global_reg2_new_hack() by aurel32 · 16 years ago
  86. f53bca1 TCG: Fix documentation of qemu_ld/st ops by aurel32 · 16 years ago
  87. df9247b tcg_temp_local_new should take no parameter by aurel32 · 16 years ago
  88. b1503cd Use the ARRAY_SIZE() macro where appropriate. by malc · 16 years ago
  89. 3e9a474 tcg: kill two warnings by aurel32 · 16 years ago
  90. 9db3ba4 TCG x86/x86-64: use move with zero-extend for loads/stores by aurel32 · 16 years ago
  91. 1d6198c Remove unnecessary trailing newlines by blueswir1 · 16 years ago
  92. 7a3a514 Fix TARGET_LONG_BITS warning in TCG by blueswir1 · 16 years ago
  93. 902b3d5 Introduce and use cache-utils.[ch] by malc · 16 years ago
  94. aef3a28 Fix 64-bit targets compilation on ARM host. by balrog · 16 years ago
  95. 54604f7 Some cleanups after dyngen removal by aurel32 · 16 years ago
  96. 49516bc Some cleanups after dyngen removal by aurel32 · 16 years ago
  97. a810a2d Some fixes for TCG debugging by blueswir1 · 16 years ago
  98. 86e840e Remove a few dyngen and dyngen related code by aurel32 · 16 years ago
  99. 0c9c3a9 arm: Don't potentially overwrite input registers in add2, sub2. by balrog · 16 years ago
  100. fe33867 Don't rely on ARM tcg_out_goto() generating just a single insn. by balrog · 16 years ago