1. 7c25504 exec: [tcg] Track which vCPU is performing translation and execution by Lluís Vilanova · 9 years ago
  2. 3b54254 spapr: Abstract CPU core device and type specific core devices by Bharata B Rao · 9 years ago
  3. 2e11b15 target-ppc: Fix rlwimi, rlwinm, rlwnm by Richard Henderson · 9 years ago
  4. 35b5066 target-ppc: Bug in BookE wait instruction by Jakub Horak · 9 years ago
  5. 02d0e09 os-posix: include sys/mman.h by Paolo Bonzini · 9 years ago
  6. b30ff22 ppc: Add PowerISA 2.07 compatibility mode by Thomas Huth · 9 years ago
  7. eac4fba ppc: Improve PCR bit selection in ppc_set_compat() by Thomas Huth · 9 years ago
  8. 52b2519 ppc: Provide function to get CPU class of the host CPU by Thomas Huth · 9 years ago
  9. 8cd2ce7 ppc: Split pcr_mask settings into supported bits and the register mask by Thomas Huth · 9 years ago
  10. 79cecb3 Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into staging by Peter Maydell · 9 years ago
  11. c02d703 virtio: move bi-endian target support to a single location by Greg Kurz · 9 years ago
  12. 4d6a068 ppc: Do not take exceptions on unknown SPRs in privileged mode by Benjamin Herrenschmidt · 9 years ago
  13. c76c22d ppc: Add missing slbfee. instruction on ppc64 BookS processors by Benjamin Herrenschmidt · 9 years ago
  14. 2f9254d ppc: Fix slbia decode by Benjamin Herrenschmidt · 9 years ago
  15. 5e31867 ppc: Fix mtmsr decoding by Benjamin Herrenschmidt · 9 years ago
  16. dfdd3e4 ppc: POWER7 has lq/stq instructions and stq need to check ISA by Benjamin Herrenschmidt · 9 years ago
  17. 8eb0f56 ppc: POWER7 had ACOP and PID registers by Benjamin Herrenschmidt · 9 years ago
  18. c5a8d8f ppc: Batch TLB flushes on 32-bit 6xx/7xx/7xxx in hash mode by Benjamin Herrenschmidt · 9 years ago
  19. 3dcfb74 ppc: Fix tlb invalidations on 6xx/7xx/7xxx 32-bit processors by Benjamin Herrenschmidt · 9 years ago
  20. f5d9c10 ppc: Properly tag the translation cache based on MMU mode by Benjamin Herrenschmidt · 9 years ago
  21. 9207113 target-ppc: fixup bitrot in mmu_helper.c debug statements by Mark Cave-Ayland · 9 years ago
  22. 1c7336c ppc: fix hrfid, tlbia and slbia privilege by Cédric Le Goater · 9 years ago
  23. 1c953ba ppc: Fix hreg_store_msr() so that non-HV mode cannot alter MSR:HV by Benjamin Herrenschmidt · 9 years ago
  24. 932ccbd ppc: Better figure out if processor has HV mode by Benjamin Herrenschmidt · 9 years ago
  25. a575d9a target-ppc/fpu_helper: Fix efscmp* instructions handling by Talha Imran · 9 years ago
  26. 4910e6e target-*: dfilter support for in_asm by Richard Henderson · 9 years ago
  27. 4e08061 ppc: Add PPC_64H instruction flag to POWER7 and POWER8 by Benjamin Herrenschmidt · 9 years ago
  28. b68e60e ppc: Get out of emulation on SMT "OR" ops by Benjamin Herrenschmidt · 9 years ago
  29. c409bc5 ppc: Fix sign extension issue in mtmsr(d) emulation by Michael Neuling · 9 years ago
  30. f9ef052 ppc: Change 'invalid' bit mask of tlbiel and tlbie by Benjamin Herrenschmidt · 9 years ago
  31. 74693da ppc: tlbie, tlbia and tlbisync are HV only by Benjamin Herrenschmidt · 9 years ago
  32. cd0c6f4 ppc: Do some batching of TCG tlb flushes by Benjamin Herrenschmidt · 9 years ago
  33. 9fb0449 ppc: Use split I/D mmu modes to avoid flushes on interrupts by Benjamin Herrenschmidt · 9 years ago
  34. 5fd1111 ppc: Remove MMU_MODEn_SUFFIX definitions by Benjamin Herrenschmidt · 9 years ago
  35. f94819d spapr_iommu: Finish renaming vfio_accel to need_vfio by Alexey Kardashevskiy · 9 years ago
  36. 41264b3 PPC/KVM: early validation of vcpu id by Greg Kurz · 9 years ago
  37. a7b2c8b target-ppc: Cleanups to rldinm, rldnm, rldimi by Richard Henderson · 9 years ago
  38. 63ae091 target-ppc: Use 32-bit rotate instead of deposit + 64-bit rotate by Richard Henderson · 9 years ago
  39. 24f9cd9 target-ppc: Use movcond in isel by Richard Henderson · 9 years ago
  40. 319de6f target-ppc: Correct KVM synchronization for ppc_hash64_set_external_hpt() by David Gibson · 9 years ago
  41. 63c9155 cpu: move exec-all.h inclusion out of cpu.h by Paolo Bonzini · 9 years ago
  42. 33c1187 qemu-common: push cpu.h inclusion out of qemu-common.h by Paolo Bonzini · 9 years ago
  43. 1e00b8d hw: move CPU state serialization to migration/cpu.h by Paolo Bonzini · 9 years ago
  44. aa5a9e2 ppc: use PowerPCCPU instead of CPUPPCState by Paolo Bonzini · 9 years ago
  45. 2d34fe3 target-ppc: make cpu-qom.h not target specific by Paolo Bonzini · 9 years ago
  46. c771dab target-ppc: do not make PowerPCCPUClass depend on target-specific symbols by Paolo Bonzini · 9 years ago
  47. b230560 target-ppc: do not use target_ulong in cpu-qom.h by Paolo Bonzini · 9 years ago
  48. 347b1a5 cpu: make cpu-qom.h only include-able from cpu.h by Paolo Bonzini · 9 years ago
  49. 90aa39a tcg: Allow goto_tb to any target PC in user mode by Sergey Fedorov · 9 years ago
  50. 89fee74 tb: consistently use uint32_t for tb->flags by Emilio G. Cota · 9 years ago
  51. aa37859 ppc: Fix migration of the XER register by Thomas Huth · 9 years ago
  52. 537d3e8 ppc: Fix the bad exception NIP value and the range check in LSWX by Thomas Huth · 9 years ago
  53. afbee71 ppc: Fix the range check in the LSWI instruction by Thomas Huth · 9 years ago
  54. 5c94b2a ppc: Rework POWER7 & POWER8 exception model by Cédric Le Goater · 9 years ago
  55. 84a5a80 Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging by Peter Maydell · 9 years ago
  56. 9d0e5c8 ppc: move POWER8 Book4 regs in their own routine by Cédric Le Goater · 9 years ago
  57. 9c1cf38 ppc: A couple more dummy POWER8 Book4 regs by Benjamin Herrenschmidt · 9 years ago
  58. eb5ceb4 ppc: Add dummy CIABR SPR by Benjamin Herrenschmidt · 9 years ago
  59. a6eabb9 ppc: Add POWER8 IAMR register by Benjamin Herrenschmidt · 9 years ago
  60. 97eaf30 ppc: Fix writing to AMR/UAMOR by Benjamin Herrenschmidt · 9 years ago
  61. 6a9c4ef ppc: Initialize AMOR in PAPR mode by Benjamin Herrenschmidt · 9 years ago
  62. 21a558b ppc: Add dummy SPR_IC for POWER8 by Benjamin Herrenschmidt · 9 years ago
  63. 26a7f12 ppc: Create cpu_ppc_set_papr() helper by Benjamin Herrenschmidt · 9 years ago
  64. f401dd3 ppc: Add a bunch of hypervisor SPRs to Book3s by Benjamin Herrenschmidt · 9 years ago
  65. eb94268 ppc: Add macros to register hypervisor mode SPRs by Benjamin Herrenschmidt · 9 years ago
  66. 1488270 ppc: Update SPR definitions by Benjamin Herrenschmidt · 9 years ago
  67. 0ddbd05 spapr/target-ppc/kvm: Only add hcall-instructions if KVM supports it by Alexey Kardashevskiy · 9 years ago
  68. 8b9f211 ppc64: set MSR_SF bit by Laurent Vivier · 9 years ago
  69. f348b6d util: move declarations out of qemu-common.h by Veronia Bahaa · 9 years ago
  70. 73bcb24 Replaced get_tick_per_sec() by NANOSECONDS_PER_SECOND by Rutuja Shah · 9 years ago
  71. da34e65 include/qemu/osdep.h: Don't include qapi/error.h by Markus Armbruster · 9 years ago
  72. 3be5cc2 target-ppc: Document TOCTTOU in hugepage support by Markus Armbruster · 9 years ago
  73. c18ad9a target-ppc: Eliminate kvmppc_kern_htab global by David Gibson · 9 years ago
  74. e5c0d3c target-ppc: Add helpers for updating a CPU's SDR1 and external HPT by David Gibson · 9 years ago
  75. a7a00a7 target-ppc: Split out SREGS get/put functions by David Gibson · 9 years ago
  76. a88dced target-ppc: Add PVR for POWER8NVL processor by Alexey Kardashevskiy · 9 years ago
  77. 1464645 ppc: Add a few more P8 PMU SPRs by Benjamin Herrenschmidt · 9 years ago
  78. 1e440cb ppc: Fix migration of the TAR SPR by Thomas Huth · 9 years ago
  79. d6f1445 ppc: Define the PSPB register on POWER8 by Thomas Huth · 9 years ago
  80. 1bcea73 tcg: Add type for vCPU pointers by Lluís Vilanova · 9 years ago
  81. 388e47c ppc/kvm: Tell the user what might be wrong when using bad CPU types with kvm-hv by Thomas Huth · 9 years ago
  82. 072ed5f ppc/kvm: Use error_report() instead of cpu_abort() for user-triggerable errors by Thomas Huth · 9 years ago
  83. 3240dd9 hw/ppc/spapr: Implement the h_page_init hypercall by Thomas Huth · 9 years ago
  84. 30456d5 all: Clean up includes by Peter Maydell · 9 years ago
  85. fa48b43 target-ppc: Remove hack for ppc_hash64_load_hpte*() with HV KVM by David Gibson · 9 years ago
  86. 808bc3b target-ppc: Include missing MMU models for SDR1 in info registers by David Gibson · 9 years ago
  87. b7f0bbd target-ppc: Remove unused kvmppc_update_sdr1() stub by David Gibson · 9 years ago
  88. ac1be2a Merge remote-tracking branch 'remotes/armbru/tags/pull-qapi-2016-02-09' into staging by Peter Maydell · 9 years ago
  89. e1ccc05 tcg: Change tcg_global_mem_new_* to take a TCGv_ptr by Richard Henderson · 11 years ago
  90. d7bce99 qom: Swap 'name' next to visitor in ObjectPropertyAccessor by Eric Blake · 9 years ago
  91. 51e72bc qapi: Swap visit_* arguments for consistent 'name' placement by Eric Blake · 9 years ago
  92. 508127e log: do not unnecessarily include qom/cpu.h by Paolo Bonzini · 9 years ago
  93. d127715 target-ppc: mcrfs should always update FEX/VX and only clear exception bits by James Clarke · 9 years ago
  94. fc03cfe target-ppc: Make every FPSCR_ macro have a corresponding FP_ macro by James Clarke · 9 years ago
  95. a8891fb target-ppc: Allow more page sizes for POWER7 & POWER8 in TCG by David Gibson · 9 years ago
  96. 1114e71 target-ppc: Helper to determine page size information from hpte alone by David Gibson · 9 years ago
  97. 61a36c9 target-ppc: Add new TLB invalidate by HPTE call for hash64 MMUs by David Gibson · 9 years ago
  98. 4693364 target-ppc: Split 44x tlbiva from ppc_tlb_invalidate_one() by David Gibson · 9 years ago
  99. 041d95f target-ppc: Remove unused mmu models from ppc_tlb_invalidate_one by David Gibson · 9 years ago
  100. be18b2b target-ppc: Use actual page size encodings from HPTE by David Gibson · 9 years ago