1. 7026259 target-sh4: fix negc by Aurelien Jarno · 14 years ago
  2. e3f114f target-sh4: update PTEH upon MMU exception by Alexandre Courbot · 14 years ago
  3. bc656a2 sh4: implement missing mmaped TLB read functions by Aurelien Jarno · 14 years ago
  4. 9f97309 sh4: implement missing mmaped TLB write functions by Aurelien Jarno · 14 years ago
  5. bec43cc target-sh4: fix index of address read error exception by Alexandre Courbot · 14 years ago
  6. e40a67b target-sh4: fix TLB invalidation code by Alexandre Courbot · 14 years ago
  7. b2d9eda target-sh4: implement negc using TCG by Aurelien Jarno · 14 years ago
  8. 2411fde target-sh4: use rotl/rotr when possible by Aurelien Jarno · 14 years ago
  9. 0c16e71 target-sh4: correct use of ! and & by Aurelien Jarno · 14 years ago
  10. c5c1913 target-sh4: use setcond when possible by Aurelien Jarno · 14 years ago
  11. be15c50 target-sh4: log instructions start in TCG code by Aurelien Jarno · 14 years ago
  12. 6f396c8 target-sh4: simplify comparisons after a 'and' op by Aurelien Jarno · 14 years ago
  13. 4f6493f target-sh4: fix reset on r2d by Aurelien Jarno · 14 years ago
  14. fd4bab1 target-sh4: optimize exceptions by Aurelien Jarno · 14 years ago
  15. 17075f1 target-sh4: add ftrv instruction by Aurelien Jarno · 14 years ago
  16. af8c2bd target-sh4: add fipr instruction by Aurelien Jarno · 14 years ago
  17. 21829e9 target-sh4: implement FPU exceptions by Aurelien Jarno · 14 years ago
  18. a0d4ac3 target-sh4: implement flush-to-zero by Aurelien Jarno · 14 years ago
  19. 26ac1ea target-sh4: define FPSCR constants by Aurelien Jarno · 14 years ago
  20. 442599a target-sh4: use default-NaN mode by Aurelien Jarno · 14 years ago
  21. 86865c5 target-sh4: fix fpu disabled/illegal exception by Aurelien Jarno · 14 years ago
  22. 829a492 target-sh4: improve TLB by Aurelien Jarno · 14 years ago
  23. c0f809c target-sh4: implement writes to mmaped ITLB by Aurelien Jarno · 14 years ago
  24. 9a78eea target-xxx: Use fprintf_function (format checking) by Stefan Weil · 14 years ago
  25. 935fc17 target-sh4: Add support for ldc & stc with sgr by Alexandre Courbot · 15 years ago
  26. 8e9b067 target-sh4: Split the LDST macro into 2 sub-macros by Alexandre Courbot · 15 years ago
  27. a88790a remove exec-all.h inclusion from cpu.h by Paolo Bonzini · 15 years ago
  28. 10eb0cc move cpu_pc_from_tb to target-*/exec.h by Paolo Bonzini · 15 years ago
  29. 6f0f607 target-sh4: Remove duplicate CPU log. by Richard Henderson · 15 years ago
  30. 1a7ff92 remove TARGET_* defines from translate-all.c by Paolo Bonzini · 15 years ago
  31. 43dc2a6 Replace assert(0) with abort() or cpu_abort() by Blue Swirl · 15 years ago
  32. d4c430a Large page TLB flush by Paul Brook · 15 years ago
  33. 3c7b48b Target specific usermode cleanup by Paul Brook · 15 years ago
  34. 4fcc562 Remove cpu_get_phys_page_debug from userspace emulation by Paul Brook · 15 years ago
  35. 5270589 Move TARGET_PHYS_ADDR_SPACE_BITS to target-*/cpu.h. by Richard Henderson · 15 years ago
  36. ee0dc6d Fix incorrect exception_index use by Blue Swirl · 15 years ago
  37. 5a25cc2 target-sh4: MMU: separate execute and read/write permissions by Aurelien Jarno · 15 years ago
  38. 03e3b61 target-sh4: MMU: fix store queue addresses by Aurelien Jarno · 15 years ago
  39. 55ff33a target-sh4: MMU: remove dead code by Aurelien Jarno · 15 years ago
  40. af09049 target-sh4: MMU: reduce the size of a TLB entry by Aurelien Jarno · 15 years ago
  41. 628b61a target-sh4: MMU: optimize UTLB accesses by Aurelien Jarno · 15 years ago
  42. 4d1e4ff target-sh4: MMU: fix ITLB priviledge check by Aurelien Jarno · 15 years ago
  43. 0f3f1ec target-sh4: MMU: simplify call to tlb_set_page() by Aurelien Jarno · 15 years ago
  44. 1f48681 target-sh4: MMU: fix mem_idx computation by Aurelien Jarno · 15 years ago
  45. e0bcb9c sh7750: handle MMUCR TI bit by Aurelien Jarno · 15 years ago
  46. 3101e99 target-sh4: minor optimisations by Aurelien Jarno · 15 years ago
  47. 49a945a kill regs_to_env and env_to_regs by Paolo Bonzini · 15 years ago
  48. c227f09 Revert "Get rid of _t suffix" by Anthony Liguori · 15 years ago
  49. 99a0949 Get rid of _t suffix by malc · 15 years ago
  50. b9d38e9 Fix Sparse warnings about using plain integer as NULL pointer by Blue Swirl · 15 years ago
  51. 72cf2d4 Fix sys-queue.h conflict for good by Blue Swirl · 15 years ago
  52. 0b5c1ce cleanup cpu-exec.c, part 0/N: consolidate handle_cpu_signal by Nathan Froyd · 15 years ago
  53. 8167ee8 Update to a hopefully more future proof FSF address by Blue Swirl · 16 years ago
  54. f80f9ec Convert machine registration to use module init functions by Anthony Liguori · 16 years ago
  55. 5561650 Include assert.h from qemu-common.h by Paul Brook · 16 years ago
  56. 0bf46a4 qemu: introduce qemu_init_vcpu (Marcelo Tosatti) by aliguori · 16 years ago
  57. 6a4955a qemu: per-arch cpu_has_work (Marcelo Tosatti) by aliguori · 16 years ago
  58. 1b530a6 Add new command line option -singlestep for tcg single stepping. by aurel32 · 16 years ago
  59. 679dee3 SH: Fix linux-user _is_cached typo. by edgar_igl · 16 years ago
  60. 3c1adf1 SH: Add cpu_sh4_is_cached for linux-user. by edgar_igl · 16 years ago
  61. 852d481 SH: Improve movca.l/ocbi emulation. by edgar_igl · 16 years ago
  62. c276471 The _exit syscall is used for both thread termination in NPTL applications, by pbrook · 16 years ago
  63. 927e3a4 SH4: Fixed last UTLB unused and URB/URC management by aurel32 · 16 years ago
  64. 45f4d01 SH4: Fixed last UTLB unused by aurel32 · 16 years ago
  65. fb10458 SH4: Fixed last UTLB unused by aurel32 · 16 years ago
  66. ef7ec1c clean build: Fix remaining sh4 warnings by aurel32 · 16 years ago
  67. 66c7c80 SH: Implement MOVCO.L and MOVLI.L by aurel32 · 16 years ago
  68. c2432a4 SH7750/51: add register BCR3, BCR4, PCR, RTCOR, RTCNT, RTCSR, SDMR2, SDMR3 and fix BCR2 support by aurel32 · 16 years ago
  69. 0d0266a targets: remove error handling from qemu_malloc() callers (Avi Kivity) by aliguori · 16 years ago
  70. eca1bdf Log reset events (Jan Kiszka) by aliguori · 16 years ago
  71. 8fec2b8 global s/loglevel & X/qemu_loglevel_mask(X)/ (Eduardo Habkost) by aliguori · 16 years ago
  72. 93fcfe3 Convert references to logfile/loglevel to use qemu_log*() macros by aliguori · 16 years ago
  73. 5b7141a sh4: Add FMAC instruction support by aurel32 · 16 years ago
  74. fad6cb1 Update FSF address in GPL/LGPL boilerplate by aurel32 · 16 years ago
  75. df9247b tcg_temp_local_new should take no parameter by aurel32 · 16 years ago
  76. b1503cd Use the ARRAY_SIZE() macro where appropriate. by malc · 16 years ago
  77. 56cd2b9 target-sh4: make the initial value of SR easier to read by aurel32 · 16 years ago
  78. f3ff7fa target-sh4: don't disable FPU instructions in user mode by aurel32 · 16 years ago
  79. bacc637 target-sh4: disable debug code by aurel32 · 16 years ago
  80. 71968fa target-sh4: add prefi, icbi, synco by aurel32 · 16 years ago
  81. a9c43f8 target-sh4: add SH7785 as CPU option by aurel32 · 16 years ago
  82. 4208322 target-sh4: remove 2 warnings by aurel32 · 16 years ago
  83. eeda677 target-sh4: Add SH bit handling to TLB by aurel32 · 16 years ago
  84. f619837 target-sh4: check FD bit for FP instructions by aurel32 · 16 years ago
  85. b79e175 SH4: kill a few warnings by aurel32 · 16 years ago
  86. d8299bc SH4: Implement FD bit by aurel32 · 16 years ago
  87. 5c16736 SH4: Eliminate P4 to A7 mangling (Takashi YOSHII). by balrog · 16 years ago
  88. 1e5459a SH: On-chip PCI controller support (Takashi YOSHII). by balrog · 16 years ago
  89. db8d990 Remove FORCE_RET() and RETURN() by aurel32 · 16 years ago
  90. 2cbd949 Common cpu_loop_exit prototype by aurel32 · 16 years ago
  91. c0ce998 Use sys-queue.h for break/watchpoint managment (Jan Kiszka) by aliguori · 16 years ago
  92. 11bb09f target-sh4: fix 64-bit fmov to/from memory by aurel32 · 16 years ago
  93. cf7055b target-sh4: fix TLB/MMU emulation by aurel32 · 16 years ago
  94. 12d9613 target-sh4: fix fldi0/fldi1 by aurel32 · 16 years ago
  95. 66ba317 target-sh4: map FP registers as TCG variables by aurel32 · 16 years ago
  96. 9850d1e target-sh4: use CPU_Float/CPU_Double instead of ugly casts by aurel32 · 16 years ago
  97. a1d1bb3 Refactor and enhance break/watchpoint API (Jan Kiszka) by aliguori · 16 years ago
  98. 6b91754 Refactor translation block CPU state handling (Jan Kiszka) by aliguori · 16 years ago
  99. 622ed36 Convert CPU_PC_FROM_TB to static inline (Jan Kiszka) by aliguori · 16 years ago
  100. a7812ae TCG variable type checking. by pbrook · 16 years ago