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qemu / qemu / ca7b25e3ab8a49e46484bd436fedf72940f02887 / target-mips / op_helper.c
  1. cd5158e MIPS: remove a few warnings by aurel32 · 16 years ago
  2. a7812ae TCG variable type checking. by pbrook · 16 years ago
  3. 49bcf33 target-mips: convert bit shuffle ops to TCG by aurel32 · 16 years ago
  4. 505ad7c target-mips: convert bitfield ops to TCG by aurel32 · 16 years ago
  5. add6906 target-mips: fix mft* helpers/call by aurel32 · 16 years ago
  6. e18231a Show size for unassigned accesses (Robert Reif) by blueswir1 · 16 years ago
  7. f01be15 Move the active FPU registers into env again, and use more TCG registers by ths · 17 years ago
  8. bbc0d79 MIPS: Fix tlbwi/tlbwr by aurel32 · 17 years ago
  9. c904ef0 Use plain standard inline. by ths · 17 years ago
  10. 0eaef5a Less hardcoding of TARGET_USER_ONLY. by ths · 17 years ago
  11. b6d96be Use temporary registers for the MIPS FPU emulation. by ths · 17 years ago
  12. d26968e Remove unnecessary helper arguments, and fix some typos. by ths · 17 years ago
  13. 2796188 Avoid unused input arguments which triggered tcg errors. Spotted by Stefan Weil. by ths · 17 years ago
  14. b5dc773 More efficient target register / TC accesses. by ths · 17 years ago
  15. 1a3fd9c Remove remaining uses of T0 in the MIPS target. by ths · 17 years ago
  16. 6c5c1e2 Use temporaries instead of fixed registers for some instructions. by ths · 17 years ago
  17. be24bb4 Pass T0/T1 explicitly to helper functions, and clean up a few dyngen leftovers. by ths · 17 years ago
  18. c8c2227 Convert unaligned load/store to TCG. by ths · 17 years ago
  19. 92af06d Convert vr54xx multiply instructions to TCG. by ths · 17 years ago
  20. a16336e Convert remaining MIPS FP instructions to TCG. by ths · 17 years ago
  21. 214c465 Switch the standard multiplication instructions to TCG. by ths · 17 years ago
  22. 2b0233a Switch bitfield instructions and assorted special ops to TCG. by ths · 17 years ago
  23. 08ba796 TCGify a few more instructions. by ths · 17 years ago
  24. f1aa632 Switch remaining CP0 instructions to TCG or helper functions. by ths · 17 years ago
  25. 9b7b85d Fix off-by-one unwinding error. by pbrook · 17 years ago
  26. 95af5ce Fix build failure for MIPS64 targets on 64-bit hosts. by ths · 17 years ago
  27. 3089880 Switch MIPS clo/clz and the condition tests to TCG. by ths · 17 years ago
  28. 48d38ca Switch most MIPS logical and arithmetic instructions to TCG. by ths · 17 years ago
  29. a607922 fixed do_restore_state() by bellard · 17 years ago
  30. d0dc7dc Make MIPS MT implementation more cache friendly. by ths · 17 years ago
  31. 6b5435d Fix broken absoluteness check for cabs.d.*. by ths · 17 years ago
  32. e9c71dd Support for VR5432, and some of its special instructions. Original patch by ths · 17 years ago
  33. 306ab3e Avoid host FPE for overflowing division on MIPS, by Richard Sandiford. by ths · 17 years ago
  34. f090c9d Add strict checking mode for softfp code. by pbrook · 17 years ago
  35. c6d6dd7 Fix MIPS64 R2 instructions. by ths · 17 years ago
  36. 5747c07 Fix int/float inconsistencies. by pbrook · 17 years ago
  37. d26bc21 Clean out the N32 macros from target-mips, and introduce MIPS ABI specific by ths · 17 years ago
  38. 273af66 Adjust s390 addresses (the MSB is defined as "to be ignored"). by ths · 17 years ago
  39. 623a930 Implement missing MIPS supervisor mode bits. by ths · 17 years ago
  40. 05f778c Add sharable clz/clo inline functions and use them for the mips target. by ths · 17 years ago
  41. 647de6c Handle IBE on MIPS properly. by ths · 17 years ago
  42. 6ebbf39 Replace is_user variable with mmu_idx in softmmu core, by j_mayer · 17 years ago
  43. aa34373 Use always_inline in the MIPS support where applicable. by ths · 17 years ago
  44. 4e9f853 Fix [ls][wd][lr] instructions, by Aurelien Jarno. by ths · 17 years ago
  45. 540635b Code provision for n32/n64 mips userland emulation. Not functional yet. by ths · 17 years ago
  46. 5445409 Less magic constants. by ths · 17 years ago
  47. 418d7c7 Fix MIPS FP underflow handling, spotted by Daniel Jacobowitz. by ths · 17 years ago
  48. 4253218 Timer start/stop implementation, by Aurelien Jarno. by ths · 18 years ago
  49. 3b46e62 find -type f | xargs sed -i 's/[\t ]*$//g' # Yes, again. Note the star in the regex. by ths · 18 years ago
  50. 5fafdf2 find -type f | xargs sed -i 's/[\t ]$//g' # on most files by ths · 18 years ago
  51. ead9360 Partial support for 34K multithreading, not functional yet. by ths · 18 years ago
  52. 5e4ef64 Simplify round/ceil/floor implementation, spotted by Fabrice Bellard. by ths · 18 years ago
  53. e3b60f1 Fix computation for ceil, floor and round instructions. by ths · 18 years ago
  54. 8dfdb87 Implement recip1/recip2/rsqrt1/rsqrt2. by ths · 18 years ago
  55. e034e2c Handle MIPS64 SEGBITS value correctly. by ths · 18 years ago
  56. bfed01f Clean up of some target specifics in exec.c/cpu-exec.c. by ths · 18 years ago
  57. 924b2c0 Add proper float*_is_nan prototypes. by ths · 18 years ago
  58. 12a4b2a Fix ddivu for 32bit hosts, by Aurelien Jarno. by ths · 18 years ago
  59. 3a5b360 Catch more MIPS FPU cornercases, fix addr.ps and mulr.ps instructions. by ths · 18 years ago
  60. 57fa1fb More MIPS 64-bit FPU support. by ths · 18 years ago
  61. fd4a04e - Move FPU exception handling into helper functions, since they are big. by ths · 18 years ago
  62. 69d3572 More generic 64 bit multiplication support, by Aurelien Jarno. by ths · 18 years ago
  63. 100ce98 Full MIPS64 MMU implementation, by Aurelien Jarno. by ths · 18 years ago
  64. f2e9ebe MMU code improvements, by Aurelien Jarno. by ths · 18 years ago
  65. 29929e3 MIPS TLB style selection at runtime, by Herve Poussineau. by ths · 18 years ago
  66. fcb4a41 Choose number of TLBs at runtime, by Herve Poussineau. by ths · 18 years ago
  67. 80c2719 Fix qemu SIGFPE caused by division-by-zero due to underflow. by ths · 18 years ago
  68. fff739c Delete unused define. by ths · 18 years ago
  69. 744e091 Nicer Log formatting. by ths · 18 years ago
  70. f41c52f Save state for all CP0 instructions, they may throw a CPU exception. by ths · 18 years ago
  71. 5a63bcb Fix rotr immediate ops, mask shift/rotate arguments to their allowed size. by ths · 18 years ago
  72. 2d0e944 Build fix for 64bit machines. (This is still not correct mul/div handling.) by ths · 18 years ago
  73. 60aa19a Actually enable 64bit configuration. by ths · 18 years ago
  74. fbe4f65 MIPS64 configurations. by ths · 18 years ago
  75. 24c7b0e Sanitize mips exception handling. by ths · 18 years ago
  76. e397ee3 Fix enough FPU/R2 support to get 24Kf going. by ths · 18 years ago
  77. 36d2395 MIPS FPU dynamic activation, part 1, by Herve Poussineau. by ths · 18 years ago
  78. 3594c77 Replace TLSZ with TARGET_FMT_lx. by ths · 18 years ago
  79. 925fd0f Fix sign-extension of VPN field in TLB, by Herve Poussineau. by ths · 18 years ago
  80. 4de9b24 Reworking MIPS interrupt handling, by Aurelien Jarno. by ths · 18 years ago
  81. 9c2149c Implementing dmfc/dmtc. by ths · 18 years ago
  82. 3b1c8be Fix PageMask handling, second part. by ths · 18 years ago
  83. bc81440 Bring TLB / PageSize handling in line with real hardware behaviour. by ths · 18 years ago
  84. 2ee4aed moved invalidate_tlb() to helper.c as a work around for gcc 3.2.2 bug - suppressed invalid tb_invalidate_page_range() calls by bellard · 18 years ago
  85. 7495fd0 Simplify code and fix formatting. by ths · 18 years ago
  86. 5dc4b74 Scrap SIGN_EXTEND32. by ths · 18 years ago
  87. c570fd1 Preliminiary MIPS64 support, disabled by default due to performance impact. by ths · 18 years ago
  88. 7a387ff Add MIPS32R2 instructions, and generally straighten out the instruction by ths · 18 years ago
  89. 8c0fdd8 Dynamically translate MIPS mtc0 instructions. by ths · 18 years ago
  90. 873eb01 Dynamically translate MIPS mfc0 instructions. by ths · 18 years ago
  91. 814b9a4 MIPS TLB performance improvements, by Daniel Jacobowitz. by ths · 18 years ago
  92. 483dcf5 Avoid redundant TLB flushes (Daniel Jacobowitz). by pbrook · 18 years ago
  93. 3e382bc consistent update of ERL and EXL (Dirk Behme) by bellard · 19 years ago
  94. 6ea83fe MIPS FPU support (Marius Goeger) by bellard · 19 years ago
  95. ba9a74d fix wrong bitmasks for CP0_Context and CP0_EntryHi (Thiemo Seufer) by bellard · 19 years ago
  96. 3d9fb9fe cosmetics (Thiemo Seufer) by bellard · 19 years ago
  97. f9ebe43 removed unnecessary header by bellard · 19 years ago
  98. 09c56b8 Avoid flushing of global TLB entries for differing ASIDs (Thiemo Seufer). by pbrook · 19 years ago
  99. 98c1b82 e bitfields in mips TLB structures (Thiemo Seufer). by pbrook · 19 years ago
  100. 4ad40f3 MIPS fixes (Daniel Jacobowitz) by bellard · 19 years ago