- b7e516c Kill off cpu_state_reset() by Andreas Färber · 13 years ago
- 445e957 target-sh4: Let cpu_sh4_init() return SuperHCPU by Andreas Färber · 13 years ago
- 2b4b490 target-sh4: Start QOM'ifying CPU init by Andreas Färber · 13 years ago
- c4bb0f9 target-sh4: QOM'ify CPU reset by Andreas Färber · 13 years ago
- 339894b target-sh4: QOM'ify CPU by Andreas Färber · 13 years ago
- 73e5716 target-sh4: Don't overuse CPUState by Andreas Färber · 13 years ago
- 1bba0dc Rename cpu_reset() to cpu_state_reset() by Andreas Färber · 13 years ago
- 2d0b9ac target-sh4: Clean includes by Stefan Weil · 13 years ago
- 0cdb955 target-sh4: ignore ocbp and ocbwb instructions by Aurelien Jarno · 13 years ago
- f840fa9 target-sh4: Fix operands for fipr, ftrv instructions by Stefan Weil · 13 years ago
- 7267c09 Use glib memory allocation and free functions by Anthony Liguori · 14 years ago
- 2b41f10 Remove exec-all.h include directives by Blue Swirl · 14 years ago
- e87b7cb Remove unused function parameters from gen_pc_load and rename the function by Stefan Weil · 14 years ago
- 4b4a72e Fix conversions from pointer to tcg_target_long by Stefan Weil · 14 years ago
- 7026259 target-sh4: fix negc by Aurelien Jarno · 14 years ago
- b2d9eda target-sh4: implement negc using TCG by Aurelien Jarno · 14 years ago
- 2411fde target-sh4: use rotl/rotr when possible by Aurelien Jarno · 14 years ago
- c5c1913 target-sh4: use setcond when possible by Aurelien Jarno · 14 years ago
- be15c50 target-sh4: log instructions start in TCG code by Aurelien Jarno · 14 years ago
- 6f396c8 target-sh4: simplify comparisons after a 'and' op by Aurelien Jarno · 14 years ago
- 4f6493f target-sh4: fix reset on r2d by Aurelien Jarno · 14 years ago
- fd4bab1 target-sh4: optimize exceptions by Aurelien Jarno · 14 years ago
- 17075f1 target-sh4: add ftrv instruction by Aurelien Jarno · 14 years ago
- af8c2bd target-sh4: add fipr instruction by Aurelien Jarno · 14 years ago
- a0d4ac3 target-sh4: implement flush-to-zero by Aurelien Jarno · 14 years ago
- 26ac1ea target-sh4: define FPSCR constants by Aurelien Jarno · 14 years ago
- 442599a target-sh4: use default-NaN mode by Aurelien Jarno · 14 years ago
- 86865c5 target-sh4: fix fpu disabled/illegal exception by Aurelien Jarno · 14 years ago
- 9a78eea target-xxx: Use fprintf_function (format checking) by Stefan Weil · 14 years ago
- 935fc17 target-sh4: Add support for ldc & stc with sgr by Alexandre Courbot · 15 years ago
- 8e9b067 target-sh4: Split the LDST macro into 2 sub-macros by Alexandre Courbot · 15 years ago
- 6f0f607 target-sh4: Remove duplicate CPU log. by Richard Henderson · 15 years ago
- 1a7ff92 remove TARGET_* defines from translate-all.c by Paolo Bonzini · 15 years ago
- 1f48681 target-sh4: MMU: fix mem_idx computation by Aurelien Jarno · 15 years ago
- 3101e99 target-sh4: minor optimisations by Aurelien Jarno · 15 years ago
- 72cf2d4 Fix sys-queue.h conflict for good by Blue Swirl · 15 years ago
- 8167ee8 Update to a hopefully more future proof FSF address by Blue Swirl · 16 years ago
- 5561650 Include assert.h from qemu-common.h by Paul Brook · 16 years ago
- 0bf46a4 qemu: introduce qemu_init_vcpu (Marcelo Tosatti) by aliguori · 16 years ago
- 1b530a6 Add new command line option -singlestep for tcg single stepping. by aurel32 · 16 years ago
- 852d481 SH: Improve movca.l/ocbi emulation. by edgar_igl · 16 years ago
- 66c7c80 SH: Implement MOVCO.L and MOVLI.L by aurel32 · 16 years ago
- c2432a4 SH7750/51: add register BCR3, BCR4, PCR, RTCOR, RTCNT, RTCSR, SDMR2, SDMR3 and fix BCR2 support by aurel32 · 16 years ago
- 0d0266a targets: remove error handling from qemu_malloc() callers (Avi Kivity) by aliguori · 16 years ago
- eca1bdf Log reset events (Jan Kiszka) by aliguori · 16 years ago
- 8fec2b8 global s/loglevel & X/qemu_loglevel_mask(X)/ (Eduardo Habkost) by aliguori · 16 years ago
- 93fcfe3 Convert references to logfile/loglevel to use qemu_log*() macros by aliguori · 16 years ago
- 5b7141a sh4: Add FMAC instruction support by aurel32 · 16 years ago
- fad6cb1 Update FSF address in GPL/LGPL boilerplate by aurel32 · 16 years ago
- df9247b tcg_temp_local_new should take no parameter by aurel32 · 16 years ago
- b1503cd Use the ARRAY_SIZE() macro where appropriate. by malc · 16 years ago
- 56cd2b9 target-sh4: make the initial value of SR easier to read by aurel32 · 16 years ago
- f3ff7fa target-sh4: don't disable FPU instructions in user mode by aurel32 · 16 years ago
- bacc637 target-sh4: disable debug code by aurel32 · 16 years ago
- 71968fa target-sh4: add prefi, icbi, synco by aurel32 · 16 years ago
- a9c43f8 target-sh4: add SH7785 as CPU option by aurel32 · 16 years ago
- f619837 target-sh4: check FD bit for FP instructions by aurel32 · 16 years ago
- b79e175 SH4: kill a few warnings by aurel32 · 16 years ago
- d8299bc SH4: Implement FD bit by aurel32 · 16 years ago
- c0ce998 Use sys-queue.h for break/watchpoint managment (Jan Kiszka) by aliguori · 16 years ago
- 11bb09f target-sh4: fix 64-bit fmov to/from memory by aurel32 · 16 years ago
- 12d9613 target-sh4: fix fldi0/fldi1 by aurel32 · 16 years ago
- 66ba317 target-sh4: map FP registers as TCG variables by aurel32 · 16 years ago
- a1d1bb3 Refactor and enhance break/watchpoint API (Jan Kiszka) by aliguori · 16 years ago
- a7812ae TCG variable type checking. by pbrook · 16 years ago
- b1d8e52 Fix undeclared symbol warnings from sparse by blueswir1 · 16 years ago
- 7526aa2 SH4: Implement MOVUA.L by aurel32 · 16 years ago
- bdbf22e SH4: fix single-stepping by aurel32 · 16 years ago
- c69e326 SH4: Fix swap.b by aurel32 · 16 years ago
- 1ed1a78 Silence some warnings about no value returned from non-void function by blueswir1 · 16 years ago
- 36aa55d Add concat_i32_i64 op. by pbrook · 16 years ago
- b55266b Suppress gcc 4.x -Wpointer-sign (included in -Wall) warnings by blueswir1 · 16 years ago
- fe25591 SH4: Privilege check for instructions by aurel32 · 16 years ago
- 7478757 sh4: doesn't set the cpu_model_str by aurel32 · 16 years ago
- f24f381 SH4: sleep instruction bug fix by aurel32 · 16 years ago
- 0fd3ca3 sh4: CPU versioning. by aurel32 · 16 years ago
- 86e0abc SH4: fix a regression introduced in r5122 by aurel32 · 16 years ago
- 17b086f SH4: Remove dyngen leftovers by aurel32 · 16 years ago
- 7fdf924 SH4: final conversion to TCG by aurel32 · 16 years ago
- cc4ba6a SH4: convert floating-point ops to TCG by aurel32 · 16 years ago
- c55497e SH4: Remove most uses of cpu_T[0] and cpu_T[1] by aurel32 · 16 years ago
- 7efbe24 SH4: TCG optimisations by aurel32 · 16 years ago
- 69d6275 SH4: Convert remaining non-fp ops to TCG by aurel32 · 16 years ago
- c047da1 SH4: Convert shift functions to TCG by aurel32 · 16 years ago
- 390af82 SH4: convert control/status register load/store to TCG by aurel32 · 16 years ago
- fa4da10 SH4: Convert memory loads/stores to TCG by aurel32 · 16 years ago
- 6f06939 SH4: convert some more arithmetics ops to TCG by aurel32 · 16 years ago
- e6afc2f SH4: convert a few helpers to TCG by aurel32 · 16 years ago
- 1000822 SH4: convert branch/jump instructions to TCG by aurel32 · 16 years ago
- a462561 SH4: convert simple compare instructions to TCG by aurel32 · 16 years ago
- 3a8a44c SH4: convert a few control or system register functions to TCG by aurel32 · 16 years ago
- 829337a SH4: Fix bugs introduce in r5099 by aurel32 · 16 years ago
- 5aa3b1e SH4: fix xtrct Rm,Rn (broken in r5103) by aurel32 · 16 years ago
- 559dd74 SH4: convert logic and arithmetic ops to TCG by aurel32 · 16 years ago
- 1e8864f SH4: use TCG variables for gregs by aurel32 · 16 years ago
- 3bf73a4 SH4: use uint32_t/i32 based types/ops by aurel32 · 16 years ago
- 8f99cc6 SH4: Convert register moves to TCG by aurel32 · 16 years ago
- a73d39b SH4: Convert dyngen registers moves to TCG by aurel32 · 16 years ago
- ccc9cc5 SH4: Convert immediate loads to TCG by aurel32 · 16 years ago
- 988d7ea SH4: add support for TCG helpers by aurel32 · 16 years ago