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qemu / qemu / ba18fa2a8c9e1746f8229322be8e8893d9a3b192 / target-arm / cpu.c
  1. c43e853 Merge remote-tracking branch 'remotes/ehabkost/tags/x86-pull-request' into staging by Peter Maydell · 8 years ago
  2. ce5b1bb exec: move cpu_exec_init() calls to realize functions by Laurent Vivier · 8 years ago
  3. e97da98 target-arm: Make page size a runtime setting by Peter Maydell · 8 years ago
  4. dcf578e arm: add Cortex A7 CPU parameters by Andrey Yurovsky · 8 years ago
  5. 15a21fe target-arm: Add mp-affinity property for ARM CPU class by Pavel Fedin · 9 years ago
  6. bd7d00f target-arm: Provide hook to tell GICv3 about changes of security state by Peter Maydell · 9 years ago
  7. 63c9155 cpu: move exec-all.h inclusion out of cpu.h by Paolo Bonzini · 9 years ago
  8. da34e65 include/qemu/osdep.h: Don't include qapi/error.h by Markus Armbruster · 9 years ago
  9. ed50ff7 target-arm: cpu: Move cpu_is_big_endian to header by Peter Crosthwaite · 9 years ago
  10. f9fd40e target-arm: implement SCTLR.B, drop bswap_code by Paolo Bonzini · 9 years ago
  11. 4054bfa target-arm: Add the pmceid0 and pmceid1 registers by Alistair Francis · 9 years ago
  12. 3826121 target-arm: Implement checking of fired watchpoint by Sergey Fedorov · 9 years ago
  13. 3c2f7bb target-arm: Don't report presence of EL2 if it doesn't exist by Peter Maydell · 9 years ago
  14. b3820e6 gdb: provide the name of the architecture in the target.xml by David Hildenbrand · 9 years ago
  15. 0faea0c target-arm: Implement cpu_get_phys_page_attrs_debug by Peter Maydell · 9 years ago
  16. 017518c target-arm: Implement asidx_from_attrs by Peter Maydell · 9 years ago
  17. 9e273ef target-arm: Add QOM property for Secure memory region by Peter Maydell · 9 years ago
  18. 74c21bd target-arm: Clean up includes by Peter Maydell · 9 years ago
  19. da2b914 target-arm: support QMP dump-guest-memory by Andrew Jones · 9 years ago
  20. 9af9e0f error: Strip trailing '\n' from error string arguments (again) by Markus Armbruster · 9 years ago
  21. 3090147 target-arm: raise exception on misaligned LDREX operands by Andrew Baumann · 9 years ago
  22. 4c315c2 qdev: Protect device-list-properties against broken devices by Markus Armbruster · 9 years ago
  23. 0f4a9e4 target-arm: Refactor CPU affinity handling by Pavel Fedin · 9 years ago
  24. 8f6fd32 arm: Remove hw_error() usages. by Peter Crosthwaite · 9 years ago
  25. f128bf2 arm: cpu: assert() on no-EL2 virt IRQ error condition. by Peter Crosthwaite · 9 years ago
  26. b4d3978 target-arm: Add the AArch64 view of the Secure physical timer by Peter Maydell · 10 years ago
  27. 49a6619 target-arm: Add debug check for mismatched cpreg resets by Peter Maydell · 10 years ago
  28. b0e66d9 target-arm: Add the Hypervisor timer by Edgar E. Iglesias · 10 years ago
  29. 4844062 disas: arm: QOMify target specific disas setup by Peter Crosthwaite · 10 years ago
  30. 4bad9e3 cpu: Change cpu_exec_init() arg to cpu, not env by Peter Crosthwaite · 10 years ago
  31. 5a790cc cpu: Add Error argument to cpu_exec_init() by Bharata B Rao · 10 years ago
  32. cc7a8ea Include qapi/qmp/qerror.h exactly where needed by Markus Armbruster · 10 years ago
  33. d6a6b13 target-arm: Add support for Cortex-R5 by Peter Crosthwaite · 10 years ago
  34. 6cb0b01 target-arm: Add registers for PMSAv7 by Peter Crosthwaite · 10 years ago
  35. 3281af8 target-arm/helper.c: define MPUIR register by Peter Crosthwaite · 10 years ago
  36. b061a82 target-arm: Do not reset sysregs marked as ALIAS by Sergey Fedorov · 10 years ago
  37. ba890a9 target-arm: Add the Cortex-M4 CPU by Aurelio C. Remonda · 10 years ago
  38. 8f325f5 arm: Add has-mpu property by Peter Crosthwaite · 10 years ago
  39. 62b44f0 target-arm: Add the THUMB_DSP feature by Aurelio C. Remonda · 10 years ago
  40. eb5e1d3 target-arm: Use the kernel's idea of MPIDR if we're using KVM by Pavel Fedin · 10 years ago
  41. 012a906 target-arm: Update interrupt handling to use target EL by Greg Bellows · 10 years ago
  42. 8c6084b target-arm: Move setting of exception info into tlb_fill by Peter Maydell · 10 years ago
  43. 3d5c84f target-arm: Adjust id_aa64pfr0 when has_el3 CPU property disabled by Sergey Fedorov · 10 years ago
  44. 7ebd5f2 target-arm: rename c1_coproc to cpacr_el1 by Sergey Fedorov · 10 years ago
  45. fb8d6c2 target-arm: Add CPU property to disable AArch64 by Greg Bellows · 10 years ago
  46. 84f2bed target-arm: Guest cpu endianness determination for virtio KVM ARM/ARM64 by Pranavkumar Sawargaonkar · 10 years ago
  47. 5097227 target-arm: Change reset to highest available EL by Greg Bellows · 10 years ago
  48. c0ccb02 target-arm: add cpu feature EL3 to CPUs with Security Extensions by Fabian Aggeler · 10 years ago
  49. 51942ae target-arm: Add ARMCPU secure property by Greg Bellows · 10 years ago
  50. 0882848 target-arm: Add feature unset function by Greg Bellows · 10 years ago
  51. b848ce2 target-arm: make IFAR/DFAR banked by Fabian Aggeler · 10 years ago
  52. 137feaa target-arm: add SCTLR_EL3 and make SCTLR banked by Fabian Aggeler · 10 years ago
  53. b5c633c target-arm: Separate out M profile cpu_exec_interrupt handling by Peter Maydell · 10 years ago
  54. 14e5f10 target-arm: Correct sense of the DCZID DZP bit by Peter Maydell · 10 years ago
  55. 9812860 target-arm: add emulation of PSCI calls for system emulation by Rob Herring · 10 years ago
  56. 0adf7d3 target-arm: do not set do_interrupt handlers for ARM and AArch64 user modes by Rob Herring · 10 years ago
  57. 543486d target-arm: add powered off cpu state by Rob Herring · 10 years ago
  58. 2472b6c gdbstub: Allow target CPUs to specify watchpoint STOP_BEFORE_ACCESS flag by Peter Maydell · 10 years ago
  59. 136e67e target-arm: Add support for VIRQ and VFIQ by Edgar E. Iglesias · 10 years ago
  60. 043b7f8 target-arm: Break out exception masking to a separate func by Edgar E. Iglesias · 10 years ago
  61. c0f4af1 target-arm: Don't handle c15_cpar changes via tb_flush() by Peter Maydell · 10 years ago
  62. 46747d1 target-arm: Implement setting guest breakpoints by Peter Maydell · 10 years ago
  63. e892571 target-arm: Use cpu_exec_interrupt qom hook by Richard Henderson · 10 years ago
  64. 3ff6fc9 target-arm: Implement handling of fired watchpoints by Peter Maydell · 10 years ago
  65. 9ee98ce target-arm: Implement setting of watchpoints by Peter Maydell · 10 years ago
  66. 34bf774 target-arm: Fix broken indentation in arm_cpu_reest() by Martin Galvan · 10 years ago
  67. 6e3cf5d target-arm: Fix resetting issues on ARMv7-M CPUs by Martin Galvan · 10 years ago
  68. f7838b5 arm: cortex-a9: Fix cache-line size and associativity by Peter Crosthwaite · 11 years ago
  69. 48eb3ae target-arm: Adjust debug ID registers per-CPU by Peter Maydell · 11 years ago
  70. 2f0180c target-arm: Make far_el1 an array by Edgar E. Iglesias · 11 years ago
  71. dd032e3 target-arm: Introduce per-CPU field for PSCI version by Pranavkumar Sawargaonkar · 11 years ago
  72. da5141f target-arm: VFPv4 implies half-precision extension by Peter Maydell · 11 years ago
  73. 25f748e target-arm: Clean up handling of ARMv8 optional feature bits by Peter Maydell · 11 years ago
  74. fb8ad9f target-arm: Remove unnecessary setting of feature bits by Peter Maydell · 11 years ago
  75. 46d9dfd target-arm: arm_any_initfn() should never set ARM_FEATURE_AARCH64 by Peter Maydell · 11 years ago
  76. 4e624ed target-arm: add support for v8 VMULL.P64 instruction by Peter Maydell · 11 years ago
  77. f1ecb91 target-arm: add support for v8 SHA1 and SHA256 instructions by Ard Biesheuvel · 11 years ago
  78. 00d0f7c target-arm: Fix segfault on startup when KVM enabled by Christoffer Dall · 11 years ago
  79. 50a2c6e kvm: reset state from the CPU's reset method by Paolo Bonzini · 12 years ago
  80. c29f9a0 target-arm: Make Cortex-A15 CBAR read-only by Peter Maydell · 11 years ago
  81. f318cec target-arm: Implement CBAR for Cortex-A57 by Peter Maydell · 11 years ago
  82. 3933443 target-arm: Implement RVBAR register by Peter Maydell · 11 years ago
  83. a50c0f5 target-arm: Implement ARMv8 MVFR registers by Peter Maydell · 11 years ago
  84. 6cd8a26 target-arm: Implement AArch64 views of fault status and data registers by Rob Herring · 11 years ago
  85. 8c6afa6 target-arm: A64: Correctly fault FP/Neon if CPACR.FPEN set by Peter Maydell · 11 years ago
  86. ccd3808 target-arm: Split out private-to-target functions into internals.h by Peter Maydell · 11 years ago
  87. 00c8cb0 cputlb: Change tlb_flush() argument to CPUState by Andreas Färber · 11 years ago
  88. f0c3c50 cpu: Move breakpoints field from CPU_COMMON to CPUState by Andreas Färber · 12 years ago
  89. 7510454 cpu: Turn cpu_handle_mmu_fault() into a CPUClass hook by Andreas Färber · 12 years ago
  90. 8c2e1b0 cpu: Turn cpu_has_work() into a CPUClass hook by Andreas Färber · 12 years ago
  91. eb0ecd5 target-arm: Add support for AArch32 ARMv8 CRC32 instructions by Will Newton · 11 years ago
  92. 4cc3561 target-arm: Store AIF bits in env->pstate for AArch32 by Peter Maydell · 11 years ago
  93. 8af35c3 target-arm: Implement AArch64 cache invalidate/clean ops by Peter Maydell · 11 years ago
  94. 7da845b target-arm: A64: Make cache ID registers visible to AArch64 by Peter Maydell · 11 years ago
  95. 67ed771 target-arm: Fix raw read and write functions on AArch64 registers by Peter Maydell · 11 years ago
  96. c4241c7 target-arm: Drop success/fail return from cpreg read and write functions by Peter Maydell · 11 years ago
  97. 76e3e1b target-arm: Define names for SCTLR bits by Peter Maydell · 11 years ago
  98. 51a9b04 ARM: Convert MIDR to a property by Alistair Francis · 11 years ago
  99. 133fe77 Merge remote branch 'luiz/queue/qmp' into qmpq by Edgar E. Iglesias · 11 years ago
  100. 83e6813 target-arm: Switch ARMCPUInfo arrays to use terminator entries by Peter Maydell · 11 years ago