1. b4d3978 target-arm: Add the AArch64 view of the Secure physical timer by Peter Maydell · 9 years ago
  2. b0e66d9 target-arm: Add the Hypervisor timer by Edgar E. Iglesias · 9 years ago
  3. 3281af8 target-arm/helper.c: define MPUIR register by Peter Crosthwaite · 10 years ago
  4. 8f325f5 arm: Add has-mpu property by Peter Crosthwaite · 10 years ago
  5. a8e81b3 arm: Implement uniprocessor with MP config by Peter Crosthwaite · 10 years ago
  6. eb5e1d3 target-arm: Use the kernel's idea of MPIDR if we're using KVM by Pavel Fedin · 10 years ago
  7. 13b72b2 target-arm: Fix REVIDR reset value by Sergey Fedorov · 10 years ago
  8. 51942ae target-arm: Add ARMCPU secure property by Greg Bellows · 10 years ago
  9. 9812860 target-arm: add emulation of PSCI calls for system emulation by Rob Herring · 10 years ago
  10. 543486d target-arm: add powered off cpu state by Rob Herring · 10 years ago
  11. e892571 target-arm: Use cpu_exec_interrupt qom hook by Richard Henderson · 10 years ago
  12. 48eb3ae target-arm: Adjust debug ID registers per-CPU by Peter Maydell · 10 years ago
  13. 75c9a1a target-arm: Implement vCPU reset via KVM_ARM_VCPU_INIT for 32-bit CPUs by Peter Maydell · 10 years ago
  14. dd032e3 target-arm: Introduce per-CPU field for PSCI version by Pranavkumar Sawargaonkar · 11 years ago
  15. 228d5e0 target-arm: Common kvm_arm_vcpu_init() for KVM ARM and KVM ARM64 by Pranavkumar Sawargaonkar · 11 years ago
  16. 1773111 target-arm: Dump 32-bit CPU state if 64 bit CPU is in AArch32 by Peter Maydell · 11 years ago
  17. f318cec target-arm: Implement CBAR for Cortex-A57 by Peter Maydell · 11 years ago
  18. 3933443 target-arm: Implement RVBAR register by Peter Maydell · 11 years ago
  19. a50c0f5 target-arm: Implement ARMv8 MVFR registers by Peter Maydell · 11 years ago
  20. 52e60cd target-arm: Implement AArch64 EL1 exception handling by Rob Herring · 11 years ago
  21. aca3f40 target-arm: A64: Implement DC ZVA by Peter Maydell · 11 years ago
  22. e60cef8 target-arm: Implement AArch64 ID and feature registers by Peter Maydell · 11 years ago
  23. 68e0a40 ARM: cpu: add "reset_hivecs" property by Antony Pavlov · 11 years ago
  24. 3541add target-arm: Don't hardcode KVM target CPU to be A15 by Peter Maydell · 11 years ago
  25. 5de1643 target-arm: Allow secondary KVM CPUs to be booted via PSCI by Peter Maydell · 11 years ago
  26. 54d3e3f target-arm: Add ARMCPU field for Linux device-tree 'compatible' string by Peter Maydell · 11 years ago
  27. 96c0421 target-arm: Add AArch64 gdbstub support by Alexander Graf · 11 years ago
  28. 14ade10 target-arm: Add AArch64 translation stub by Alexander Graf · 11 years ago
  29. d14d42f target-arm: Add new AArch64CPUInfo base class and subclasses by Peter Maydell · 11 years ago
  30. 55d284a target-arm: Implement the generic timer by Peter Maydell · 11 years ago
  31. 5b50e79 cpu: Introduce CPUClass::gdb_{read,write}_register() by Andreas Färber · 11 years ago
  32. 00b941e cpu: Turn cpu_get_phys_page_debug() into a CPUClass hook by Andreas Färber · 11 years ago
  33. 6e42be7 cpu: Drop unnecessary dynamic casts in *_env_get_cpu() by Andreas Färber · 12 years ago
  34. 878096e cpu: Turn cpu_dump_{state,statistics}() into CPUState hooks by Andreas Färber · 12 years ago
  35. 2d8e5a0 target-arm: Reinitialize all KVM VCPU registers on reset by Peter Maydell · 11 years ago
  36. 721fae1 target-arm: Convert TCG to using (index,value) list for cp migration by Peter Maydell · 11 years ago
  37. 3cc1d20 target-arm: port ARM CPU save/load to use VMState by Juan Quintela · 12 years ago
  38. e6f010c target-arm: Override do_interrupt for ARMv7-M profile by Andreas Färber · 12 years ago
  39. 97a8ea5 cpu: Replace do_interrupt() by CPUClass::do_interrupt method by Andreas Färber · 12 years ago
  40. fadf982 cpu: Introduce ENV_OFFSET macros by Andreas Färber · 12 years ago
  41. 1496926 target-arm: Update ARMCPU to QOM realizefn by Andreas Färber · 12 years ago
  42. 14cccb6 qom: move include files to include/qom/ by Paolo Bonzini · 12 years ago
  43. 2771db2 target-arm: Convert cp15 crn=1 registers by Peter Maydell · 13 years ago
  44. 2ceb98c target-arm: Add register_cp_regs_for_features() by Peter Maydell · 13 years ago
  45. 4b6a83f target-arm: initial coprocessor register framework by Peter Maydell · 13 years ago
  46. c5fad12 target-arm: Move A9 config_base_address reset value to ARMCPU by Peter Maydell · 13 years ago
  47. 778c3a0 target-arm: Change cpu_arm_init() return type to ARMCPU by Andreas Färber · 13 years ago
  48. 85df378 target-arm: Move cache ID register setup to cpu specific init fns by Peter Maydell · 13 years ago
  49. 2e4d7e3 target-arm: Move feature register setup to per-CPU init fns by Peter Maydell · 13 years ago
  50. 0ca7e01 target-arm: Move SCTLR reset value setup to per cpu init fns by Peter Maydell · 13 years ago
  51. 64e1671 target-arm: Move CTR setup to per cpu init fns by Peter Maydell · 13 years ago
  52. bd35c35 target-arm: Move MVFR* setup to per cpu init fns by Peter Maydell · 13 years ago
  53. 325b3ce target-arm: Move FPSID config to cpu init fns by Peter Maydell · 13 years ago
  54. 581be09 target-arm: Move feature bit settings to CPU init fns by Peter Maydell · 13 years ago
  55. 777dc78 target-arm: Add QOM subclasses for each ARM cpu implementation by Peter Maydell · 13 years ago
  56. dec9c2d target-arm: Minimalistic CPU QOM'ification by Andreas Färber · 13 years ago