- b438362 tcg/riscv: Fix StoreStore barrier generation by Roman Artemev · 3 months ago
- 4b7868f tcg/riscv: Enable native vector support for TCG host by TANG Tiancheng · 5 months ago
- d184321 tcg/riscv: Implement vector roti/v/x ops by TANG Tiancheng · 5 months ago
- cbde22f tcg/riscv: Implement vector shi/s/v ops by TANG Tiancheng · 5 months ago
- 1631f19 tcg/riscv: Implement vector min/max ops by TANG Tiancheng · 5 months ago
- 101c1ef tcg/riscv: Implement vector sat/mul ops by TANG Tiancheng · 5 months ago
- dc9cd4e tcg/riscv: Accept constant first argument to sub_vec by Richard Henderson · 5 months ago
- c283c07 tcg/riscv: Implement vector neg ops by TANG Tiancheng · 5 months ago
- a31768c tcg/riscv: Implement vector cmp/cmpsel ops by TANG Tiancheng · 5 months ago
- 5a63f59 tcg/riscv: Add support for basic vector opcodes by TANG Tiancheng · 5 months ago
- d4be6ee tcg/riscv: Implement vector mov/dup{m/i} by TANG Tiancheng · 5 months ago
- f63e708 tcg/riscv: Add basic support for vector by Huang Shiyuan · 5 months ago
- b86c6ba util/cpuinfo-riscv: Support host/cpuinfo.h for riscv by Richard Henderson · 8 months ago
- 21e9a8a tcg: Add TCGConst argument to tcg_target_const_match by Richard Henderson · 1 year, 4 months ago
- caf3eac tcg: Introduce TCG_TARGET_HAS_tst by Richard Henderson · 1 year, 2 months ago
- b701f19 tcg: Remove TCG_TARGET_HAS_neg_{i32,i64} by Richard Henderson · 1 year, 4 months ago
- 3871be7 tcg: Remove TCG_TARGET_HAS_movcond_{i32,i64} by Richard Henderson · 1 year, 4 months ago
- 4944d35 tcg/riscv: Use tcg_use_softmmu by Richard Henderson · 1 year, 5 months ago
- cf0ed30 tcg/riscv: Do not reserve TCG_GUEST_BASE_REG for guest_base zero by Richard Henderson · 1 year, 5 months ago
- 7893e42 tcg: Correct invalid mentions of 'softmmu' by 'system-mode' by Philippe Mathieu-Daudé · 1 year, 5 months ago
- 9358fbb tcg: Add tcg_out_tb_start backend hook by Richard Henderson · 1 year, 7 months ago
- ebe92db tcg: pass vece to tcg_target_const_match() by Jiajie Chen · 1 year, 6 months ago
- 4daad8d tcg: spelling fixes by Michael Tokarev · 1 year, 6 months ago
- 41e4c0a tcg/riscv: Implement negsetcond_* by Richard Henderson · 1 year, 7 months ago
- 3635502 tcg: Introduce negsetcond opcodes by Richard Henderson · 1 year, 7 months ago
- 13d885b tcg: Unify TCG_TARGET_HAS_extr[lh]_i64_i32 by Richard Henderson · 1 year, 6 months ago
- d46259c tcg: Split out tcg-target-reg-bits.h by Richard Henderson · 1 year, 10 months ago
- d0a9bb5 tcg: Add tlb_fast_offset to TCGContext by Richard Henderson · 2 years ago
- 238f438 tcg: Widen CPUTLBEntry comparators to 64-bits by Richard Henderson · 2 years ago
- 8aefe1f tcg/riscv: Remove TARGET_LONG_BITS, TCG_TYPE_TL by Richard Henderson · 1 year, 10 months ago
- 1943394 tcg: Remove TCG_TARGET_TLB_DISPLACEMENT_BITS by Richard Henderson · 2 years ago
- a30498f tcg/riscv: Support CTZ, CLZ from Zbb by Richard Henderson · 1 year, 10 months ago
- a18d783 tcg/riscv: Implement movcond by Richard Henderson · 1 year, 10 months ago
- f645369 tcg/riscv: Improve setcond expansion by Richard Henderson · 1 year, 10 months ago
- 0956ecd tcg/riscv: Support CPOP from Zbb by Richard Henderson · 1 year, 10 months ago
- 7b4d527 tcg/riscv: Support REV8 from Zbb by Richard Henderson · 1 year, 10 months ago
- 19d016a tcg/riscv: Support rotates from Zbb by Richard Henderson · 1 year, 10 months ago
- eda1515 tcg/riscv: Use ADD.UW for guest address generation by Richard Henderson · 1 year, 10 months ago
- d1c3f4e tcg/riscv: Support ADD.UW, SEXT.B, SEXT.H, ZEXT.H from Zba+Zbb by Richard Henderson · 1 year, 10 months ago
- 99f4ec6 tcg/riscv: Support ANDN, ORN, XNOR from Zbb by Richard Henderson · 1 year, 10 months ago
- 9e3e0bc tcg/riscv: Probe for Zba, Zbb, Zicond extensions by Richard Henderson · 1 year, 10 months ago
- aece72b tcg: Add page_bits and page_mask to TCGContext by Richard Henderson · 2 years ago
- fecccfc tcg: Split INDEX_op_qemu_{ld,st}* for guest address size by Richard Henderson · 1 year, 10 months ago
- 37e523f tcg/riscv: Use atom_and_align_for_opc by Richard Henderson · 1 year, 11 months ago
- 12fde9b tcg: Add INDEX_op_qemu_{ld,st}_i128 by Richard Henderson · 2 years, 4 months ago
- 7b88010 tcg: Introduce tcg_target_has_memory_bswap by Richard Henderson · 1 year, 11 months ago
- 933b331 tcg/riscv: Support softmmu unaligned accesses by Richard Henderson · 1 year, 10 months ago
- 9161e9a tcg/riscv: Use full load/store helpers in user-only mode by Richard Henderson · 1 year, 11 months ago
- 0cadc1e tcg: Unify helper_{be,le}_{ld,st}* by Richard Henderson · 2 years, 4 months ago
- f0f4353 tcg/riscv: Simplify constraints on qemu_ld/st by Richard Henderson · 1 year, 11 months ago
- 61b6daa tcg/riscv: Convert tcg_out_qemu_{ld,st}_slow_path by Richard Henderson · 1 year, 11 months ago
- 001dddf tcg/riscv: Introduce prepare_host_addr by Richard Henderson · 1 year, 10 months ago
- f704197 tcg/riscv: Rationalize args to tcg_out_qemu_{ld,st} by Richard Henderson · 1 year, 11 months ago
- aeb6326 tcg/riscv: Require TCG_TARGET_REG_BITS == 64 by Richard Henderson · 2 years ago
- 3ea9be3 tcg/riscv: Conditionalize tcg_out_exts_i32_i64 by Richard Henderson · 1 year, 11 months ago
- 767c250 tcg: Introduce tcg_out_xchg by Richard Henderson · 1 year, 11 months ago
- b3dfd5f tcg: Introduce tcg_out_movext by Richard Henderson · 1 year, 11 months ago
- b8b94ac tcg: Split out tcg_out_extrl_i64_i32 by Richard Henderson · 1 year, 11 months ago
- b9bfe00 tcg: Split out tcg_out_extu_i32_i64 by Richard Henderson · 1 year, 11 months ago
- 9c6aa27 tcg: Split out tcg_out_exts_i32_i64 by Richard Henderson · 1 year, 11 months ago
- 9ecf5f6 tcg: Split out tcg_out_ext32u by Richard Henderson · 1 year, 11 months ago
- 52bf339 tcg: Split out tcg_out_ext32s by Richard Henderson · 1 year, 11 months ago
- 379afdf tcg: Split out tcg_out_ext16u by Richard Henderson · 1 year, 11 months ago
- 753e42e tcg: Split out tcg_out_ext16s by Richard Henderson · 1 year, 11 months ago
- d0e66c8 tcg: Split out tcg_out_ext8u by Richard Henderson · 1 year, 11 months ago
- 678155b tcg: Split out tcg_out_ext8s by Richard Henderson · 1 year, 11 months ago
- 5427a9a tcg: Add TCG_TARGET_CALL_{RET,ARG}_I128 by Richard Henderson · 2 years, 4 months ago
- 5e3d0c1 tcg: Introduce tcg_target_call_oarg_reg by Richard Henderson · 2 years, 4 months ago
- 6a6d772 tcg: Introduce tcg_out_addi_ptr by Richard Henderson · 2 years, 5 months ago
- 9d9db41 tcg/riscv: Use tcg_pcrel_diff in tcg_out_ldst by Richard Henderson · 2 years, 1 month ago
- 493c9b1 tcg/riscv: Implement direct branch for goto_tb by Richard Henderson · 2 years, 3 months ago
- 9ae958e tcg/riscv: Introduce OPC_NOP by Richard Henderson · 2 years, 3 months ago
- 2fd2e78 tcg: Remove TCG_TARGET_HAS_direct_jump by Richard Henderson · 2 years, 3 months ago
- 90c0fee tcg: Always define tb_target_set_jmp_target by Richard Henderson · 2 years, 3 months ago
- 0012e35 tcg: Move tb_target_set_jmp_target declaration to tcg.h by Richard Henderson · 2 years, 3 months ago
- 0fe1c98 tcg: Change tb_target_set_jmp_target arguments by Richard Henderson · 2 years, 3 months ago
- cf7d6b8 tcg: Split out tcg_out_goto_tb by Richard Henderson · 2 years, 3 months ago
- becc452 tcg: Introduce get_jmp_target_addr by Richard Henderson · 2 years, 3 months ago
- 7f83167 tcg: Replace asserts on tcg_jmp_insn_offset by Richard Henderson · 2 years, 3 months ago
- b55a8d9 tcg: Split out tcg_out_exit_tb by Richard Henderson · 2 years, 3 months ago
- 052e653 Merge tag 'pull-riscv-to-apply-20230106' of https://github.com/alistair23/qemu into staging by Peter Maydell · 2 years, 2 months ago
- 2e3a933 tcg/riscv: Fix base register for user-only qemu_ld/st by Richard Henderson · 2 years, 4 months ago
- 9b24668 tcg/riscv: Fix reg overlap case in tcg_out_addsub2 by Richard Henderson · 2 years, 4 months ago
- 6272276 tcg/riscv: Fix range matched by TCG_CT_CONST_M12 by Richard Henderson · 2 years, 4 months ago
- cee44b0 tcg: Add TCGHelperInfo argument to tcg_out_call by Richard Henderson · 2 years, 5 months ago
- eb8b022 tcg: Replace TCG_TARGET_EXTEND_ARGS with TCG_TARGET_CALL_ARG_I32 by Richard Henderson · 2 years, 5 months ago
- c8eef96 tcg: Replace TCG_TARGET_CALL_ALIGN_ARGS with TCG_TARGET_CALL_ARG_I64 by Richard Henderson · 2 years, 5 months ago
- e03b568 Replace config-time define HOST_WORDS_BIGENDIAN by Marc-André Lureau · 3 years ago
- a3fb7c9 tcg/riscv: Support raising sigbus for user-only by Richard Henderson · 3 years, 7 months ago
- fc313c6 exec/memop: Adding signedness to quad definitions by Frédéric Pétrot · 3 years, 2 months ago
- 9002ffc tcg: Rename TCGMemOpIdx to MemOpIdx by Richard Henderson · 3 years, 7 months ago
- 4b473e0 tcg: Expand MO_SIZE to 3 bits by Richard Henderson · 3 years, 7 months ago
- 81c65ee tcg/riscv: Remove add with zero on user-only memory access by Richard Henderson · 3 years, 7 months ago
- f4e01e3 tcg: Remove TCG_TARGET_HAS_goto_ptr by Richard Henderson · 3 years, 8 months ago
- c86bd2d tcg/riscv: Remove MO_BSWAP handling by Richard Henderson · 3 years, 9 months ago
- 26a75d1 tcg: Move MAX_CODE_GEN_BUFFER_SIZE to tcg-target.h by Richard Henderson · 4 years ago
- a4fbbd7 tcg: Change parameters for tcg_target_const_match by Richard Henderson · 3 years, 10 months ago
- 5e8892d tcg: Fix prototypes for tcg_out_vec_op and tcg_out_op by Miroslav Rezanina · 4 years ago
- 0c823e5 tcg: Remove TCG_TARGET_CON_SET_H by Richard Henderson · 4 years, 5 months ago
- 665be28 tcg/riscv: Split out constraint sets to tcg-target-con-set.h by Richard Henderson · 4 years, 5 months ago