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qemu / qemu / a06678874bf6ed4f437b384749c704e21a4e61b9 / target / avr
  1. f06c1ad target/avr: Convert to tcg_ops restore_state_to_opc by Richard Henderson · 2 years, 5 months ago
  2. fbf59aa accel/tcg: Introduce tb_pc and log_pc by Richard Henderson · 2 years, 7 months ago
  3. e4fdf9d hw/core: Add CPUClass.get_pc by Richard Henderson · 2 years, 5 months ago
  4. 306c872 accel/tcg: Add pc and host_pc params to gen_intermediate_code by Richard Henderson · 2 years, 7 months ago
  5. 36027c7 target/avr: Disable interrupts when env->skip set by Richard Henderson · 2 years, 7 months ago
  6. cecaad5 target/avr: Only execute one interrupt at a time by Richard Henderson · 2 years, 7 months ago
  7. 9e1b237 target/avr: Call avr_cpu_do_interrupt directly by Richard Henderson · 2 years, 7 months ago
  8. 7bccb9e target/avr: Support probe argument to tlb_fill by Richard Henderson · 2 years, 7 months ago
  9. adb5974 target/avr: Drop avr_cpu_memory_rw_debug() by Bin Meng · 3 years ago
  10. ea9cea9 Clean up decorations and whitespace around header guards by Markus Armbruster · 2 years, 10 months ago
  11. 52581c7 Clean up header guards that don't match their file name by Markus Armbruster · 2 years, 10 months ago
  12. 8eb806a exec/translator: Pass the locked filepointer to disas_log hook by Richard Henderson · 2 years, 11 months ago
  13. b36e239 target: Use ArchCPU as interface to target CPU by Philippe Mathieu-Daudé · 3 years, 1 month ago
  14. 9295b1a target: Introduce and use OBJECT_DECLARE_CPU_TYPE() macro by Philippe Mathieu-Daudé · 3 years, 1 month ago
  15. 1ea4a06 target: Use CPUArchState as interface to target-specific CPU state by Philippe Mathieu-Daudé · 3 years, 1 month ago
  16. 31e3caf Merge remote-tracking branch 'remotes/lvivier-gitlab/tags/trivial-branch-for-7.0-pull-request' into staging by Peter Maydell · 3 years, 1 month ago
  17. 97f3363 target/avr: Correct AVRCPUClass docstring by Philippe Mathieu-Daudé · 3 years, 2 months ago
  18. cd61748 exec/exec-all: Move 'qemu/log.h' include in units requiring it by Philippe Mathieu-Daudé · 3 years, 1 month ago
  19. a893daa target/avr: Drop checks for singlestep_enabled by Richard Henderson · 3 years, 8 months ago
  20. 8b1d5b3 include/exec: Move cpu_signal_handler declaration by Richard Henderson · 3 years, 7 months ago
  21. d1fe593 Merge remote-tracking branch 'remotes/vivier2/tags/trivial-branch-for-6.2-pull-request' into staging by Peter Maydell · 3 years, 6 months ago
  22. eba6814 target/avr: Fix compiler errors (-Werror=enum-conversion) by Stefan Weil · 3 years, 8 months ago
  23. d2470cf target/avr: Remove pointless use of CONFIG_USER_ONLY definition by Philippe Mathieu-Daudé · 3 years, 6 months ago
  24. b5cf742 accel/tcg: Remove TranslatorOps.breakpoint_check by Richard Henderson · 3 years, 8 months ago
  25. e64cb6c target/avr: Implement gdb_adjust_breakpoint by Richard Henderson · 3 years, 8 months ago
  26. bd38ae2 Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-tcg-20210710' into staging by Peter Maydell · 3 years, 8 months ago
  27. 1810afd target/avr: Mark some helpers noreturn by Richard Henderson · 3 years, 9 months ago
  28. a50d52b target/avr: Use translator_use_goto_tb by Richard Henderson · 3 years, 9 months ago
  29. f4063f9 meson: Introduce target-specific Kconfig by Philippe Mathieu-Daudé · 3 years, 8 months ago
  30. 3fbd28d target/avr: Convert to TranslatorOps by Richard Henderson · 3 years, 9 months ago
  31. bcef6d7 target/avr: Change ctx to DisasContext* in gen_intermediate_code by Richard Henderson · 3 years, 9 months ago
  32. 93d4d5e target/avr: Add DisasContextBase to DisasContext by Richard Henderson · 3 years, 9 months ago
  33. 1190655 hw/core: Constify TCGCPUOps by Richard Henderson · 4 years ago
  34. 08928c6 cpu: Move CPUClass::get_phys_page_debug to SysemuCPUOps by Philippe Mathieu-Daudé · 3 years, 10 months ago
  35. 8b80bd2 cpu: Introduce SysemuCPUOps structure by Philippe Mathieu-Daudé · 3 years, 10 months ago
  36. c2cf139 cpu: Move AVR target vmsd field from CPUClass to DeviceClass by Philippe Mathieu-Daudé · 3 years, 10 months ago
  37. 744c72a cpu: Rename CPUClass vmsd -> legacy_vmsd by Philippe Mathieu-Daudé · 3 years, 10 months ago
  38. 29f9c63 target/avr: Ignore unimplemented WDR opcode by Philippe Mathieu-Daudé · 3 years, 10 months ago
  39. 56b90e6 target/avr: Fix interrupt execution by Ivanov Arkasha · 4 years ago
  40. 2e35dfb target/avr: Fix some comment spelling errors by Lichang Zhao · 4 years, 5 months ago
  41. 27aefd6 target/avr/cpu: Use device_class_set_parent_realize() by Philippe Mathieu-Daudé · 4 years, 1 month ago
  42. 7827168 cpu: tcg_ops: move to tcg-cpu-ops.h, keep a pointer in CPUClass by Claudio Fontana · 4 years, 1 month ago
  43. 0545608 cpu: move cc->do_interrupt to tcg_ops by Claudio Fontana · 4 years, 1 month ago
  44. e124536 cpu: Move tlb_fill to tcg_ops by Eduardo Habkost · 4 years, 1 month ago
  45. 48c1a3e cpu: Move cpu_exec_* to tcg_ops by Eduardo Habkost · 4 years, 1 month ago
  46. ec62595 cpu: Move synchronize_from_tb() to tcg_ops by Eduardo Habkost · 4 years, 1 month ago
  47. e9e51b7 cpu: Introduce TCGCpuOperations struct by Eduardo Habkost · 4 years, 1 month ago
  48. 04a37d4 tcg: Make tb arg to synchronize_from_tb const by Richard Henderson · 4 years, 4 months ago
  49. 3ddba9a migration: Replace migration's JSON writer by the general one by Markus Armbruster · 4 years, 3 months ago
  50. 30b5707 qom: Remove module_obj_name parameter from OBJECT_DECLARE* macros by Eduardo Habkost · 4 years, 6 months ago
  51. c821774a Use OBJECT_DECLARE_TYPE where possible by Eduardo Habkost · 4 years, 6 months ago
  52. 8110fa1 Use DECLARE_*CHECKER* macros by Eduardo Habkost · 4 years, 6 months ago
  53. db1015e Move QOM typedefs and add missing includes by Eduardo Habkost · 4 years, 6 months ago
  54. abff1ab meson: target by Paolo Bonzini · 4 years, 7 months ago
  55. 139c183 meson: rename included C source files to .c.inc by Paolo Bonzini · 5 years ago
  56. 19b2934 target/avr/disas: Fix store instructions display order by Philippe Mathieu-Daudé · 5 years ago
  57. 2e34e62 target/avr/cpu: Fix $PC displayed address by Philippe Mathieu-Daudé · 5 years ago
  58. a291bc8 target/avr/cpu: Drop tlb_flush() in avr_cpu_reset() by Philippe Mathieu-Daudé · 5 years ago
  59. 42f3ff0 target/avr: Register AVR support with the rest of QEMU by Michael Rolnik · 5 years ago
  60. 9d8caa6 target/avr: Add support for disassembling via option '-d in_asm' by Michael Rolnik · 5 years ago
  61. a107fdb target/avr: Initialize TCG register variables by Michael Rolnik · 5 years ago
  62. 9baade8 target/avr: Add instruction translation - CPU main translation function by Michael Rolnik · 5 years ago
  63. 46188ca target/avr: Add instruction translation - MCU Control Instructions by Michael Rolnik · 5 years ago
  64. 5718cef target/avr: Add instruction translation - Bit and Bit-test Instructions by Michael Rolnik · 5 years ago
  65. 9732b02 target/avr: Add instruction translation - Data Transfer Instructions by Michael Rolnik · 5 years ago
  66. 9d316c7 target/avr: Add instruction translation - Branch Instructions by Michael Rolnik · 5 years ago
  67. 865f3bb target/avr: Add instruction translation - Arithmetic and Logic Instructions by Michael Rolnik · 5 years ago
  68. e03feba target/avr: Add instruction translation - Register definitions by Michael Rolnik · 5 years ago
  69. 84a71e9 target/avr: Add instruction helpers by Michael Rolnik · 5 years ago
  70. 669d27e target/avr: Add definitions of AVR core types by Michael Rolnik · 5 years ago
  71. 25a0840 target/avr: Introduce enumeration AVRFeature by Michael Rolnik · 5 years ago
  72. 12b3540 target/avr: CPU class: Add GDB support by Michael Rolnik · 5 years ago
  73. 3fa28dd target/avr: CPU class: Add migration support by Michael Rolnik · 5 years ago
  74. e2a2b0b target/avr: CPU class: Add memory management support by Michael Rolnik · 5 years ago
  75. 7ccda78 target/avr: CPU class: Add interrupt handling support by Michael Rolnik · 5 years ago
  76. f1c671f target/avr: Introduce basic CPU class object by Michael Rolnik · 5 years ago
  77. c8c0d26 target/avr: Add basic parameters of the new platform by Michael Rolnik · 5 years ago