Google Git
Sign in
qemu / qemu / 9102f2ebdb71809af1c5ee4a4a255927e3dabca4 / target
  1. 277ee17 target/ppc: Add POWER9 DD2.2 model by Nicholas Piggin · 1 year, 10 months ago
  2. 03ec9d9 target/ppc: Merge COMPUTE_CLASS and COMPUTE_FPRF by Richard Henderson · 1 year, 10 months ago
  3. 7f65ebb target/ppc: Use SMT4 small core chip type in POWER9/10 PVRs by Nicholas Piggin · 1 year, 10 months ago
  4. ccc5a4c spapr: Add SPAPR_CAP_AIL_MODE_3 for AIL mode 3 support for H_SET_MODE hcall by Nicholas Piggin · 1 year, 10 months ago
  5. 4ee5d28 target/ppc: Alignment faults do not set DSISR in ISA v3.0 onward by Nicholas Piggin · 1 year, 10 months ago
  6. fbda88f target/ppc: Fix width of some 32-bit SPRs by Nicholas Piggin · 1 year, 10 months ago
  7. 5260ecf target/ppc: Fix fallback to MFSS for MFFS* instructions on pre 3.0 ISAs by Richard Purdie · 1 year, 10 months ago
  8. 9c9fff1 Merge tag 'pull-hex-20230526' of https://github.com/quic/qemu into staging by Richard Henderson · 1 year, 10 months ago
  9. 2babbd9 Hexagon: fix outdated `hex_new_*` comments by Matheus Tavares Bernardino · 1 year, 10 months ago
  10. 3608c24 target/hexagon/*.py: clean up used 'toss' and 'numregs' vars by Matheus Tavares Bernardino · 1 year, 10 months ago
  11. 3fd49e2 Hexagon (target/hexagon) Fix assignment to tmp registers by Marco Liebel · 1 year, 10 months ago
  12. 65bfaaa target/loongarch: Fix the vinsgr2vr/vpickve2gr instructions cause system coredump by Song Gao · 1 year, 10 months ago
  13. 2e2ca3c target/loongarch: Fix LD/ST{LE/GT} instructions get wrong CSR_ERA and CSR_BADV by Song Gao · 1 year, 10 months ago
  14. 6ad2c71 Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging by Richard Henderson · 1 year, 10 months ago
  15. fb00aa6 target/i386: EPYC-Rome model without XSAVES by Maksim Davydov · 1 year, 10 months ago
  16. 645e3a8 tcg: Remove DEBUG_DISAS by Richard Henderson · 2 years ago
  17. 21c38f3 qemu/atomic128: Split atomic16_read by Richard Henderson · 1 year, 10 months ago
  18. 47ae3e4 target/s390x: Always use cpu_atomic_cmpxchgl_be_mmu in do_csst by Richard Henderson · 1 year, 10 months ago
  19. ddc0ab5 target/s390x: Use cpu_{ld,st}*_mmu in do_csst by Richard Henderson · 1 year, 10 months ago
  20. fbea7a4 accel/tcg: Unify cpu_{ld,st}*_{be,le}_mmu by Richard Henderson · 1 year, 10 months ago
  21. d54a20b target/s390x: Use tcg_gen_qemu_{ld,st}_i128 for LPQ, STPQ by Richard Henderson · 1 year, 10 months ago
  22. 57b38ff target/ppc: Use tcg_gen_qemu_{ld,st}_i128 for LQARX, LQ, STQ by Richard Henderson · 1 year, 10 months ago
  23. d009607 Revert "arm/kvm: add support for MTE" by Peter Maydell · 1 year, 10 months ago
  24. 449d6d9 Merge tag 'pull-hex-20230518-1' of https://github.com/quic/qemu into staging by Richard Henderson · 1 year, 10 months ago
  25. b647652 Hexagon (gdbstub): add HVX support by Taylor Simpson · 1 year, 11 months ago
  26. b0bd9d8 Hexagon (gdbstub): fix p3:0 read and write via stub by Brian Cain · 1 year, 11 months ago
  27. ab930e8 Hexagon: add core gdbstub xml data for LLDB by Matheus Tavares Bernardino · 1 year, 11 months ago
  28. 14edcf1 Hexagon (decode): look for pkts with multiple insns at the same slot by Matheus Tavares Bernardino · 1 year, 10 months ago
  29. ed9b28f Hexagon (iclass): update J4_hintjumpr slot constraints by Matheus Tavares Bernardino · 1 year, 10 months ago
  30. f0e0c98 Hexagon: list available CPUs with `-cpu help` by Matheus Tavares Bernardino · 1 year, 11 months ago
  31. c319939 Hexagon (target/hexagon/*.py): raise exception on reg parsing error by Matheus Tavares Bernardino · 1 year, 11 months ago
  32. 4354f3d target/hexagon: fix = vs. == mishap by Paolo Bonzini · 1 year, 11 months ago
  33. 163e5fa Hexagon (target/hexagon) Additional instructions handled by idef-parser by Taylor Simpson · 1 year, 11 months ago
  34. 0fc56c4 Hexagon (target/hexagon) Move items to DisasContext by Taylor Simpson · 1 year, 11 months ago
  35. e5d0d78 Hexagon (target/hexagon) Move pkt_has_store_s1 to DisasContext by Taylor Simpson · 1 year, 11 months ago
  36. 842b206 Hexagon (target/hexagon) Move pred_written to DisasContext by Taylor Simpson · 1 year, 11 months ago
  37. e22edc7 Hexagon (target/hexagon) Move new_pred_value to DisasContext by Taylor Simpson · 1 year, 11 months ago
  38. 4ff5676 Hexagon (target/hexagon) Move new_value to DisasContext by Taylor Simpson · 1 year, 11 months ago
  39. 6aa4f1d Hexagon (target/hexagon) Make special new_value for USR by Taylor Simpson · 1 year, 11 months ago
  40. 00e64fd Hexagon (target/hexagon) Add overrides for disabled idef-parser insns by Taylor Simpson · 1 year, 11 months ago
  41. d05d5ee Hexagon (target/hexagon) Short-circuit more HVX single instruction packets by Taylor Simpson · 1 year, 11 months ago
  42. b855298 Hexagon (target/hexagon) Short-circuit packet HVX writes by Taylor Simpson · 1 year, 11 months ago
  43. 455e169 Hexagon (target/hexagon) Short-circuit packet predicate writes by Taylor Simpson · 1 year, 11 months ago
  44. d54c561 Hexagon (target/hexagon) Short-circuit packet register writes by Taylor Simpson · 1 year, 11 months ago
  45. b9f0326 Hexagon (target/hexagon) Mark registers as read during packet analysis by Taylor Simpson · 1 year, 11 months ago
  46. 71ed369 Hexagon (target/hexagon) Don't overlap dest writes with source reads by Taylor Simpson · 1 year, 11 months ago
  47. 25e1d87 Hexagon (target/hexagon) Clean up pred_written usage by Taylor Simpson · 1 year, 11 months ago
  48. d24f0b2 Hexagon (target/hexagon) Eliminate uses of log_pred_write function by Taylor Simpson · 1 year, 11 months ago
  49. 9942f6a Hexagon (target/hexagon) Remove log_reg_write from op_helper.[ch] by Taylor Simpson · 1 year, 11 months ago
  50. 5c4b11e Hexagon (target/hexagon) Add overrides for clr[tf]new by Taylor Simpson · 1 year, 11 months ago
  51. 085b670 Hexagon (target/hexagon) Add overrides for allocframe/deallocframe by Taylor Simpson · 1 year, 11 months ago
  52. 17fda3c Hexagon (target/hexagon) Add overrides for loop setup instructions by Taylor Simpson · 1 year, 11 months ago
  53. 07540a2 Hexagon (target/hexagon) Add DisasContext arg to gen_log_reg_write by Taylor Simpson · 1 year, 11 months ago
  54. 59958d8 Hexagon (target/hexagon) Add v73 scalar instructions by Taylor Simpson · 1 year, 11 months ago
  55. b2f20c2 Hexagon (target/hexagon) Add v69 HVX instructions by Taylor Simpson · 1 year, 11 months ago
  56. f128c0f Hexagon (target/hexagon) Add v68 HVX instructions by Taylor Simpson · 1 year, 11 months ago
  57. 406c74f Hexagon (target/hexagon) Add v68 scalar instructions by Taylor Simpson · 1 year, 11 months ago
  58. fc2622f Hexagon (target/hexagon) Add support for v68/v69/v71/v73 by Taylor Simpson · 1 year, 11 months ago
  59. f0b95ab Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging by Richard Henderson · 1 year, 10 months ago
  60. 1aa4512 target/arm: Saturate L2CTLR_EL1 core count field rather than overflowing by Peter Maydell · 1 year, 10 months ago
  61. 442c9d6 target/arm: Convert ERET, ERETAA, ERETAB to decodetree by Peter Maydell · 1 year, 10 months ago
  62. c990fde target/arm: Convert BRAA, BRAB, BLRAA, BLRAB to decodetree by Peter Maydell · 1 year, 10 months ago
  63. 0ebbe90 target/arm: Convert BRA[AB]Z, BLR[AB]Z, RETA[AB] to decodetree by Peter Maydell · 1 year, 10 months ago
  64. c0b5e39 target/arm: Convert BR, BLR, RET to decodetree by Peter Maydell · 1 year, 10 months ago
  65. 484df36 target/arm: Convert conditional branch insns to decodetree by Peter Maydell · 1 year, 10 months ago
  66. e505828 target/arm: Convert TBZ, TBNZ to decodetree by Peter Maydell · 1 year, 10 months ago
  67. f8977d5 target/arm: Convert CBZ, CBNZ to decodetree by Peter Maydell · 1 year, 10 months ago
  68. 6201b2a target/arm: Convert unconditional branch immediate to decodetree by Peter Maydell · 1 year, 10 months ago
  69. 4240fb6 target/arm: Convert Extract instructions to decodetree by Peter Maydell · 1 year, 10 months ago
  70. 5e451ae target/arm: Convert Bitfield to decodetree by Richard Henderson · 1 year, 10 months ago
  71. ee0daeb target/arm: Convert Move wide (immediate) to decodetree by Richard Henderson · 1 year, 10 months ago
  72. 8127f46 target/arm: Convert Logical (immediate) to decodetree by Richard Henderson · 1 year, 10 months ago
  73. 000bcd0 target/arm: Replace bitmask64 with MAKE_64BIT_MASK by Richard Henderson · 1 year, 10 months ago
  74. 86002ec target/arm: Convert Add/subtract (immediate with tags) to decodetree by Richard Henderson · 1 year, 10 months ago
  75. 3ce7b5e target/arm: Convert Add/subtract (immediate) to decodetree by Richard Henderson · 1 year, 10 months ago
  76. 372b7ec target/arm: Split gen_add_CC and gen_sub_CC by Richard Henderson · 1 year, 10 months ago
  77. 45fda88 target/arm: Convert PC-rel addressing to decodetree by Richard Henderson · 1 year, 10 months ago
  78. 270076d target/arm: Pull calls to disas_sve() and disas_sme() out of legacy decoder by Peter Maydell · 1 year, 10 months ago
  79. 8058c83 target/arm: Create decodetree skeleton for A64 by Peter Maydell · 1 year, 10 months ago
  80. 8ed24ba target/arm: Split out disas_a64_legacy by Richard Henderson · 1 year, 10 months ago
  81. 70a670c target/arm: add RAZ/WI handling for DBGDTR[TX|RX] by Alex Bennée · 1 year, 10 months ago
  82. b320e21 arm/kvm: add support for MTE by Cornelia Huck · 1 year, 11 months ago
  83. a6771f2 target/arm: Fix vd == vm overlap in sve_ldff1_z by Richard Henderson · 1 year, 10 months ago
  84. 8bf171c target/i386: Fix exception classes for MOVNTPS/MOVNTPD. by Ricky Zhou · 1 year, 11 months ago
  85. cab529b target/i386: Fix exception classes for SSE/AVX instructions. by Ricky Zhou · 1 year, 11 months ago
  86. afa94da target/i386: Fix and add some comments next to SSE/AVX instructions. by Ricky Zhou · 1 year, 11 months ago
  87. 056d649 target/i386: fix avx2 instructions vzeroall and vpermdq by Xinyu Li · 1 year, 10 months ago
  88. 2b55e47 target/i386: fix operand size for VCOMI/VUCOMI instructions by Paolo Bonzini · 1 year, 10 months ago
  89. 22e1094 target/i386: add support for FB_CLEAR feature by Emanuele Giuseppe Esposito · 2 years, 2 months ago
  90. 0e7e3bf target/i386: add support for FLUSH_L1D feature by Emanuele Giuseppe Esposito · 2 years, 2 months ago
  91. e8ecdfe target/s390x: Fix EXECUTE of relative branches by Ilya Leoshkevich · 1 year, 11 months ago
  92. 970641d s390x/tcg: Fix LDER instruction format by Ilya Leoshkevich · 1 year, 10 months ago
  93. 5503da4 hw/core: Use a callback for target specific query-cpus-fast information by Thomas Huth · 1 year, 11 months ago
  94. 8844bb8 Merge tag 'or1k-pull-request-20230513' of https://github.com/stffrdhrn/qemu into staging by Richard Henderson · 1 year, 10 months ago
  95. 478dccb target/arm: Correct AArch64.S2MinTxSZ 32-bit EL1 input size check by Peter Maydell · 1 year, 10 months ago
  96. a117e87 target/arm: Select CONFIG_ARM_V7M when TCG is enabled by Fabiano Rosas · 1 year, 10 months ago
  97. f773a31 target/arm: Select SEMIHOSTING when using TCG by Fabiano Rosas · 1 year, 10 months ago
  98. fcc0b04 target/arm: Fix handling of SW and NSW bits for stage 2 walks by Peter Maydell · 1 year, 10 months ago
  99. 21a4ab8 target/arm: Don't allow stage 2 page table walks to downgrade to NS by Peter Maydell · 1 year, 10 months ago
  100. 67ce09b target/arm: Move helper-{a64,mve,sme,sve}.h to tcg/ by Richard Henderson · 1 year, 10 months ago