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qemu / qemu / 8e9a8681dd6066e4f79ba85b59deedb4d3d11aa2 / target-mips
  1. da1a4ce target-mips: Fix helper and tests for dot/cross-dot product instructions by Petar Jovanovic · 12 years ago
  2. e320d05 target-mips: Replace macros by inline functions by Stefan Weil · 12 years ago
  3. e1a4019 target-mips: Allow DSP access to be disabled once enabled. by Eric Johnson · 12 years ago
  4. 0f0b939 target-mips: Use EXCP_SC rather than a magic number by 陳韋任 (Wei-Ren Chen) · 12 years ago
  5. c4aaba9 target-mips: Make repl_ph to sign extend to target-long by Jovanovic, Petar · 12 years ago
  6. fe65a1f Fix my email address by Dongxue Zhang · 12 years ago
  7. 79eb839 target-mips: Remove semicolon from macro definition by Stefan Weil · 12 years ago
  8. b8abbbe target-mips: Fix for helpers for EXTR_* instructions by Petar Jovanovic · 12 years ago
  9. eec8972 target-mips: Fix incorrect reads and writes to DSPControl register by Petar Jovanovic · 12 years ago
  10. 6b4c305 fpu: move public header file to include/fpu by Paolo Bonzini · 12 years ago
  11. 1de7afc misc: move include files to include/qemu/ by Paolo Bonzini · 12 years ago
  12. 14cccb6 qom: move include files to include/qom/ by Paolo Bonzini · 12 years ago
  13. 022c62c exec: move include files to include/exec/ by Paolo Bonzini · 12 years ago
  14. 76cad71 build: kill libdis, move disassemblers to disas/ by Paolo Bonzini · 12 years ago
  15. a8a826a exec: refactor cpu_restore_state by Blue Swirl · 12 years ago
  16. 536b558 Merge branch 'master' of git.qemu-project.org:/pub/git/qemu by Blue Swirl · 12 years ago
  17. ab1103d TCG: Use gen_opc_instr_start from context instead of global variable. by Evgeny Voevodin · 12 years ago
  18. c9c99c2 TCG: Use gen_opc_icount from context instead of global variable. by Evgeny Voevodin · 12 years ago
  19. 25983ca TCG: Use gen_opc_pc from context instead of global variable. by Evgeny Voevodin · 12 years ago
  20. 19e6c50 target-mips: Fix incorrect shift for SHILO and SHILOV by Petar Jovanovic · 12 years ago
  21. 34f5606 target-mips: Fix incorrect code and test for INSV by Petar Jovanovic · 12 years ago
  22. 31abf92 target-mips: remove POOL48A from the microMIPS decoding by Aurelien Jarno · 12 years ago
  23. 211da99 target-mips: Clean up microMIPS32 major opcode by 陳韋任 (Wei-Ren Chen) · 12 years ago
  24. d132c79 target-mips: Add comments on POOL32Axf encoding by 陳韋任 (Wei-Ren Chen) · 12 years ago
  25. 92414b3 TCG: Use gen_opc_buf from context instead of global variable. by Evgeny Voevodin · 12 years ago
  26. efd7f48 TCG: Use gen_opc_ptr from context instead of global variable. by Evgeny Voevodin · 12 years ago
  27. 6801038 target-mips: fix wrong microMIPS opcode encoding by 陳韋任 (Wei-Ren Chen) · 12 years ago
  28. 7c2c3ea target-mips: Fix seg fault for LUI when MIPS_DEBUG_DISAS==1. by Eric Johnson · 12 years ago
  29. f4359b9 disas: avoid using cpu_single_env by Blue Swirl · 13 years ago
  30. 1cfd981 target-mips: use ULL for 64 bit constants by Blue Swirl · 12 years ago
  31. 98c8a73 Merge remote-tracking branch 'afaerber/qom-cpu' into staging by Anthony Liguori · 12 years ago
  32. 286d52e target-mips: don't flush extra TLB on permissions upgrade by Aurelien Jarno · 12 years ago
  33. bc3e45e target-mips: fix TLBR wrt SEGMask by Aurelien Jarno · 12 years ago
  34. e0d002f target-mips: use deposit instead of hardcoded version by Aurelien Jarno · 12 years ago
  35. 5112718 target-mips: optimize ddiv/ddivu/div/divu with movcond by Aurelien Jarno · 12 years ago
  36. acf1246 target-mips: implement movn/movz using movcond by Aurelien Jarno · 12 years ago
  37. 2d2826b target-mips: don't use local temps for store conditional by Aurelien Jarno · 12 years ago
  38. fc40787 target-mips: implement unaligned loads using TCG by Aurelien Jarno · 12 years ago
  39. 18bba4d target-mips: simplify load/store microMIPS helpers by Aurelien Jarno · 12 years ago
  40. 3cee305 target-mips: optimize load operations by Aurelien Jarno · 12 years ago
  41. 2910c6cb target-mips: cleanup load/store operations by Aurelien Jarno · 12 years ago
  42. 5f7319c target-mips: restore CPU state after an FPU exception by Aurelien Jarno · 12 years ago
  43. 05993cd target-mips: use softfloat constants when possible by Aurelien Jarno · 12 years ago
  44. 4cc2e5f target-mips: cleanup float to int conversion helpers by Aurelien Jarno · 12 years ago
  45. 5dbe90b target-mips: fix FPU exceptions by Aurelien Jarno · 12 years ago
  46. 4a587b2 target-mips: keep softfloat exception set to 0 between instructions by Aurelien Jarno · 12 years ago
  47. b3d6cd4 target-mips: use the softfloat floatXX_muladd functions by Aurelien Jarno · 12 years ago
  48. 1e0e239 target-mips: do not save CPU state when using retranslation by Aurelien Jarno · 12 years ago
  49. 4636401 target-mips: correctly restore btarget upon exception by Aurelien Jarno · 12 years ago
  50. 40e3acc target-mips: remove #if defined(TARGET_MIPS64) in opcode enums by Aurelien Jarno · 12 years ago
  51. b30706d target-mips: Change TODO file by Jia Liu · 12 years ago
  52. af13ae0 target-mips: Add ASE DSP processors by Jia Liu · 12 years ago
  53. b53371e target-mips: Add ASE DSP accumulator instructions by Jia Liu · 12 years ago
  54. 2669056 target-mips: Add ASE DSP compare-pick instructions by Jia Liu · 12 years ago
  55. 1cb6686 target-mips: Add ASE DSP bit/manipulation instructions by Jia Liu · 12 years ago
  56. a22260a target-mips: Add ASE DSP multiply instructions by Jia Liu · 12 years ago
  57. 77c5fa8 target-mips: Add ASE DSP GPR-based shift instructions by Jia Liu · 12 years ago
  58. 461c08d target-mips: Add ASE DSP arithmetic instructions by Jia Liu · 12 years ago
  59. 9b1a1d6 target-mips: Add ASE DSP load instructions by Jia Liu · 12 years ago
  60. e45a93e target-mips: Add ASE DSP branch instructions by Jia Liu · 12 years ago
  61. 4133498 Use correct acc value to index cpu_HI/cpu_LO rather than using a fix number by Jia Liu · 12 years ago
  62. 853c324 target-mips: Add ASE DSP resources access check by Jia Liu · 12 years ago
  63. 235eb01 target-mips: Add ASE DSP internal functions by Jia Liu · 12 years ago
  64. 3993c6b cpus: Pass CPUState to [qemu_]cpu_has_work() by Andreas Färber · 13 years ago
  65. d73ee8a target-mips: Use TCG registers for the FPU. by Richard Henderson · 12 years ago
  66. 95bf787 target-mips: rename helper flags by Aurelien Jarno · 12 years ago
  67. a8170e5 Rename target_phys_addr_t to hwaddr by Avi Kivity · 12 years ago
  68. 6f4d6b0 target-mips: Pass MIPSCPU to mips_vpe_sleep() by Andreas Färber · 12 years ago
  69. c6679e9 target-mips: Pass MIPSCPU to mips_tc_sleep() by Andreas Färber · 12 years ago
  70. b35d77d target-mips: Pass MIPSCPU to mips_vpe_is_wfi() by Andreas Färber · 12 years ago
  71. 135dd63 target-mips: Pass MIPSCPU to mips_tc_wake() by Andreas Färber · 12 years ago
  72. 81bad50 target-mips: Clean up other_cpu in helper_{d,e}vpe() by Andreas Färber · 12 years ago
  73. fdefe51 Emit debug_insn for CPU_LOG_TB_OP_OPT as well. by Richard Henderson · 13 years ago
  74. bd277fa target-mips: Implement Loongson Multimedia Instructions by Richard Henderson · 13 years ago
  75. fb7729e target-mips: Always evaluate debugging macro arguments by Richard Henderson · 13 years ago
  76. 9fa7748 target-mips: Fix MIPS_DEBUG. by Richard Henderson · 13 years ago
  77. e1050a7 target-mips: Set opn in gen_ldst_multiple. by Richard Henderson · 13 years ago
  78. 895c2d0 target-mips: switch to AREG0 free mode by Blue Swirl · 13 years ago
  79. 03e6e50 MIPS/user: Fix reset CPU state initialization by Maciej W. Rozycki · 13 years ago
  80. 36c6711 target-mips: allow microMIPS SWP and SDP to have RD equal to BASE by Eric Johnson · 14 years ago
  81. 2e15497 target-mips: add privilege level check to several Cop0 instructions by Eric Johnson · 14 years ago
  82. b316728 mips-linux-user: Always support rdhwr. by Richard Henderson · 13 years ago
  83. 0516867 target-mips: Streamline indexed cp1 memory addressing. by Richard Henderson · 13 years ago
  84. 13d24f4 Fix order of CVT.PS.S operands by Richard Sandiford · 13 years ago
  85. d22d728 Fix operands of RECIP2.S and RECIP2.PS by Richard Sandiford · 13 years ago
  86. 6fc97fa target-mips: Fix some helper functions (VR54xx multiplication) by Stefan Weil · 13 years ago
  87. 9415913 target-mips: Enable access to required RDHWR hardware registers by Meador Inge · 13 years ago
  88. f1cb095 MIPS: Correct FCR0 initialization by Nathan Froyd · 13 years ago
  89. fbe37ef build: move other target-*/ objects to nested Makefile.objs by Paolo Bonzini · 13 years ago
  90. 9cdc8df build: move libobj-y variable to nested Makefile.objs by Paolo Bonzini · 13 years ago
  91. 5e8861a build: move obj-TARGET-y variables to nested Makefile.objs by Paolo Bonzini · 13 years ago
  92. b7e516c Kill off cpu_state_reset() by Andreas Färber · 13 years ago
  93. 30bf942 target-mips: Let cpu_mips_init() return MIPSCPU by Andreas Färber · 13 years ago
  94. fca1be7 target-mips: Use cpu_reset() in do_interrupt() by Andreas Färber · 13 years ago
  95. 3bd4122 target-mips: Use cpu_reset() in cpu_mips_init() by Andreas Färber · 13 years ago
  96. d7f66b5 mips: Fix BC1ANY[24]F instructions by Richard Sandiford · 13 years ago
  97. bed38e4 target-mips: Remove commented-out function declaration by Andreas Färber · 13 years ago
  98. b3412b0 target-mips: Remove unused inline function by Stefan Weil · 13 years ago
  99. 61d25e1 Merge branch 'qom-cpu-rest.v1' of git://github.com/afaerber/qemu-cpu by Blue Swirl · 13 years ago
  100. 5b0c40f target-mips: Start QOM'ifying CPU init by Andreas Färber · 13 years ago