- 4ef37e6 target-mips: get_physical_address: Add KVM awareness by James Hogan · 11 years ago
- 22010ce target-mips: get_physical_address: Add defines for segment bases by James Hogan · 11 years ago
- f45cb2f target-mips: Avoid shifting left into sign bit by Peter Maydell · 11 years ago
- 0c591eb cputlb: Change tlb_set_page() argument to CPUState by Andreas Färber · 11 years ago
- 31b030d cputlb: Change tlb_flush_page() argument to CPUState by Andreas Färber · 11 years ago
- 2710342 cpu: Move exception_index field from CPU_COMMON to CPUState by Andreas Färber · 11 years ago
- 7510454 cpu: Turn cpu_handle_mmu_fault() into a CPUClass hook by Andreas Färber · 11 years ago
- 951fab9 target-mips: fix get_physical_address() #if 0 build error by James Hogan · 11 years ago
- 00b941e cpu: Turn cpu_get_phys_page_debug() into a CPUClass hook by Andreas Färber · 12 years ago
- a076285 log: Change log_cpu_state[_mask]() argument to CPUState by Andreas Färber · 12 years ago
- 1239b47 linux-user: Save the correct resume address for MIPS signal handling by Kwok Cheung Yeung · 12 years ago
- 97a8ea5 cpu: Replace do_interrupt() by CPUClass::do_interrupt method by Andreas Färber · 12 years ago
- 853c324 target-mips: Add ASE DSP resources access check by Jia Liu · 12 years ago
- a8170e5 Rename target_phys_addr_t to hwaddr by Avi Kivity · 12 years ago
- fca1be7 target-mips: Use cpu_reset() in do_interrupt() by Andreas Färber · 13 years ago
- 7db13fa target-mips: Don't overuse CPUState by Andreas Färber · 13 years ago
- 1bba0dc Rename cpu_reset() to cpu_state_reset() by Andreas Färber · 13 years ago
- e7d8100 Fix spelling in comments, documentation and messages by Stefan Weil · 13 years ago
- e428097 mips: Correct VInt vector generation by Edgar E. Iglesias · 13 years ago
- 97b348e Remove unused is_softmmu parameter from cpu_handle_mmu_fault by Blue Swirl · 14 years ago
- 2b41f10 Remove exec-all.h include directives by Blue Swirl · 14 years ago
- 99e43d3 target-mips: Fix warning caused by unused local variable by Aurelien Jarno · 14 years ago
- 138afb0 mips: Add support for VInt and VEIC irq modes by Edgar E. Iglesias · 14 years ago
- 3fc00a7 target-mips: fix xtlb exception for loongson by Aurelien Jarno · 15 years ago
- bbfa8f7 target-mips: add microMIPS exception handler support by Nathan Froyd · 15 years ago
- d4c430a Large page TLB flush by Paul Brook · 15 years ago
- 3c7b48b Target specific usermode cleanup by Paul Brook · 15 years ago
- 4fcc562 Remove cpu_get_phys_page_debug from userspace emulation by Paul Brook · 15 years ago
- c36bbb2 target-mips: don't call cpu_loop_exit() from helper.c by Aurelien Jarno · 15 years ago
- 32188a0 target-mips: change interrupt bits to be mips16-aware by Nathan Froyd · 15 years ago
- 25b91e3 target-mips: add a function to do virtual -> physical translations by Aurelien Jarno · 15 years ago
- 1147e18 target-mips: split code raising MMU exception in a separate function by Aurelien Jarno · 15 years ago
- 60c9af0 target-mips: fix physical address type in MMU functions by Aurelien Jarno · 15 years ago
- c227f09 Revert "Get rid of _t suffix" by Anthony Liguori · 15 years ago
- 99a0949 Get rid of _t suffix by malc · 15 years ago
- 58caed6 target-mips: unmatched brackets in if 0 by Michael S. Tsirkin · 15 years ago
- 8167ee8 Update to a hopefully more future proof FSF address by Blue Swirl · 16 years ago
- 5561650 Include assert.h from qemu-common.h by Paul Brook · 16 years ago
- 93fcfe3 Convert references to logfile/loglevel to use qemu_log*() macros by aliguori · 16 years ago
- 6958549 target-mips: fix indentation by aurel32 · 16 years ago
- 932e71c target-mips: get rid of tests on env->user_mode_only by aurel32 · 16 years ago
- fad6cb1 Update FSF address in GPL/LGPL boilerplate by aurel32 · 16 years ago
- f9480ff Fix remaining compiler warnings for mips targets. by ths · 16 years ago
- 9c67ef0 Fix Xcontext fill, by Here Poussineau. by ths · 16 years ago
- 0eaef5a Less hardcoding of TARGET_USER_ONLY. by ths · 17 years ago
- b5dc773 More efficient target register / TC accesses. by ths · 17 years ago
- 53715e4 Fix infinite loop when invalidating TLB, by Herve Poussineau. by ths · 17 years ago
- b67bfe8 Handle some more exception types. by ths · 17 years ago
- 9a5d878 Fix exception debug output. by ths · 17 years ago
- 14e51cc De-cruft exception definitions, and implement nicer debug output. by ths · 17 years ago
- 6d35524 Improved PABITS handling, and config register fixes. by ths · 17 years ago
- 67d6abf Fix off-by-one address checks in MIPS64 MMU, by Aurelien Jarno. by ths · 17 years ago
- d26bc21 Clean out the N32 macros from target-mips, and introduce MIPS ABI specific by ths · 17 years ago
- 6276c76 Fix logic bug which broke TLBL/TLBS handling somewhat. by ths · 17 years ago
- 623a930 Implement missing MIPS supervisor mode bits. by ths · 17 years ago
- 6ebbf39 Replace is_user variable with mmu_idx in softmmu core, by j_mayer · 17 years ago
- 89fc88d Fix off-by-one in address check. by ths · 17 years ago
- 540635b Code provision for n32/n64 mips userland emulation. Not functional yet. by ths · 17 years ago
- 671880e Supervisor mode implementation, by Aurelien Jarno. by ths · 17 years ago
- 08fa4ba hflags computation cleanup, by Aurelien Jarno. by ths · 17 years ago
- 387a8fe Optimise instructions accessing CP0, by Aurelien Jarno. by ths · 17 years ago
- e189e74 Per-CPU instruction decoding implementation, by Aurelien Jarno. by ths · 17 years ago
- 3b46e62 find -type f | xargs sed -i 's/[\t ]*$//g' # Yes, again. Note the star in the regex. by ths · 17 years ago
- 5fafdf2 find -type f | xargs sed -i 's/[\t ]$//g' # on most files by ths · 17 years ago
- ead9360 Partial support for 34K multithreading, not functional yet. by ths · 17 years ago
- 3ddf0b5 Disable 64-bit instructions on 32-bit CPU, by Aurelien Jarno. by ths · 17 years ago
- 996ba2c MIPS64 improvements, based on a patch by Aurelien Jarno. by ths · 18 years ago
- e034e2c Handle MIPS64 SEGBITS value correctly. by ths · 18 years ago
- 6e47312 Handle PX/UX status flags correctly, by Aurelien Jarno. by ths · 18 years ago
- fd88b6a The 24k wants more watch and srsmap registers. by ths · 18 years ago
- 100ce98 Full MIPS64 MMU implementation, by Aurelien Jarno. by ths · 18 years ago
- f2e9ebe MMU code improvements, by Aurelien Jarno. by ths · 18 years ago
- 29929e3 MIPS TLB style selection at runtime, by Herve Poussineau. by ths · 18 years ago
- b4ab4b4 Preliminary MIPS 64-bit MMU implementation, by Aurelien Jarno. by ths · 18 years ago
- 5a5012e MIPS 64-bit FPU support, plus some collateral bugfixes in the by ths · 18 years ago
- 0a6de75 Clear BD slot on next exception if appropriate. by ths · 18 years ago
- e58c8ba Another fix for CP0 Cause register handling. by ths · 18 years ago
- 9b3c35e cpu_get_phys_page_debug should return target_phys_addr_t by j_mayer · 18 years ago
- beb811b Fix handling of ADES exceptions. by ths · 18 years ago
- c53f4a6 fix branch delay slot cornercases. by ths · 18 years ago
- acd858d Handle EBase properly. by ths · 18 years ago
- 5efbfed Squash logic bugs while they are fresh... by ths · 18 years ago
- 24c7b0e Sanitize mips exception handling. by ths · 18 years ago
- 39d51eb Fix BD flag handling, cause register contents, implement some more bits by ths · 18 years ago
- 3594c77 Replace TLSZ with TARGET_FMT_lx. by ths · 18 years ago
- 925fd0f Fix sign-extension of VPN field in TLB, by Herve Poussineau. by ths · 18 years ago
- 3b1c8be Fix PageMask handling, second part. by ths · 18 years ago
- bc81440 Bring TLB / PageSize handling in line with real hardware behaviour. by ths · 18 years ago
- 2ee4aed moved invalidate_tlb() to helper.c as a work around for gcc 3.2.2 bug - suppressed invalid tb_invalidate_page_range() calls by bellard · 18 years ago
- 5dc4b74 Scrap SIGN_EXTEND32. by ths · 18 years ago
- c570fd1 Preliminiary MIPS64 support, disabled by default due to performance impact. by ths · 18 years ago
- ca7c2b1 Handle invalid accesses as SIGILL for mips/mipsel userland emulation. by ths · 18 years ago
- aa328ad Fix reset handling, CP0 isn't enabled by default (a fact which doesn't by ths · 18 years ago
- 7a387ff Add MIPS32R2 instructions, and generally straighten out the instruction by ths · 18 years ago
- 814b9a4 MIPS TLB performance improvements, by Daniel Jacobowitz. by ths · 18 years ago
- 3e382bc consistent update of ERL and EXL (Dirk Behme) by bellard · 19 years ago
- 43057ab use constants for TLB handling (Thiemo Seufer) by bellard · 19 years ago
- ba9a74d fix wrong bitmasks for CP0_Context and CP0_EntryHi (Thiemo Seufer) by bellard · 19 years ago
- 3d9fb9fe cosmetics (Thiemo Seufer) by bellard · 19 years ago
- 9d05095 mips cleanup (Thiemo Seufer) by bellard · 19 years ago