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qemu / qemu / 7467d94cc43d3bea91160dba6ad42c07da217219 / target-arm / translate.h
  1. 4e5e121 tcg: Remove gen_intermediate_code_pc by Richard Henderson · 10 years ago
  2. 6c2c63d target-arm: Introduce DisasCompare by Richard Henderson · 9 years ago
  3. 78bcaa3 target-arm: Share all common TCG temporaries by Richard Henderson · 9 years ago
  4. cef9ee7 target-arm: Fix default_exception_el() function for the case when EL3 is not supported by Sergey Sorokin · 9 years ago
  5. 049e24a target-arm: Split DISAS_YIELD from DISAS_WFE by Peter Maydell · 10 years ago
  6. 9dbbc74 target-arm: Extend FP checks to use an EL by Greg Bellows · 10 years ago
  7. 7371036 target-arm: Add exception target el infrastructure by Greg Bellows · 10 years ago
  8. 42a268c tcg: Change translator-side labels to a pointer by Richard Henderson · 10 years ago
  9. c1e3781 target-arm: Define correct mmu_idx values and pass them in TB flags by Peter Maydell · 10 years ago
  10. 3f342b9 target-arm: add non-secure Translation Block flag by Sergey Fedorov · 10 years ago
  11. dcbff19 target-arm: rename arm_current_pl to arm_current_el by Greg Bellows · 10 years ago
  12. 37e6456 target-arm: Add support for A32 and T32 HVC and SMC insns by Peter Maydell · 10 years ago
  13. c0f4af1 target-arm: Don't handle c15_cpar changes via tb_flush() by Peter Maydell · 10 years ago
  14. 7ea47fe target-arm: Implement ARMv8 single-step handling for A64 code by Peter Maydell · 11 years ago
  15. f79fbf3 target-arm: Use a 1:1 mapping between EL and MMU index by Edgar E. Iglesias · 11 years ago
  16. 9d4c4e8 target-arm: Move get_mem_index to translate.h by Edgar E. Iglesias · 11 years ago
  17. 1773111 target-arm: Dump 32-bit CPU state if 64 bit CPU is in AArch32 by Peter Maydell · 11 years ago
  18. 90e4963 target-arm: A64: Add assertion that FP access was checked by Peter Maydell · 11 years ago
  19. 8c6afa6 target-arm: A64: Correctly fault FP/Neon if CPACR.FPEN set by Peter Maydell · 11 years ago
  20. d4a2dc6 target-arm: Add support for generating exceptions with syndrome information by Peter Maydell · 11 years ago
  21. a984e42 target-arm: A64: Implement PMULL instruction by Peter Maydell · 11 years ago
  22. 72c1d3a target-arm: Implement WFE as a yield operation by Peter Maydell · 11 years ago
  23. 60322b3 target-arm: Remove ARMCPU/CPUARMState from cpregs APIs used by decoder by Peter Maydell · 11 years ago
  24. 39fb730 target-arm: A64: add support for conditional branches by Alexander Graf · 11 years ago
  25. 11e169d target-arm: A64: add support for B and BL insns by Alexander Graf · 11 years ago
  26. 40f860c target-arm: Split A64 from A32/T32 gen_intermediate_code_internal() by Peter Maydell · 11 years ago
  27. 14ade10 target-arm: Add AArch64 translation stub by Alexander Graf · 12 years ago
  28. 3926cc8 target-arm: Prepare translation for AArch64 code by Alexander Graf · 12 years ago
  29. 3407ad0 target-arm: Export cpu_env by Alexander Graf · 12 years ago
  30. f570c61 target-arm: Extract the disas struct to a header file by Alexander Graf · 12 years ago