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qemu / qemu / 604ba8176c1f7103601c75fc9425475264c2c978 / target / sh4 / translate.c
  1. 962a145 accel/tcg: Provide default implementation of disas_log by Richard Henderson · 11 months ago
  2. ca51921 target/sh4: Update DisasContextBase.insn_start by Richard Henderson · 10 months ago
  3. 942ba09 target/sh4: Rename TCGv variables as manual for SUBV opcode by Philippe Mathieu-Daudé · 10 months ago
  4. 40ed073 target/sh4: Rename TCGv variables as manual for ADDV opcode by Philippe Mathieu-Daudé · 10 months ago
  5. e88a856 target/sh4: Fix SUBV opcode by Philippe Mathieu-Daudé · 10 months ago
  6. c365e6b target/sh4: Fix ADDV opcode by Philippe Mathieu-Daudé · 10 months ago
  7. b754cb2 target/sh4: add missing CHECK_NOT_DELAY_SLOT by Zack Buhman · 11 months ago
  8. b0f2f29 target/sh4: mac.w: memory accesses are 16-bit words by Zack Buhman · 11 months ago
  9. 795bec9 target/sh4: Prefer fast cpu_env() over slower CPU QOM cast macro by Philippe Mathieu-Daudé · 1 year, 1 month ago
  10. 32f0c39 target: Use vaddr in gen_intermediate_code by Anton Johansson · 1 year, 1 month ago
  11. 5533936 sh4: Coding style: Remove tabs by Yihuan Pan · 1 year, 3 months ago
  12. 4f9ef4e target/sh4: Disable decode_gusa when plugins enabled by Richard Henderson · 1 year, 5 months ago
  13. b77af26 accel/tcg: Replace CPUState.env_ptr with cpu_env() by Richard Henderson · 1 year, 6 months ago
  14. ad75a51 tcg: Rename cpu_env to tcg_env by Richard Henderson · 1 year, 6 months ago
  15. 026ad97 target/translate: Remove unnecessary 'exec/cpu_ldst.h' header by Philippe Mathieu-Daudé · 1 year, 6 months ago
  16. dfd1b81 accel/tcg: Introduce translator_io_start by Richard Henderson · 1 year, 9 months ago
  17. e03291c target/sh4: Emit insn_start for each insn in gUSA region by Richard Henderson · 1 year, 9 months ago
  18. d53106c tcg: Pass TCGHelperInfo to tcg_gen_callN by Richard Henderson · 1 year, 11 months ago
  19. 645e3a8 tcg: Remove DEBUG_DISAS by Richard Henderson · 1 year, 11 months ago
  20. 03a0d87 target/sh4: Use MO_ALIGN where required by Richard Henderson · 1 year, 10 months ago
  21. ad4052f target/sh4: Honor QEMU_LOG_FILENAME with QEMU_LOG=cpu by Ilya Leoshkevich · 2 years ago
  22. 950b91b target/sh4: Avoid tcg_const_i32 by Richard Henderson · 2 years ago
  23. d3c2b2b target/sh4: Avoid tcg_const_i32 for TAS.B by Richard Henderson · 2 years ago
  24. bebd5cb target/sh4: Drop tcg_temp_free by Richard Henderson · 2 years ago
  25. 597f9b2 accel/tcg: Pass max_insn to gen_intermediate_code by pointer by Richard Henderson · 2 years, 1 month ago
  26. e797732 target/sh4: Convert to tcg_ops restore_state_to_opc by Richard Henderson · 2 years, 4 months ago
  27. ab419fd target/sh4: Fix TB_FLAG_UNALIGN by Richard Henderson · 2 years, 6 months ago
  28. 306c872 accel/tcg: Add pc and host_pc params to gen_intermediate_code by Richard Henderson · 2 years, 7 months ago
  29. 8eb806a exec/translator: Pass the locked filepointer to disas_log hook by Richard Henderson · 2 years, 11 months ago
  30. fc313c6 exec/memop: Adding signedness to quad definitions by Frédéric Pétrot · 3 years, 2 months ago
  31. 4da06fb target/sh4: Implement prctl_unalign_sigbus by Richard Henderson · 3 years, 2 months ago
  32. 52df5ad target/sh4: Drop check for singlestep_enabled by Richard Henderson · 3 years, 8 months ago
  33. 196fb7a target/sh4: Use lookup_symbol in sh4_tr_disas_log by Richard Henderson · 3 years, 5 months ago
  34. 4e11689 accel/tcg: Add DisasContextBase argument to translator_ld* by Ilya Leoshkevich · 3 years, 7 months ago
  35. b5cf742 accel/tcg: Remove TranslatorOps.breakpoint_check by Richard Henderson · 3 years, 8 months ago
  36. 3f1e209 target/sh4: Use translator_use_goto_tb by Richard Henderson · 3 years, 8 months ago
  37. 1797b08 tcg: Avoid including 'trace-tcg.h' in target translate.c by Philippe Mathieu-Daudé · 3 years, 8 months ago
  38. b983a0e target/sh4: Improve swap.b translation by Richard Henderson · 3 years, 9 months ago
  39. 2b836c2 tcg: Add flags argument to tcg_gen_bswap16_*, tcg_gen_bswap32_i64 by Richard Henderson · 3 years, 9 months ago
  40. 23b5d9f target/sh4: fix some comment spelling errors by Lichang Zhao · 4 years, 5 months ago
  41. 02b8e73 target/sh4: Update coding style to make checkpatch.pl happy by Philippe Mathieu-Daudé · 4 years, 4 months ago
  42. 9146d30 target/sh4: Remove superfluous breaks by Liao Pingfang · 4 years, 8 months ago
  43. dcb32f1 tcg: Search includes from the project root source directory by Philippe Mathieu-Daudé · 5 years ago
  44. da94123 target/sh4: fetch code with translator_ld by Emilio G. Cota · 6 years ago
  45. 6faf2b6 target/sh4: Fix LGPL information in the file headers by Thomas Huth · 6 years ago
  46. 8b86d6d tcg: Hoist max_insns computation to tb_gen_code by Richard Henderson · 6 years ago
  47. 90c84c5 qom/cpu: Simplify how CPUClass:cpu_dump_state() prints by Markus Armbruster · 6 years ago
  48. 5b38d02 sh4: fix use_icount with linux-user by Laurent Vivier · 7 years ago
  49. be0e3d7 target/sh4: Fix translator.c assertion failure for gUSA by Richard Henderson · 7 years ago
  50. 07ea28b tcg: Pass tb and index to tcg_gen_exit_tb separately by Richard Henderson · 7 years ago
  51. fd1b3d3 target/sh4: convert to TranslatorOps by Emilio G. Cota · 7 years ago
  52. f764718 tcg: Remove TCGV_UNUSED* and TCGV_IS_UNUSED* by Richard Henderson · 7 years ago
  53. 6f1c2af target/sh4: Convert to DisasContextBase by Richard Henderson · 7 years ago
  54. 34cf567 target/sh4: Do not singlestep after exceptions by Richard Henderson · 7 years ago
  55. 4834871 target/sh4: Convert to DisasJumpType by Richard Henderson · 7 years ago
  56. f85da30 target/sh4: Use cmpxchg for movco when parallel_cpus by Richard Henderson · 7 years ago
  57. 6d56fc6 target/sh4: fix TCG leak during gusa sequence by Alex Bennée · 7 years ago
  58. e691e0e target/sh4: add missing tcg_temp_free() in _decode_opc() by Philippe Mathieu-Daudé · 7 years ago
  59. 3c254ab Remove empty statements by Ladi Prosek · 7 years ago
  60. 6e6430a Merge remote-tracking branch 'remotes/rth/tags/pull-dis-20171026' into staging by Peter Maydell · 7 years ago
  61. 1d48474 disas: Remove unused flags arguments by Richard Henderson · 7 years ago
  62. 1c2adb9 tcg: Initialize cpu_env generically by Richard Henderson · 7 years ago
  63. b1311c4 tcg: define tcg_init_ctx and make tcg_ctx a pointer by Emilio G. Cota · 8 years ago
  64. 671f9a8 target/sh4: check CF_PARALLEL instead of parallel_cpus by Emilio G. Cota · 8 years ago
  65. c5a49c6 tcg: convert tb->cflags reads to tb_cflags(tb) by Emilio G. Cota · 8 years ago
  66. 55c3cee qom: Introduce CPUClass.tcg_initialize by Richard Henderson · 7 years ago
  67. 7f11636 tcg: remove addr argument from lookup_tb_ptr by Emilio G. Cota · 8 years ago
  68. 9c489ea tcg: Pass generic CPUState to gen_intermediate_code() by Lluís Vilanova · 8 years ago
  69. ec2eb22 target/sh4: Use tcg_gen_lookup_and_goto_ptr by Richard Henderson · 8 years ago
  70. 11b7aa2 target/sh4: Implement fsrra by Richard Henderson · 8 years ago
  71. 61dedf2 target/sh4: Add missing FPSCR.PR == 0 checks by Richard Henderson · 8 years ago
  72. 907759f target/sh4: Implement fpchg by Richard Henderson · 8 years ago
  73. ccae24d target/sh4: Introduce CHECK_SH4A by Richard Henderson · 8 years ago
  74. 7e9f7ca target/sh4: Introduce CHECK_FPSCR_PR_* by Richard Henderson · 8 years ago
  75. 93dc9c8 target/sh4: Tidy misc illegal insn checks by Richard Henderson · 8 years ago
  76. dec4f04 target/sh4: Unify code for CHECK_FPU_ENABLED by Richard Henderson · 8 years ago
  77. 6b98213 target/sh4: Unify code for CHECK_PRIVILEGED by Richard Henderson · 8 years ago
  78. dec16c6 target/sh4: Unify code for CHECK_NOT_DELAY_SLOT by Richard Henderson · 8 years ago
  79. bdcb373 target/sh4: Simplify 64-bit fp reg-reg move by Richard Henderson · 8 years ago
  80. 4d57fa5 target/sh4: Load/store Dr as 64-bit quantities by Richard Henderson · 8 years ago
  81. 1e0b21d target/sh4: Merge DREG into fpr64 routines by Richard Henderson · 8 years ago
  82. 0f73753 target/sh4: Eliminate unused XREG macro by Richard Henderson · 8 years ago
  83. 5c13bad target/sh4: Hoist fp register bank selection by Richard Henderson · 8 years ago
  84. e5d8053 target/sh4: Pass DisasContext to fpr64 routines by Richard Henderson · 8 years ago
  85. 7c9f703 target/sh4: Unify cpu_fregs into FREG by Richard Henderson · 8 years ago
  86. 3a3bb8d target/sh4: Hoist register bank selection by Richard Henderson · 8 years ago
  87. d6a6cff target/sh4: Recognize common gUSA sequences by Richard Henderson · 8 years ago
  88. 4bfa602 target/sh4: Handle user-space atomics by Richard Henderson · 8 years ago
  89. e1933d1 target/sh4: Introduce TB_FLAG_ENVFLAGS_MASK by Richard Henderson · 8 years ago
  90. 4448a83 target/sh4: Consolidate end-of-TB tests by Richard Henderson · 8 years ago
  91. 92f1f83 target/sh4: return result of fcmp using TCG by Aurelien Jarno · 8 years ago
  92. 82e8251 target/sh4: do not use a helper to implement fneg by Aurelien Jarno · 8 years ago
  93. 57f5c1b target/sh4: do not check for PR bit for fabs instruction by Aurelien Jarno · 8 years ago
  94. be53081 target/sh4: fix RTE instruction delay slot by Aurelien Jarno · 8 years ago
  95. 9a562ae target/sh4: introduce DELAY_SLOT_MASK by Aurelien Jarno · 8 years ago
  96. 34257c2 target/sh4: trap unaligned accesses by Aurelien Jarno · 8 years ago
  97. 143021b target/sh4: movua.l is an SH4-A only instruction by Aurelien Jarno · 8 years ago
  98. cb32f17 target/sh4: implement tas.b using atomic helper by Aurelien Jarno · 8 years ago
  99. aa35131 target/sh4: generate fences for SH4 by Aurelien Jarno · 8 years ago
  100. a380f9d target/sh4: optimize gen_write_sr using extract op by Aurelien Jarno · 8 years ago