- a1d1bb3 Refactor and enhance break/watchpoint API (Jan Kiszka) by aliguori · 16 years ago
- a7812ae TCG variable type checking. by pbrook · 16 years ago
- da80682 target-mips: avoid tcg internal error in mfc0/dmfc0 by aurel32 · 16 years ago
- de9a95f Revert commits 5685 to 5688 committed by mistake by aurel32 · 16 years ago
- 1c58b16 Don't stop translation for mtc0 compare by aurel32 · 16 years ago
- a6e92a6 target-mips: gen_compute_branch1() by aurel32 · 16 years ago
- 9bf3eb2 target-mips: optimize movc*() by aurel32 · 16 years ago
- 2a0ab99 target-mips: optimize gen_farith() by aurel32 · 16 years ago
- b10fa3c target-mips: optimize gen_muldiv() by aurel32 · 16 years ago
- 507563e target-mips: optimize gen_arith()/gen_arith_imm() by aurel32 · 16 years ago
- 49bcf33 target-mips: convert bit shuffle ops to TCG by aurel32 · 16 years ago
- 505ad7c target-mips: convert bitfield ops to TCG by aurel32 · 16 years ago
- 2623c1e target-mips: optimize gen_op_addr_add() (2/2) by aurel32 · 16 years ago
- d144d1d target-mips: optimize gen_op_addr_add() (1/2) by aurel32 · 16 years ago
- 1eb75d4 target-mips: optimize gen_save_pc() by aurel32 · 16 years ago
- add6906 target-mips: fix mft* helpers/call by aurel32 · 16 years ago
- c24135f target-mips: fix temporary variable freeing in op_ldst_##insn() by aurel32 · 16 years ago
- e00fcff target-mips: use the new rotr/rotri instructions by aurel32 · 16 years ago
- cb2c992 Use concet TCG instructions in the MIPS target. by ths · 16 years ago
- 36aa55d Add concat_i32_i64 op. by pbrook · 16 years ago
- 4b2eb8d Use TCG registers for most CPU register accesses. by ths · 16 years ago
- f01be15 Move the active FPU registers into env again, and use more TCG registers by ths · 16 years ago
- 2fdbad2 TCG fixes for target-mips by aurel32 · 17 years ago
- 492b239 MIPS: don't free TCG temporary variable twice by aurel32 · 17 years ago
- 0fd70f8 Delete unused variable. by ths · 17 years ago
- 0eaef5a Less hardcoding of TARGET_USER_ONLY. by ths · 17 years ago
- 8706c38 A bunch of minor code improvements in the MIPS target. by ths · 17 years ago
- 3d5be87 Fix logging output for MIPS HI, LO registers, by Stefan Weil. by ths · 17 years ago
- 920c608 Simplify conditional FP moves. by ths · 17 years ago
- 2cfc5f1 Small cleanup of gen_intermediate_code(_internal), by Laurent Desnogues. by ths · 17 years ago
- b6d96be Use temporary registers for the MIPS FPU emulation. by ths · 17 years ago
- c7e8a93 Fix typo in comment. by ths · 17 years ago
- 356265a Static'ify some functions, and use standard inline in translate.c. by ths · 17 years ago
- ea33420 Delete duplicate code. by ths · 17 years ago
- bf20dc0 Spelling fixes, spotted by Stuart Brady. by ths · 17 years ago
- d077b6f Make bcond and btarget TCG registers. by ths · 17 years ago
- d26968e Remove unnecessary helper arguments, and fix some typos. by ths · 17 years ago
- dd5d6fe Add missing file. Fix spelling errors. by pbrook · 17 years ago
- 2e70f6e Add instruction counter. by pbrook · 17 years ago
- 2796188 Avoid unused input arguments which triggered tcg errors. Spotted by Stefan Weil. by ths · 17 years ago
- b5dc773 More efficient target register / TC accesses. by ths · 17 years ago
- 1a3fd9c Remove remaining uses of T0 in the MIPS target. by ths · 17 years ago
- e1bf387 T1 is now dead. by ths · 17 years ago
- 7872368 Reduce use of fixed registers a bit more. by ths · 17 years ago
- 6c5c1e2 Use temporaries instead of fixed registers for some instructions. by ths · 17 years ago
- be24bb4 Pass T0/T1 explicitly to helper functions, and clean up a few dyngen leftovers. by ths · 17 years ago
- c8c2227 Convert unaligned load/store to TCG. by ths · 17 years ago
- 92af06d Convert vr54xx multiply instructions to TCG. by ths · 17 years ago
- a16336e Convert remaining MIPS FP instructions to TCG. by ths · 17 years ago
- 214c465 Switch the standard multiplication instructions to TCG. by ths · 17 years ago
- 2b0233a Switch bitfield instructions and assorted special ops to TCG. by ths · 17 years ago
- 200ae68 TCGify the simplest FP instructions. by ths · 17 years ago
- 08ba796 TCGify a few more instructions. by ths · 17 years ago
- 5d0fc90 Call most FP helpers without deroute through op.c by ths · 17 years ago
- aa0bf00 Switch most MIPS FP load/stores to TCG. by ths · 17 years ago
- faf7aaa Avoid gen_opc_buf overflow. by ths · 17 years ago
- 9843a0d Free some more temporaries. by ths · 17 years ago
- 764dfc3 Move FP TNs to cpu env. by ths · 17 years ago
- 2c2435b Fix data type mixup, spotted by malc. by ths · 17 years ago
- f1aa632 Switch remaining CP0 instructions to TCG or helper functions. by ths · 17 years ago
- 7dd9e55 Register helper functions. by ths · 17 years ago
- c239529 Free constant temporaries. by ths · 17 years ago
- 4f57689 Explicitly free temporaries. by ths · 17 years ago
- 29cf4b7 Remove the temporaries cache of the MIPS target. by ths · 17 years ago
- b6ce8f0 Fix pointer calculation for MIPS64 targets. by ths · 17 years ago
- 0fead12 Delete duplicate code. by ths · 17 years ago
- f5b78d4 Fix type mismatch. by ths · 17 years ago
- a569557 Fix argument order. by ths · 17 years ago
- 619dfca Proper sign extensions for 32-bit divisions, spotted by Richard Sandiford. by ths · 17 years ago
- a4a99d7 Fix for 32-bit MIPS. by ths · 17 years ago
- 90cb786 Avoid qemu SIGFPE for MIPS DIV, by Richard Sandiford. by ths · 17 years ago
- 9b68684 Fix truncate/extend reversal in MIPS DIV{, U} handling, by Richard Sandiford. by ths · 17 years ago
- 84774e8 Fix modulus result from MIPS DDIV & avoid overflowing division, by ths · 17 years ago
- 893f986 Honour current_tc for MIPS M{T,F}{HI,LO}, by Richard Sandiford. by ths · 17 years ago
- e6bb7d7 Fix mov[tf].ps handling for MIPS, by Richard Sandiford. by ths · 17 years ago
- 2784847 Un-break MIPS conditional moves, by Richard Sandiford. by ths · 17 years ago
- cb63669 Fix ARM conditional branch bug. Add tcg_gen_brcondi. by pbrook · 17 years ago
- f0b3f3a Swithc some MIPS CP0 accesses to TCG. by ths · 17 years ago
- e214b9b Switch MIPS movf/movt to TCG. by ths · 17 years ago
- 8e9ade6 Switch MIPS branch handling to TCG, and clean out pointless wrapper by ths · 17 years ago
- 3089880 Switch MIPS clo/clz and the condition tests to TCG. by ths · 17 years ago
- 20c4c97 Switch MIPS movn/movz to TCG. by ths · 17 years ago
- 48d38ca Switch most MIPS logical and arithmetic instructions to TCG. by ths · 17 years ago
- 8c99506 Fix local register cache handling. by ths · 17 years ago
- 1ffc346 Be more economical with local temporaries. by ths · 17 years ago
- aaa9128 Convert some MIPS load/store instructions to TCG. by ths · 17 years ago
- 958fb4a Use TCG for MIPS GPR moves. by ths · 17 years ago
- b7ef7bf Fix MIPS64 branches. Funny how this survived testing. by ths · 17 years ago
- 4586f9e Really really revert commit r4343 by aurel32 · 17 years ago
- e34d2d6 Really revert commit r4343 by aurel32 · 17 years ago
- d478990 Don't stop translation for mtc0 compare by aurel32 · 17 years ago
- 3945462 Simplify mips branch handling. Retire T2 from use. Use TCG for branches. by ths · 17 years ago
- d2856f1 Factorize code in translate.c by aurel32 · 17 years ago
- ca10f86 Remove osdep.c/qemu-img code duplication by aurel32 · 17 years ago
- d0dc7dc Make MIPS MT implementation more cache friendly. by ths · 17 years ago
- 57fec1f use the TCG code generator by bellard · 17 years ago
- b8aa459 MIPS COP1X (and related) instructions, by Richard Sandiford. by ths · 17 years ago
- e9c71dd Support for VR5432, and some of its special instructions. Original patch by ths · 17 years ago
- b352fa4 Update debug code to match new accumulator register layout. by ths · 17 years ago
- 01ba981 Handle cpu_model in copy_cpu(), by Kirill A. Shutemov. by ths · 17 years ago
