1. 5677903 tcg arm/mips/ia64: add a comment about retranslation and caches by Aurelien Jarno · 14 years ago
  2. 0f11f25 tcg/arm: improve constant loading by Aurelien Jarno · 14 years ago
  3. 9a3abc2 tcg/arm: fix qemu_st64 for big endian targets by Aurelien Jarno · 14 years ago
  4. c69806a tcg/arm: fix branch target change during code retranslation by Aurelien Jarno · 14 years ago
  5. e4d58b4 tcg: Make some tcg-target.c routines static. by Richard Henderson · 15 years ago
  6. 3b6dac3 tcg: Add TYPE parameter to tcg_out_mov. by Richard Henderson · 15 years ago
  7. e23886a tcg/arm: fix condition in zero/sign extension functions by Aurelien Jarno · 15 years ago
  8. c66b5c2 tcg/arm: don't try to load constants using pc by Aurelien Jarno · 15 years ago
  9. 914ccf5 tcg/arm: optimize register allocation order by Aurelien Jarno · 15 years ago
  10. bf5675e tcg/arm: fix argument alignment in qemu_st64 by Aurelien Jarno · 15 years ago
  11. 2633a2d tcg/arm: remove useless register tests in qemu_ld/st by Aurelien Jarno · 15 years ago
  12. 67dcab7 tcg/arm: bswap arguments in qemu_ld/st if needed by Aurelien Jarno · 15 years ago
  13. e854b6d tcg/arm: use ext* ops in qemu_ld by Aurelien Jarno · 15 years ago
  14. 7e0d956 tcg/arm: remove conditional argument for qemu_ld/st by Aurelien Jarno · 15 years ago
  15. 244b1e8 tcg/arm: add bswap ops by Aurelien Jarno · 15 years ago
  16. 9517094 tcg/arm: add ext16u op by Aurelien Jarno · 15 years ago
  17. 293579e tcg/arm: add rotation ops by Aurelien Jarno · 15 years ago
  18. 23401b5 tcg/arm: use the blx instruction when possible by Aurelien Jarno · 15 years ago
  19. 8f7f749 tcg/arm: sxtb and sxth are available starting with ARMv6 by Aurelien Jarno · 15 years ago
  20. ac34fb5 tcg/arm: add variables to define the allowed instructions set by Aurelien Jarno · 15 years ago
  21. 2488b41 tcg/arm: align 64-bit arguments in function calls by Aurelien Jarno · 15 years ago
  22. c8d80ce tcg/arm: replace integer values by registers enum by Aurelien Jarno · 15 years ago
  23. f694a27 tcg/arm: remove store signed functions by Aurelien Jarno · 15 years ago
  24. e4a7d5e tcg/arm: explicitely list clobbered/reserved regs by Aurelien Jarno · 15 years ago
  25. 39221a8 tcg/arm: remove SAVE_LR code by Aurelien Jarno · 15 years ago
  26. 1584c84 tcg/arm: Replace qemu_ld32u (left over from previous commit) by Stefan Weil · 15 years ago
  27. 86feb1c tcg: Disambiguate qemu_ld32u with 32-bit and 64-bit outputs. by Richard Henderson · 15 years ago
  28. 32d98fb tcg: Allow target-specific implementation of NOR. by Richard Henderson · 15 years ago
  29. 9940a96 tcg: Allow target-specific implementation of NAND. by Richard Henderson · 15 years ago
  30. 8d625cf tcg: Allow target-specific implementation of EQV. by Richard Henderson · 15 years ago
  31. a975160 tcg: Name the opcode enumeration. by Richard Henderson · 15 years ago
  32. a63b582 remove remaining occurrences AREG[1-9] and TCG_AREG[1-9] by Paolo Bonzini · 15 years ago
  33. 9e97d8e tcg/arm: don't save/restore r7 in prologue/epilogue by Aurelien Jarno · 15 years ago
  34. 26c5d37 tcg/arm: fix load/store definitions for 32-bit targets by Aurelien Jarno · 15 years ago
  35. 2b71cd7 tcg/arm: use helpers for divu/remu by Aurelien Jarno · 15 years ago
  36. 31d6655 tcg: add div/rem 32-bit helpers by Aurelien Jarno · 15 years ago
  37. 932234f tcg/arm: implement andc op by Aurelien Jarno · 15 years ago
  38. 4e17eae tcg/arm: correctly save/restore registers in prologue/epilogue by Aurelien Jarno · 15 years ago
  39. 20cb400 Remove TLB from userspace by Paul Brook · 15 years ago
  40. d3f137e tcg/arm: merge the two sets of #define for optional ops by Aurelien Jarno · 15 years ago
  41. 023e77f tcg/arm: accept immediate arguments for brcond/setcond by Aurelien Jarno · 15 years ago
  42. b525f0a Add a missing break by Andrzej Zaborowski · 15 years ago
  43. e040476 tcg/arm: implement setcond2 by Aurelien Jarno · 15 years ago
  44. f72a6cd tcg/arm: implement setcond by Aurelien Jarno · 15 years ago
  45. 6b65861 tcg/arm: fix div2/divu2 by Aurelien Jarno · 15 years ago
  46. 3682825 tcg: Add comments for all optional instructions not implemented. by Richard Henderson · 15 years ago
  47. 7990496 ARM back-end: Use sxt[bh] instructions for ext{8, 6}s by Laurent Desnogues · 15 years ago
  48. d89c682 Suppress some variants of English in comments by Stefan Weil · 15 years ago
  49. 4e6f6d4 ARM back-end: Fix encode_imm by Laurent Desnogues · 15 years ago
  50. 94953e6 ARM back-end: Handle all possible immediates for ALU ops by Laurent Desnogues · 15 years ago
  51. f878d2d ARM back-end: Add TCG not by Laurent Desnogues · 15 years ago
  52. e2542fe rename WORDS_BIGENDIAN to HOST_WORDS_BIGENDIAN by Juan Quintela · 15 years ago
  53. cb4e581 this patch improves the ARM back-end in the following way: by Laurent Desnogues · 15 years ago
  54. 379f669 Userspace guest address offsetting by Paul Brook · 16 years ago
  55. 2d69f35 ARM host fixes by Paul Brook · 16 years ago
  56. 66896cb tcg: rename bswap_i32/i64 functions by aurel32 · 16 years ago
  57. 419bafa tcg-arm: fix qemu_ld64 by aurel32 · 16 years ago
  58. e63d7ab Prune unused TCG_AREGs by blueswir1 · 16 years ago
  59. aef3a28 Fix 64-bit targets compilation on ARM host. by balrog · 16 years ago
  60. 0c9c3a9 arm: Don't potentially overwrite input registers in add2, sub2. by balrog · 16 years ago
  61. fe33867 Don't rely on ARM tcg_out_goto() generating just a single insn. by balrog · 16 years ago
  62. 3233f0d Use libgcc __clear_cache to clean icache, when available. by balrog · 16 years ago
  63. d4a9eb1 Add some missing static and const qualifiers, reg_names only used if NDEBUG set by blueswir1 · 16 years ago
  64. 79383c9 Fix some warnings that would be generated by gcc -Wredundant-decls by blueswir1 · 16 years ago
  65. 9b7b85d Fix off-by-one unwinding error. by pbrook · 17 years ago
  66. d0660ed Relax a constraint for qemu_ld64 on ARM host. by balrog · 17 years ago
  67. eae6ce5 Fix a deadly typo, correct comments. by balrog · 17 years ago
  68. 3979144 Fix ARM host TLB. by pbrook · 17 years ago
  69. 91a3c1b Comment non-obvious calculation. Don't clobber r3 in qemu_st64. by balrog · 17 years ago
  70. e936243 A branch insn must not overwrite the branch target before relocation. by balrog · 17 years ago
  71. 225b437 Fix qemu_ld/st for mem_index > 0 on arm host. by balrog · 17 years ago
  72. bedba0c Define TCG_TARGET_CALL_STACK_OFFSET on arm. by balrog · 17 years ago
  73. 204c167 Fix 8-bit signed load/store and a typo. by balrog · 17 years ago
  74. 650bbb3 Implement neg_i32, clean-up. by balrog · 17 years ago
  75. 811d4cf ARM host support for TCG targets. by balrog · 17 years ago