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qemu / qemu / 50cfa95cbd6d0ab896530f7af07a4d5e7539ddc0 / target-sparc
  1. d2856f1 Factorize code in translate.c by aurel32 · 17 years ago
  2. 4b8b8b7 Document the shift values by blueswir1 · 17 years ago
  3. 4e14008 Revert the previous patch by blueswir1 · 17 years ago
  4. 25bc827 Move 128-bit float emulation under linux-user by blueswir1 · 17 years ago
  5. ca10f86 Remove osdep.c/qemu-img code duplication by aurel32 · 17 years ago
  6. 2a39bc4 Remove incorrect discards and old unused defines (blueswir1). by pbrook · 17 years ago
  7. a49d939 Change handling of source 2 by blueswir1 · 17 years ago
  8. 9322a4b Change handling of source register 1 by blueswir1 · 17 years ago
  9. c48fcb4 Move CPU stuff unrelated to translation to helper.c by blueswir1 · 17 years ago
  10. 6ae2037 Rename T[012] according to their roles by blueswir1 · 17 years ago
  11. 32b6c81 Avoid writes to T1 except for loads/stores, convert some T0 uses to cpu_tmp0 by blueswir1 · 17 years ago
  12. 31741a2 Accidentally dropped one change from previous commit by blueswir1 · 17 years ago
  13. 4af984a Concentrate cpu_T[012] use to one function by blueswir1 · 17 years ago
  14. ce5b3c3 Split icc and xcc flag calculations by blueswir1 · 17 years ago
  15. 2f5680e Remove some legacy definitions by blueswir1 · 17 years ago
  16. bdf46ea Fix a sign extension problem by blueswir1 · 17 years ago
  17. 7127fe8 Fix mulscc by blueswir1 · 17 years ago
  18. ce8536e Convert ldf/ldfsr and stf/stfsr to TCG by blueswir1 · 17 years ago
  19. 8911f50 Fix i32/i64/TL mismatches by blueswir1 · 17 years ago
  20. c6d5231 Remove leftover definitions by blueswir1 · 17 years ago
  21. 2b29924 Convert align checks to TCG by blueswir1 · 17 years ago
  22. 06b3e1b Convert jumps to labels to TCG by blueswir1 · 17 years ago
  23. 72a9747 Convert save, restore, saved, restored, and flushw to TCG by blueswir1 · 17 years ago
  24. 44e7757 Convert other float and VIS ops to TCG by blueswir1 · 17 years ago
  25. ff07ec8 Convert float move ops to TCG by blueswir1 · 17 years ago
  26. 3b89f26 Convert udiv and sdiv ops to TCG by blueswir1 · 17 years ago
  27. 2483386 Use ext_i32_i64 instead of ext32s_i64 by blueswir1 · 17 years ago
  28. d35527d Convert CCR and CWP ops to TCG by blueswir1 · 17 years ago
  29. 1f5063f Convert array8/16/32 and alignaddr to TCG by blueswir1 · 17 years ago
  30. 8879d13 Convert umul and smul to TCG by blueswir1 · 17 years ago
  31. 48d5c82 Use a TCG global for pc and npc by blueswir1 · 17 years ago
  32. d9bdab8 Convert mulscc to TCG, add cc_src2 by blueswir1 · 17 years ago
  33. 0425bee Discard unused data, use less temps by blueswir1 · 17 years ago
  34. 87e9250 Use a TCG global for fsr by blueswir1 · 17 years ago
  35. bb5529b Convert ldfsr and stfsr to TCG by blueswir1 · 17 years ago
  36. 748b9d8 Eliminate some uses of T2 by blueswir1 · 17 years ago
  37. 1a7b60e Convert udivx and sdivx to TCG by blueswir1 · 17 years ago
  38. f5069b2 Use memory globals for G registers by blueswir1 · 17 years ago
  39. 1ec6d2e Use tcg_const_tl for zero constant by blueswir1 · 17 years ago
  40. dc99a3f Convert condition code changing versions of add, sub, logic, and div to TCG by blueswir1 · 17 years ago
  41. db4a4ea Use a TCG global for regwptr by blueswir1 · 17 years ago
  42. 56ec06b Convert andn, orn and xnor to TCG by blueswir1 · 17 years ago
  43. 19f329a Convert branches and conditional moves to TCG by blueswir1 · 17 years ago
  44. 134d77a Convert exception ops to TCG by blueswir1 · 17 years ago
  45. a3ffaf3 Fix microSPARC II SFSR mask (Robert Reif) by blueswir1 · 17 years ago
  46. 375ee38 Convert Sparc64 trap state ops to TCG by blueswir1 · 17 years ago
  47. 7e8c2b6 Convert float helpers to TCG, fix fabsq in the process by blueswir1 · 17 years ago
  48. dcf2490 Convert fmovr to TCG by blueswir1 · 17 years ago
  49. ccd4a21 Convert tick operations to TCG by blueswir1 · 17 years ago
  50. 00f219b Convert movr and (partially) movcc to TCG by blueswir1 · 17 years ago
  51. 38bc628 Convert addx, subx, next_insn and mov_pc_npc to TCG by blueswir1 · 17 years ago
  52. b25deda Temporary fix for i386 host by blueswir1 · 17 years ago
  53. 1a2fb1c Modify Sparc32/64 to use TCG by blueswir1 · 17 years ago
  54. 9e31b9e Fix remote debugger memory access problems reported by Matthias Stein by blueswir1 · 17 years ago
  55. 3deaeab Sparc32 MMU register fixes (Robert Reif) by blueswir1 · 17 years ago
  56. 57fec1f use the TCG code generator by bellard · 17 years ago
  57. 045380b More ASIs by blueswir1 · 17 years ago
  58. 0b09be2 Nicer debug output for exceptions by blueswir1 · 17 years ago
  59. 7d85892 Initial support for Sun4d machines (SS-1000, SS-2000) by blueswir1 · 17 years ago
  60. 8543e2c Improved ASI debugging (Robert Reif) by blueswir1 · 17 years ago
  61. 3aa662f Enforce context table alignment by blueswir1 · 17 years ago
  62. 66f1cdb Partial fix to Sparc32 Linux host global register mangling problem by blueswir1 · 17 years ago
  63. 666c87a Add ASIs (Robert Reif) by blueswir1 · 17 years ago
  64. 01ba981 Handle cpu_model in copy_cpu(), by Kirill A. Shutemov. by ths · 17 years ago
  65. 58a770f Increase prom size for boot mode by blueswir1 · 17 years ago
  66. 3ebf5aa Use slavio base as boot prom address, rearrange sun4m init code by blueswir1 · 17 years ago
  67. 9c2b428 Fix compilation and warnings on PPC host by blueswir1 · 17 years ago
  68. 2382dc6 Fix floating point register decoding by blueswir1 · 17 years ago
  69. 1f58732 128-bit float support for user mode by blueswir1 · 17 years ago
  70. 3dd9a15 More MMU registers (Robert Reif) by blueswir1 · 17 years ago
  71. d07b4d0 Fix MXCC register 64 bit read word order (Robert Reif) by blueswir1 · 17 years ago
  72. 87ecb68 Break up vl.h. by pbrook · 17 years ago
  73. 2761992 Remove unnecessary register masking (Robert Reif) by blueswir1 · 17 years ago
  74. bbf7d96 Fix MXCC error register (Robert Reif) by blueswir1 · 17 years ago
  75. 295db11 Add MXCC module reset register (Robert Reif) by blueswir1 · 17 years ago
  76. bd37ec2 removed warning by bellard · 17 years ago
  77. aaed909 added cpu_model parameter to cpu_init() by bellard · 17 years ago
  78. 7d77bf2 More Sparc64 CPU definitions by blueswir1 · 17 years ago
  79. 406f82e More CPU definitions by blueswir1 · 17 years ago
  80. 6d5f237 CPU specific boot mode (Robert Reif) by blueswir1 · 17 years ago
  81. 273af66 Adjust s390 addresses (the MSB is defined as "to be ignored"). by ths · 17 years ago
  82. eed152b Use shared ctpop64 helper by blueswir1 · 17 years ago
  83. 20b749f Avoid gcc warnings by blueswir1 · 17 years ago
  84. 1e64e78 Fix compiling Sparc64 on PPC host by blueswir1 · 17 years ago
  85. e909ec2 Use ldq and stq for 8 byte accesses (original patch by Robert Reif) by blueswir1 · 17 years ago
  86. 8f577d3 Enable all alignment checks by blueswir1 · 17 years ago
  87. 94ced07 Fix bug in Sparc32 sta op (Robert Reif) by blueswir1 · 17 years ago
  88. 6f27aba Sparc64 hypervisor mode by blueswir1 · 17 years ago
  89. 952a328 SuperSparc MXCC support (Robert Reif) by blueswir1 · 17 years ago
  90. 992f48a Support for 32 bit ABI on 64 bit targets (only enabled Sparc64) by blueswir1 · 17 years ago
  91. 6ebbf39 Replace is_user variable with mmu_idx in softmmu core, by j_mayer · 17 years ago
  92. c732abe Unify '-cpu ?' option. by j_mayer · 17 years ago
  93. 90251fb Fix taddcctv and tsubcctv (David Matthews) by blueswir1 · 17 years ago
  94. 0387d92 Fix Sparc64 ldfa/stfa and float ops with fpr >= 32 by blueswir1 · 17 years ago
  95. 5199652 Fix block load ASIs by blueswir1 · 17 years ago
  96. 3391c81 Fix Sparc64 ldfa, lddfa, stfa, and stdfa instructions by blueswir1 · 17 years ago
  97. ee0b03f Fix Sparc64 wrasr instructions by blueswir1 · 17 years ago
  98. 198a74d Move get_sp_from_cpustate from cpu.h to target_signal.h. by ths · 18 years ago
  99. a04e134 linux-user sigaltstack() syscall, by Thayne Harbaugh. by ths · 18 years ago
  100. 40ce0a9 CPU boot mode by blueswir1 · 18 years ago