1. 1de7afc misc: move include files to include/qemu/ by Paolo Bonzini · 12 years ago
  2. 61c56c8 mips hw/: Don't use CPUState by Andreas Färber · 13 years ago
  3. 7447545 change all other clock references to use nanosecond resolution accessors by Paolo Bonzini · 14 years ago
  4. e027e1f mips: Expire late timers when reading cp0_count by Edgar E. Iglesias · 14 years ago
  5. b1dfe64 mips: Break out cpu_mips_timer_expire by Edgar E. Iglesias · 14 years ago
  6. b970ea8 Compile some MIPS devices only once by Blue Swirl · 15 years ago
  7. 7b9cbad mips: add header to mips_int.c and mips_timer.c by Aurelien Jarno · 15 years ago
  8. 6ee093c Unexport ticks_per_sec variable. Create get_ticks_per_sec() function by Juan Quintela · 16 years ago
  9. 93fcfe3 Convert references to logfile/loglevel to use qemu_log*() macros by aliguori · 16 years ago
  10. 59d9413 target-mips: CP0 Random register improvements by aurel32 · 16 years ago
  11. 75973fa MIPS: remove empty cpu_mips_irqctrl_init() by aurel32 · 17 years ago
  12. 2e70f6e Add instruction counter. by pbrook · 17 years ago
  13. ea86e4e Optimize MIPS timer read/write functions by aurel32 · 17 years ago
  14. 87ecb68 Break up vl.h. by pbrook · 17 years ago
  15. 4253218 Timer start/stop implementation, by Aurelien Jarno. by ths · 18 years ago
  16. ead9360 Partial support for 34K multithreading, not functional yet. by ths · 18 years ago
  17. fcb4a41 Choose number of TLBs at runtime, by Herve Poussineau. by ths · 18 years ago
  18. d537cf6 Unify IRQ handling. by pbrook · 18 years ago
  19. 3529b53 Fix disabling of the Cause register for R2. by ths · 18 years ago
  20. 39d51eb Fix BD flag handling, cause register contents, implement some more bits by ths · 18 years ago
  21. 4de9b24 Reworking MIPS interrupt handling, by Aurelien Jarno. by ths · 18 years ago
  22. e16fe40 Move the MIPS CPU timer in a seperate file, by Alec Voropay. by ths · 18 years ago