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4bbadef0e3da3f455374e83cb9249c2afe497b24
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target
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openrisc
71bfd65
softfloat: Name compare relation enum
by Richard Henderson
· 4 years, 9 months ago
4dd6517
Merge remote-tracking branch 'remotes/ehabkost/tags/x86-and-machine-pull-request' into staging
by Peter Maydell
· 4 years, 11 months ago
781c67c
cpu: Use DeviceClass reset instead of a special CPUClass reset
by Peter Maydell
· 5 years ago
a010bdb
gdbstub: extend GByteArray to read register helpers
by Alex Bennée
· 4 years, 11 months ago
bc9888f
cpu: Use cpu_class_set_parent_reset()
by Greg Kurz
· 5 years ago
43ed232
Merge remote-tracking branch 'remotes/rth/tags/pull-or1k-20200116' into staging
by Peter Maydell
· 5 years ago
97a254b
target/openrisc: Fix FPCSR mask to allow setting DZF
by Stafford Horne
· 5 years ago
dcb32f1
tcg: Search includes from the project root source directory
by Philippe Mathieu-Daudé
· 5 years ago
7f93879
target/openrisc: fetch code with translator_ld
by Emilio G. Cota
· 6 years ago
9e3bab0
target/openrisc: Update cpu "any" to v1.3
by Richard Henderson
· 5 years ago
3e0e41e
target/openrisc: Implement l.adrp
by Richard Henderson
· 5 years ago
a465772
target/openrisc: Implement move to/from FPCSR
by Richard Henderson
· 5 years ago
2b13b4b
target/openrisc: Implement unordered fp comparisons
by Richard Henderson
· 6 years ago
62f2b03
target/openrisc: Add support for ORFPX64A32
by Richard Henderson
· 6 years ago
fe636d3
target/openrisc: Check CPUCFG_OF32S for float insns
by Richard Henderson
· 5 years ago
091a351
target/openrisc: Fix lf.ftoi.s
by Richard Henderson
· 5 years ago
8bebf7d
target/openrisc: Add VR2 and AVR special processor registers
by Richard Henderson
· 5 years ago
c7efab4
target/openrisc: Move VR, UPR, DMMCFGR, IMMCFGR to cpu init
by Richard Henderson
· 5 years ago
b72e3ff
target/openrisc: Make VR and PPC read-only
by Richard Henderson
· 5 years ago
d29f436
target/openrisc: Cache R0 in DisasContext
by Richard Henderson
· 6 years ago
8bba761
target/openrisc: Replace cpu register array with a function
by Richard Henderson
· 6 years ago
cdd0f45
target/openrisc: Add DisasContext parameter to check_r0_write
by Richard Henderson
· 6 years ago
14776ab
tcg: TCGMemOp is now accelerator independent MemOp
by Tony Nguyen
· 5 years ago
2e5b09f
hw/core: Move cpu.c, cpu.h from qom/ to hw/core/
by Markus Armbruster
· 6 years ago
12e9493
Include hw/boards.h a bit less
by Markus Armbruster
· 5 years ago
650d103
Include hw/hw.h exactly where needed
by Markus Armbruster
· 5 years ago
8a9358c
migration: Move the VMStateDescription typedef to typedefs.h
by Markus Armbruster
· 5 years ago
5cc8767
general: Replace global smp variables with smp machine properties
by Like Xu
· 6 years ago
a8d2532
Include qemu-common.h exactly where needed
by Markus Armbruster
· 6 years ago
e8b5fae
cpu: Remove CPU_COMMON
by Richard Henderson
· 6 years ago
5b146dc
cpu: Introduce CPUNegativeOffsetState
by Richard Henderson
· 6 years ago
7506ed9
cpu: Introduce cpu_set_cpustate_pointers
by Richard Henderson
· 6 years ago
677c4d6
cpu: Move ENV_OFFSET to exec/gen-icount.h
by Richard Henderson
· 6 years ago
5ee2b02
target/openrisc: Use env_cpu, env_archcpu
by Richard Henderson
· 6 years ago
29a0af6
cpu: Replace ENV_GET_CPU with env_cpu
by Richard Henderson
· 6 years ago
2161a61
cpu: Define ArchCPU
by Richard Henderson
· 6 years ago
4f7c64b
cpu: Define CPUArchState with typedef
by Richard Henderson
· 6 years ago
74433bf
tcg: Split out target/arch/cpu-param.h
by Richard Henderson
· 6 years ago
c319dc1
tcg: Use CPUClass::tlb_fill in cputlb.c
by Richard Henderson
· 6 years ago
35e911a
target/openrisc: Convert to CPUClass::tlb_fill
by Richard Henderson
· 6 years ago
198a2d2
target/openrisc: Fix LGPL information in the file headers
by Thomas Huth
· 6 years ago
8b86d6d
tcg: Hoist max_insns computation to tb_gen_code
by Richard Henderson
· 6 years ago
3979fca
disas: Rename include/disas/bfd.h back to include/disas/dis-asm.h
by Markus Armbruster
· 6 years ago
90c84c5
qom/cpu: Simplify how CPUClass:cpu_dump_state() prints
by Markus Armbruster
· 6 years ago
0442428
target: Simplify how the TARGET_cpu_list() print
by Markus Armbruster
· 6 years ago
779fc6a
target/openrisc: Fix LGPL version number
by Thomas Huth
· 6 years ago
03fee66
vmstate: constify VMStateField
by Marc-André Lureau
· 6 years ago
3a7be55
decodetree: Remove "insn" argument from trans_* expanders
by Richard Henderson
· 6 years ago
dfc8474
target/openrisc: Fix writes to interrupt mask register
by Stafford Horne
· 7 years ago
9f6e8af
target/openrisc: Fix delay slot exception flag to match spec
by Stafford Horne
· 7 years ago
e8f2904
linux-user: Implement signals for openrisc
by Richard Henderson
· 7 years ago
f065542
target/openrisc: Reorg tlb lookup
by Richard Henderson
· 7 years ago
1cc9e5d
target/openrisc: Increase the TLB size
by Richard Henderson
· 7 years ago
5ce5dad
target/openrisc: Stub out handle_mmu_fault for softmmu
by Richard Henderson
· 7 years ago
56c3a14
target/openrisc: Use identical sizes for ITLB and DTLB
by Richard Henderson
· 7 years ago
b9bed1b
target/openrisc: Fix cpu_mmu_index
by Richard Henderson
· 7 years ago
fffde66
target/openrisc: Fix tlb flushing in mtspr
by Richard Henderson
· 7 years ago
2acaa23
target/openrisc: Reduce tlb to a single dimension
by Richard Henderson
· 7 years ago
fd992ee
target/openrisc: Merge mmu_helper.c into mmu.c
by Richard Henderson
· 7 years ago
23d45eb
target/openrisc: Remove indirect function calls for mmu
by Richard Henderson
· 7 years ago
455d45d
target/openrisc: Merge tlb allocation into CPUOpenRISCState
by Richard Henderson
· 7 years ago
c28fa81
target/openrisc: Form the spr index from tcg
by Richard Henderson
· 7 years ago
01ec3ec
target/openrisc: Exit the TB after l.mtspr
by Richard Henderson
· 7 years ago
2ba6541
target/openrisc: Split out is_user
by Richard Henderson
· 7 years ago
8000ba5
target/openrisc: Link more translation blocks
by Richard Henderson
· 7 years ago
e0a369c
target/openrisc: Fix singlestep_enabled
by Richard Henderson
· 7 years ago
64e46c9
target/openrisc: Use exit_tb instead of CPU_INTERRUPT_EXITTB
by Richard Henderson
· 7 years ago
c86395c
target/openrisc: Remove DISAS_JUMP & DISAS_TB_JUMP
by Richard Henderson
· 7 years ago
378cd36
target/openrisc: Log interrupts
by Richard Henderson
· 7 years ago
d5cabcc
target/openrisc: Add print_insn_or1k
by Richard Henderson
· 7 years ago
c3513c8
target/openrisc: Fix mtspr shadow gprs
by Richard Henderson
· 7 years ago
1636705
Merge remote-tracking branch 'remotes/rth/tags/tcg-next-pull-request' into staging
by Peter Maydell
· 7 years ago
07ea28b
tcg: Pass tb and index to tcg_gen_exit_tb separately
by Richard Henderson
· 7 years ago
23c11b0
target: Do not include "exec/exec-all.h" if it is not necessary
by Philippe Mathieu-Daudé
· 7 years ago
c7b6f54
target/openrisc: Merge disas_openrisc_insn
by Richard Henderson
· 7 years ago
6fd204a
target/openrisc: Convert dec_float
by Richard Henderson
· 7 years ago
032de4f
target/openrisc: Convert dec_compi
by Richard Henderson
· 7 years ago
fbb3e29
target/openrisc: Convert dec_comp
by Richard Henderson
· 7 years ago
e720a57
target/openrisc: Convert dec_M
by Richard Henderson
· 7 years ago
e20c259
target/openrisc: Convert dec_logic
by Richard Henderson
· 7 years ago
99d863d
target/openrisc: Convert dec_mac
by Richard Henderson
· 7 years ago
6ad216a
target/openrisc: Convert dec_calc
by Richard Henderson
· 7 years ago
8816f70
target/openrisc: Convert remainder of dec_misc insns
by Richard Henderson
· 7 years ago
d80bff1
target/openrisc: Convert memory insns
by Richard Henderson
· 7 years ago
136e13a
target/openrisc: Convert branch insns
by Richard Henderson
· 7 years ago
7de9729
target/openrisc: Start conversion to decodetree.py
by Richard Henderson
· 7 years ago
4e2d300
target-openrisc: Write back result before FPE exception
by Richard Henderson
· 10 years ago
a4fd3ec
target/openrisc: convert to TranslatorOps
by Emilio G. Cota
· 7 years ago
1ffa4bc
target/openrisc: convert to DisasContextBase
by Emilio G. Cota
· 7 years ago
afd46fc
icount: fix cpu_restore_state_from_tb for non-tb-exit cases
by Pavel Dovgalyuk
· 7 years ago
3f71e72
cpu: get rid of unused cpu_init() defines
by Igor Mammedov
· 7 years ago
0dacec8
cpu: add CPU_RESOLVING_TYPE macro
by Igor Mammedov
· 7 years ago
24f91e8
target/*/cpu.h: remove softfloat.h
by Alex Bennée
· 7 years ago
bf85388
qdev: use device_class_set_parent_realize/unrealize/reset()
by Philippe Mathieu-Daudé
· 7 years ago
98670d4
accel/tcg: add size paremeter in tlb_fill()
by Laurent Vivier
· 7 years ago
65255e8
target/*helper: don't check retaddr before calling cpu_restore_state
by Alex Bennée
· 7 years ago
ff67604
misc: remove duplicated includes
by Philippe Mathieu-Daudé
· 7 years ago
ab752f2
Merge remote-tracking branch 'remotes/ehabkost/tags/x86-and-machine-pull-request' into staging
by Peter Maydell
· 7 years ago
a677273
openrisc: cleanup cpu type name composition
by Igor Mammedov
· 7 years ago
6e6430a
Merge remote-tracking branch 'remotes/rth/tags/pull-dis-20171026' into staging
by Peter Maydell
· 7 years ago
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