1. 1b530a6 Add new command line option -singlestep for tcg single stepping. by aurel32 · 16 years ago
  2. 679dee3 SH: Fix linux-user _is_cached typo. by edgar_igl · 16 years ago
  3. 3c1adf1 SH: Add cpu_sh4_is_cached for linux-user. by edgar_igl · 16 years ago
  4. 852d481 SH: Improve movca.l/ocbi emulation. by edgar_igl · 16 years ago
  5. c276471 The _exit syscall is used for both thread termination in NPTL applications, by pbrook · 16 years ago
  6. 927e3a4 SH4: Fixed last UTLB unused and URB/URC management by aurel32 · 16 years ago
  7. 45f4d01 SH4: Fixed last UTLB unused by aurel32 · 16 years ago
  8. fb10458 SH4: Fixed last UTLB unused by aurel32 · 16 years ago
  9. ef7ec1c clean build: Fix remaining sh4 warnings by aurel32 · 16 years ago
  10. 66c7c80 SH: Implement MOVCO.L and MOVLI.L by aurel32 · 16 years ago
  11. c2432a4 SH7750/51: add register BCR3, BCR4, PCR, RTCOR, RTCNT, RTCSR, SDMR2, SDMR3 and fix BCR2 support by aurel32 · 16 years ago
  12. 0d0266a targets: remove error handling from qemu_malloc() callers (Avi Kivity) by aliguori · 16 years ago
  13. eca1bdf Log reset events (Jan Kiszka) by aliguori · 16 years ago
  14. 8fec2b8 global s/loglevel & X/qemu_loglevel_mask(X)/ (Eduardo Habkost) by aliguori · 16 years ago
  15. 93fcfe3 Convert references to logfile/loglevel to use qemu_log*() macros by aliguori · 16 years ago
  16. 5b7141a sh4: Add FMAC instruction support by aurel32 · 16 years ago
  17. fad6cb1 Update FSF address in GPL/LGPL boilerplate by aurel32 · 16 years ago
  18. df9247b tcg_temp_local_new should take no parameter by aurel32 · 16 years ago
  19. b1503cd Use the ARRAY_SIZE() macro where appropriate. by malc · 16 years ago
  20. 56cd2b9 target-sh4: make the initial value of SR easier to read by aurel32 · 16 years ago
  21. f3ff7fa target-sh4: don't disable FPU instructions in user mode by aurel32 · 16 years ago
  22. bacc637 target-sh4: disable debug code by aurel32 · 16 years ago
  23. 71968fa target-sh4: add prefi, icbi, synco by aurel32 · 16 years ago
  24. a9c43f8 target-sh4: add SH7785 as CPU option by aurel32 · 16 years ago
  25. 4208322 target-sh4: remove 2 warnings by aurel32 · 16 years ago
  26. eeda677 target-sh4: Add SH bit handling to TLB by aurel32 · 16 years ago
  27. f619837 target-sh4: check FD bit for FP instructions by aurel32 · 16 years ago
  28. b79e175 SH4: kill a few warnings by aurel32 · 16 years ago
  29. d8299bc SH4: Implement FD bit by aurel32 · 16 years ago
  30. 5c16736 SH4: Eliminate P4 to A7 mangling (Takashi YOSHII). by balrog · 16 years ago
  31. 1e5459a SH: On-chip PCI controller support (Takashi YOSHII). by balrog · 16 years ago
  32. db8d990 Remove FORCE_RET() and RETURN() by aurel32 · 16 years ago
  33. 2cbd949 Common cpu_loop_exit prototype by aurel32 · 16 years ago
  34. c0ce998 Use sys-queue.h for break/watchpoint managment (Jan Kiszka) by aliguori · 16 years ago
  35. 11bb09f target-sh4: fix 64-bit fmov to/from memory by aurel32 · 16 years ago
  36. cf7055b target-sh4: fix TLB/MMU emulation by aurel32 · 16 years ago
  37. 12d9613 target-sh4: fix fldi0/fldi1 by aurel32 · 16 years ago
  38. 66ba317 target-sh4: map FP registers as TCG variables by aurel32 · 16 years ago
  39. 9850d1e target-sh4: use CPU_Float/CPU_Double instead of ugly casts by aurel32 · 16 years ago
  40. a1d1bb3 Refactor and enhance break/watchpoint API (Jan Kiszka) by aliguori · 16 years ago
  41. 6b91754 Refactor translation block CPU state handling (Jan Kiszka) by aliguori · 16 years ago
  42. 622ed36 Convert CPU_PC_FROM_TB to static inline (Jan Kiszka) by aliguori · 16 years ago
  43. a7812ae TCG variable type checking. by pbrook · 16 years ago
  44. b1d8e52 Fix undeclared symbol warnings from sparse by blueswir1 · 16 years ago
  45. 7526aa2 SH4: Implement MOVUA.L by aurel32 · 16 years ago
  46. bdbf22e SH4: fix single-stepping by aurel32 · 16 years ago
  47. c69e326 SH4: Fix swap.b by aurel32 · 16 years ago
  48. 1ed1a78 Silence some warnings about no value returned from non-void function by blueswir1 · 16 years ago
  49. 36aa55d Add concat_i32_i64 op. by pbrook · 16 years ago
  50. b55266b Suppress gcc 4.x -Wpointer-sign (included in -Wall) warnings by blueswir1 · 16 years ago
  51. fe25591 SH4: Privilege check for instructions by aurel32 · 16 years ago
  52. 0b6d3ae qemu sh4 nptl support by aurel32 · 16 years ago
  53. 7478757 sh4: doesn't set the cpu_model_str by aurel32 · 16 years ago
  54. f24f381 SH4: sleep instruction bug fix by aurel32 · 16 years ago
  55. 0fd3ca3 sh4: CPU versioning. by aurel32 · 16 years ago
  56. 86e0abc SH4: fix a regression introduced in r5122 by aurel32 · 16 years ago
  57. 17b086f SH4: Remove dyngen leftovers by aurel32 · 16 years ago
  58. 7fdf924 SH4: final conversion to TCG by aurel32 · 16 years ago
  59. cc4ba6a SH4: convert floating-point ops to TCG by aurel32 · 16 years ago
  60. c55497e SH4: Remove most uses of cpu_T[0] and cpu_T[1] by aurel32 · 16 years ago
  61. 7efbe24 SH4: TCG optimisations by aurel32 · 16 years ago
  62. 69d6275 SH4: Convert remaining non-fp ops to TCG by aurel32 · 16 years ago
  63. c047da1 SH4: Convert shift functions to TCG by aurel32 · 16 years ago
  64. 390af82 SH4: convert control/status register load/store to TCG by aurel32 · 16 years ago
  65. fa4da10 SH4: Convert memory loads/stores to TCG by aurel32 · 16 years ago
  66. 6f06939 SH4: convert some more arithmetics ops to TCG by aurel32 · 16 years ago
  67. e6afc2f SH4: convert a few helpers to TCG by aurel32 · 16 years ago
  68. 1000822 SH4: convert branch/jump instructions to TCG by aurel32 · 16 years ago
  69. a462561 SH4: convert simple compare instructions to TCG by aurel32 · 16 years ago
  70. 3a8a44c SH4: convert a few control or system register functions to TCG by aurel32 · 16 years ago
  71. 829337a SH4: Fix bugs introduce in r5099 by aurel32 · 16 years ago
  72. 5aa3b1e SH4: fix xtrct Rm,Rn (broken in r5103) by aurel32 · 16 years ago
  73. 559dd74 SH4: convert logic and arithmetic ops to TCG by aurel32 · 16 years ago
  74. 1e8864f SH4: use TCG variables for gregs by aurel32 · 16 years ago
  75. 3bf73a4 SH4: use uint32_t/i32 based types/ops by aurel32 · 16 years ago
  76. 8f99cc6 SH4: Convert register moves to TCG by aurel32 · 16 years ago
  77. a73d39b SH4: Convert dyngen registers moves to TCG by aurel32 · 16 years ago
  78. ccc9cc5 SH4: Convert immediate loads to TCG by aurel32 · 16 years ago
  79. f36672a SH4: remove unused ops by aurel32 · 16 years ago
  80. 988d7ea SH4: add support for TCG helpers by aurel32 · 16 years ago
  81. 6858571 SH4: Init TCG variables by aurel32 · 16 years ago
  82. 825c69c sh4: fix tas.b @Rn instruction by aurel32 · 16 years ago
  83. 7da76bc [sh4] code translation bug fix by aurel32 · 16 years ago
  84. 06afe2c [sh4] MMU bug fix by aurel32 · 16 years ago
  85. 29e179b [sh4] memory mapped TLB entries by aurel32 · 16 years ago
  86. 274a9e7 [sh4] delay slot bug fix by aurel32 · 16 years ago
  87. 833ed38 [sh4] sleep instruction by aurel32 · 16 years ago
  88. a5f1b96 Fix warnings that would be generated by gcc -Wstrict-prototypes by blueswir1 · 16 years ago
  89. 2cfc5f1 Small cleanup of gen_intermediate_code(_internal), by Laurent Desnogues. by ths · 16 years ago
  90. 526ccb7 Fix a bunch of type mismatch-related warnings (Jan Kiszka). by balrog · 16 years ago
  91. 59aa3bb Remove unintended dereference, kills a warning (Jan Kiszka). by balrog · 16 years ago
  92. 9656f32 Move interrupt_request and user_mode_only to common cpu state. by pbrook · 16 years ago
  93. b2437bf Add missing static qualifiers. by pbrook · 16 years ago
  94. 2e70f6e Add instruction counter. by pbrook · 16 years ago
  95. f8ed707 Fix typo. by pbrook · 17 years ago
  96. 6e68e07 Move clone() register setup to target specific code. Handle fork-like clone. by pbrook · 17 years ago
  97. 9133e39 Push common interrupt variables to cpu-defs.h (Glauber Costa) by bellard · 17 years ago
  98. ce5232c moved halted field to CPU_COMMON by bellard · 17 years ago
  99. 9b7b85d Fix off-by-one unwinding error. by pbrook · 17 years ago
  100. ea2b542 SH4 MMU improvements by aurel32 · 17 years ago