1. ea97a1b intel-iommu: block output address in interrupt address range by Jason Wang · 3 years, 1 month ago
  2. a48a5bc intel-iommu: remove VTD_FR_RESERVED_ERR by Jason Wang · 3 years, 1 month ago
  3. b8ffd7d intel_iommu: support snoop control by Jason Wang · 3 years, 1 month ago
  4. 0192d66 intel-iommu: ignore leaf SNP bit in scalable mode by Jason Wang · 3 years, 3 months ago
  5. a4544c4 intel_iommu: Use correct shift for 256 bits qi descriptor by Liu Yi L · 4 years, 8 months ago
  6. 56fc1e6 intel_iommu: add present bit check for pasid table entries by Liu Yi L · 5 years ago
  7. e48929c intel_iommu: TM field should not be in reserved bits by Qi, Yadong · 5 years ago
  8. ce586f3 intel_iommu: refine SL-PEs reserved fields checking by Qi, Yadong · 5 years ago
  9. 81fb1e6 intel_iommu: Drop extended root field by Peter Xu · 6 years ago
  10. 4a4f219 intel_iommu: add scalable-mode option to make scalable mode work by Yi Sun · 6 years ago
  11. c0c1d35 intel_iommu: add 256 bits qi_desc support by Liu, Yi L · 6 years ago
  12. fb43cf7 intel_iommu: scalable mode emulation by Liu, Yi L · 6 years ago
  13. ccc23bb intel_iommu: dma read/write draining support by Peter Xu · 6 years ago
  14. 37f5138 intel-iommu: Extend address width to 48 bits by Prasad Singamsetty · 7 years ago
  15. 92e5d85 intel-iommu: Redefine macros to enable supporting 48 bit address width by Prasad Singamsetty · 7 years ago
  16. 892721d intel_iommu: fix iova for pt by Peter Xu · 8 years ago
  17. b931302 intel_iommu: cleanup vtd_{do_}iommu_translate() by Peter Xu · 8 years ago
  18. dbaabb2 intel_iommu: support passthrough (PT) by Peter Xu · 8 years ago
  19. dd4d607 intel_iommu: enable remote IOTLB by Peter Xu · 8 years ago
  20. 3b40f0e intel_iommu: add "caching-mode" option by Aviv Ben-David · 8 years ago
  21. 554f5e1 intel_iommu: support device iotlb descriptor by Jason Wang · 8 years ago
  22. bacabb0 intel_iommu: fixing source id during IOTLB hash key calculation by Jason Wang · 8 years ago
  23. a3f409c intel_iommu: support all masks in interrupt entry cache invalidation by Radim Krčmář · 9 years ago
  24. 2858931 intel_iommu: Add support for Extended Interrupt Mode by Jan Kiszka · 9 years ago
  25. 02a2cbc x86-iommu: introduce IEC notifiers by Peter Xu · 9 years ago
  26. 651e4ce intel_iommu: Add support for PCI MSI remap by Peter Xu · 9 years ago
  27. a4ca297 intel_iommu: add IR translation faults defines by Peter Xu · 9 years ago
  28. a586143 intel_iommu: define interrupt remap table addr register by Peter Xu · 9 years ago
  29. d54bd7f intel_iommu: set IR bit for ECAP register by Peter Xu · 9 years ago
  30. b791047 intel_iommu: allow queued invalidation for IR by Peter Xu · 9 years ago
  31. d66b969 intel_iommu: large page support by Jason Wang · 9 years ago
  32. b5a280c intel-iommu: add IOTLB using hash table by Le Tan · 11 years ago
  33. d92fa2d intel-iommu: add context-cache to cache context-entry by Le Tan · 11 years ago
  34. ed7b8fb intel-iommu: add supports for queued invalidation interface by Le Tan · 11 years ago
  35. 1da12ec intel-iommu: introduce Intel IOMMU (VT-d) emulation by Le Tan · 11 years ago