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qemu / qemu / 16f5396cec23960d5507e738d978bfc3d48628a3
  1. 16f5396 target/loongarch: Add LSX data type VReg by Song Gao · 1 year, 10 months ago
  2. eb5c393 Merge tag 'pw-pull-request' of https://gitlab.com/marcandre.lureau/qemu into staging by Richard Henderson · 1 year, 10 months ago
  3. 8ad8256 Merge tag 'migration-20230505-pull-request' of https://gitlab.com/juan.quintela/qemu into staging by Richard Henderson · 1 year, 10 months ago
  4. c2d3d1c audio/pwaudio.c: Add Pipewire audio backend for QEMU by Dorinda Bassey · 1 year, 11 months ago
  5. a9fe9e1 Merge tag 'pull-riscv-to-apply-20230505-1' of https://github.com/alistair23/qemu into staging by Richard Henderson · 1 year, 10 months ago
  6. e1d084a target/riscv: add Ventana's Veyron V1 CPU by Rahul Pathak · 1 year, 11 months ago
  7. 190e9f8 riscv: Make sure an exception is raised if a pte is malformed by Alexandre Ghiti · 1 year, 11 months ago
  8. 7bf14a2 target/riscv: Fix Guest Physical Address Translation by Irina Ryapolova · 1 year, 11 months ago
  9. eae04c4 target/riscv: Restore the predicate() NULL check behavior by Bin Meng · 1 year, 11 months ago
  10. 9e1a30d target/riscv: add TYPE_RISCV_DYNAMIC_CPU by Daniel Henrique Barboza · 1 year, 11 months ago
  11. c0177f9 target/riscv: add query-cpy-definitions support by Daniel Henrique Barboza · 1 year, 11 months ago
  12. 85840bd target/riscv: add CPU QOM header by Daniel Henrique Barboza · 1 year, 11 months ago
  13. 2e6dba1 hw/intc/riscv_aplic: Zero init APLIC internal state by Ivan Klokov · 1 year, 11 months ago
  14. 38303e8 target/riscv: Reorg sum check in get_physical_address by Richard Henderson · 1 year, 11 months ago
  15. e1dd150 target/riscv: Reorg access check in get_physical_address by Richard Henderson · 1 year, 11 months ago
  16. a9d2e3e target/riscv: Merge checks for reserved pte flags by Richard Henderson · 1 year, 11 months ago
  17. 356c833 target/riscv: Don't modify SUM with is_debug by Richard Henderson · 1 year, 11 months ago
  18. 0a19bf5 target/riscv: Suppress pte update with is_debug by Richard Henderson · 1 year, 11 months ago
  19. 59688aa target/riscv: Move leaf pte processing out of level loop by Richard Henderson · 1 year, 11 months ago
  20. 8d6a00c target/riscv: Hoist pbmte and hade out of the level loop by Richard Henderson · 1 year, 11 months ago
  21. a427c83 target/riscv: Hoist second stage mode change to callers by Richard Henderson · 1 year, 11 months ago
  22. eaecd47 target/riscv: Check SUM in the correct register by Richard Henderson · 1 year, 11 months ago
  23. 696bacd target/riscv: Set MMU_2STAGE_BIT in riscv_cpu_mmu_index by Richard Henderson · 1 year, 11 months ago
  24. 9de7b7b target/riscv: Move hstatus.spvp check to check_access_hlsv by Richard Henderson · 1 year, 11 months ago
  25. 02369f7 target/riscv: Introduce mmuidx_2stage by Richard Henderson · 1 year, 11 months ago
  26. 340b580 target/riscv: Introduce mmuidx_priv by Richard Henderson · 1 year, 11 months ago
  27. 4005a79 target/riscv: Introduce mmuidx_sum by Richard Henderson · 1 year, 11 months ago
  28. 3df4417 target/riscv: Rename MMU_HYP_ACCESS_BIT to MMU_2STAGE_BIT by Richard Henderson · 1 year, 11 months ago
  29. 0f58cbb target/riscv: Handle HLV, HSV via helpers by Richard Henderson · 1 year, 11 months ago
  30. a7f112c target/riscv: Use cpu_ld*_code_mmu for HLVX by Richard Henderson · 1 year, 11 months ago
  31. c8f8a99 target/riscv: Reduce overhead of MSTATUS_SUM change by Fei Wu · 1 year, 11 months ago
  32. 47debc7 target/riscv: Separate priv from mmu_idx by Fei Wu · 1 year, 11 months ago
  33. 4acaa13 target/riscv: Add a tb flags field for vstart by LIU Zhiwei · 1 year, 11 months ago
  34. 25f3ddf target/riscv: Remove mstatus_hs_{fs, vs} from tb_flags by Richard Henderson · 1 year, 11 months ago
  35. ebd4764 target/riscv: Encode the FS and VS on a normal way for tb flags by LIU Zhiwei · 1 year, 11 months ago
  36. 42967f4 target/riscv: Add a general status enum for extensions by LIU Zhiwei · 1 year, 11 months ago
  37. f196639 target/riscv: Extract virt enabled state from tb flags by LIU Zhiwei · 1 year, 11 months ago
  38. d6db7c9 target/riscv: fix H extension TVM trap by Yi Chen · 1 year, 11 months ago
  39. 9ba63f9 target/riscv: Use check for relationship between Zdinx/Zhinx{min} and Zfinx by Weiwei Li · 1 year, 11 months ago
  40. 0c98cce target/riscv: Legalize MPP value in write_mstatus by Weiwei Li · 1 year, 11 months ago
  41. 44b8f74 target/riscv: Use PRV_RESERVED instead of PRV_H by Weiwei Li · 1 year, 11 months ago
  42. 04803c3 target/riscv: Fix the mstatus.MPP value after executing MRET by Weiwei Li · 1 year, 11 months ago
  43. dd8f244 target/riscv/cpu.c: redesign register_cpu_props() by Daniel Henrique Barboza · 1 year, 11 months ago
  44. 4f13abc target/riscv: add RVG and remove cpu->cfg.ext_g by Daniel Henrique Barboza · 1 year, 11 months ago
  45. 8ef67c6 target/riscv: remove cfg.ext_g setup from rv64_thead_c906_cpu_init() by Daniel Henrique Barboza · 1 year, 11 months ago
  46. 7295b18 target/riscv: remove riscv_cpu_sync_misa_cfg() by Daniel Henrique Barboza · 1 year, 11 months ago
  47. 3e7674f target/riscv: remove cpu->cfg.ext_v by Daniel Henrique Barboza · 1 year, 11 months ago
  48. 64f4b54 target/riscv: remove cpu->cfg.ext_j by Daniel Henrique Barboza · 1 year, 11 months ago
  49. b5c042e target/riscv: remove cpu->cfg.ext_h by Daniel Henrique Barboza · 1 year, 11 months ago
  50. e17801e target/riscv: remove cpu->cfg.ext_u by Daniel Henrique Barboza · 1 year, 11 months ago
  51. f1ea2a5 target/riscv: remove cpu->cfg.ext_s by Daniel Henrique Barboza · 1 year, 11 months ago
  52. 1a36e23 target/riscv: remove cpu->cfg.ext_m by Daniel Henrique Barboza · 1 year, 11 months ago
  53. 427d8e7 target/riscv: remove cpu->cfg.ext_e by Daniel Henrique Barboza · 1 year, 11 months ago
  54. 74828ea target/riscv: remove cpu->cfg.ext_i by Daniel Henrique Barboza · 1 year, 11 months ago
  55. 4b33598 target/riscv: remove cpu->cfg.ext_f by Daniel Henrique Barboza · 1 year, 11 months ago
  56. ffffd95 target/riscv: remove cpu->cfg.ext_d by Daniel Henrique Barboza · 1 year, 11 months ago
  57. c00226e target/riscv: remove cpu->cfg.ext_c by Daniel Henrique Barboza · 1 year, 11 months ago
  58. 4c75994 target/riscv: remove cpu->cfg.ext_a by Daniel Henrique Barboza · 1 year, 11 months ago
  59. b3df64c target/riscv: introduce riscv_cpu_add_misa_properties() by Daniel Henrique Barboza · 1 year, 11 months ago
  60. ccc84a7 target/riscv/cpu.c: remove 'multi_letter' from isa_ext_data by Daniel Henrique Barboza · 1 year, 11 months ago
  61. 6508272 target/riscv: remove MISA properties from isa_edata_arr[] by Daniel Henrique Barboza · 1 year, 11 months ago
  62. 1ffa805 target/riscv: sync env->misa_ext* with cpu->cfg in realize() by Daniel Henrique Barboza · 1 year, 11 months ago
  63. 66247ed hw/riscv: Add signature dump function for spike to run ACT tests by Weiwei Li · 1 year, 11 months ago
  64. 246f879 target/riscv: Fix lines with over 80 characters by Weiwei Li · 1 year, 11 months ago
  65. 3b57254 target/riscv: Fix format for comments by Weiwei Li · 1 year, 11 months ago
  66. c45eff3 target/riscv: Fix format for indentation by Weiwei Li · 1 year, 11 months ago
  67. 3825652 target/riscv: Remove riscv_cpu_virt_enabled() by Weiwei Li · 1 year, 11 months ago
  68. 22c2f87 target/riscv: Set opcode to env->bins for illegal/virtual instruction fault by Weiwei Li · 2 years ago
  69. 77dff65 target/riscv: Fix addr type for get_physical_address by Weiwei Li · 2 years ago
  70. 628f0ec target/riscv: Remove redundant parentheses by Weiwei Li · 2 years ago
  71. b3c5077 target/riscv: Convert env->virt to a bool env->virt_enabled by LIU Zhiwei · 2 years ago
  72. c43732f target/riscv: Remove check on RVH for riscv_cpu_set_virt_enabled by Weiwei Li · 2 years ago
  73. 2866292 target/riscv: Remove check on RVH for riscv_cpu_virt_enabled by Weiwei Li · 2 years ago
  74. fbec3f3 target/riscv: Remove redundant check on RVH by Weiwei Li · 2 years ago
  75. 2136b6c target/riscv: Remove redundant call to riscv_cpu_virt_enabled by Weiwei Li · 2 years ago
  76. df3ac6d target/riscv: Fix itrigger when icount is used by LIU Zhiwei · 2 years ago
  77. 00d312b target/riscv: Add support for Zce by Weiwei Li · 2 years ago
  78. 2c71d02 disas/riscv.c: add disasm support for Zc* by Weiwei Li · 2 years ago
  79. d364c0a target/riscv: expose properties for Zc* extension by Weiwei Li · 2 years ago
  80. ce3af0b target/riscv: add support for Zcmt extension by Weiwei Li · 2 years ago
  81. 193eb52 target/riscv: add support for Zcmp extension by Weiwei Li · 2 years ago
  82. e0a3054 target/riscv: add support for Zcb extension by Weiwei Li · 2 years ago
  83. c4935b5 target/riscv: add support for Zcd extension by Weiwei Li · 2 years ago
  84. 30b0357 target/riscv: add support for Zcf extension by Weiwei Li · 2 years ago
  85. b17dd74 target/riscv: add support for Zca extension by Weiwei Li · 2 years ago
  86. 2288a5c target/riscv: add cfg properties for Zc* extension by Weiwei Li · 2 years ago
  87. 48249c0 target/riscv: fix invalid riscv,event-to-mhpmcounters entry by Conor Dooley · 1 year, 11 months ago
  88. 4f24931 target/riscv: redirect XVentanaCondOps to use the Zicond functions by Philipp Tomsich · 2 years ago
  89. 378e43f target/riscv: refactor Zicond support by Philipp Tomsich · 2 years ago
  90. d53ae79 target/riscv: Simplify arguments for riscv_csrrw_check by Weiwei Li · 2 years ago
  91. bbb9fc2 target/riscv: Simplify type conversion for CPURISCVState by Weiwei Li · 2 years ago
  92. 99c2f5c target/riscv: Simplify getting RISCVCPU pointer from env by Weiwei Li · 2 years ago
  93. 662ed9c target/riscv: Fix priv version dependency for vector and zfh by LIU Zhiwei · 2 years ago
  94. 9c33e08 target/riscv: Avoid env_archcpu() when reading RISCVCPUConfig by Weiwei Li · 2 years ago
  95. fae4009 qemu-file: Make ram_control_save_page() use accessors for rate_limit by Juan Quintela · 1 year, 10 months ago
  96. 61abf1e qemu-file: Make total_transferred an uint64_t by Juan Quintela · 1 year, 10 months ago
  97. ac7d25b qemu-file: remove shutdown member by Juan Quintela · 1 year, 10 months ago
  98. 27a1243 qemu-file: No need to check for shutdown in qemu_file_rate_limit by Juan Quintela · 1 year, 10 months ago
  99. f3030d3 migration: qemu_file_total_transferred() function is monotonic by Juan Quintela · 1 year, 10 months ago
  100. 5203334 migration: max_postcopy_bandwidth is a size parameter by Juan Quintela · 1 year, 10 months ago