1. 5c94b2a ppc: Rework POWER7 & POWER8 exception model by Cédric Le Goater · 9 years ago
  2. 9d0e5c8 ppc: move POWER8 Book4 regs in their own routine by Cédric Le Goater · 9 years ago
  3. 9c1cf38 ppc: A couple more dummy POWER8 Book4 regs by Benjamin Herrenschmidt · 9 years ago
  4. eb5ceb4 ppc: Add dummy CIABR SPR by Benjamin Herrenschmidt · 9 years ago
  5. a6eabb9 ppc: Add POWER8 IAMR register by Benjamin Herrenschmidt · 9 years ago
  6. 97eaf30 ppc: Fix writing to AMR/UAMOR by Benjamin Herrenschmidt · 9 years ago
  7. 6a9c4ef ppc: Initialize AMOR in PAPR mode by Benjamin Herrenschmidt · 9 years ago
  8. 21a558b ppc: Add dummy SPR_IC for POWER8 by Benjamin Herrenschmidt · 9 years ago
  9. 26a7f12 ppc: Create cpu_ppc_set_papr() helper by Benjamin Herrenschmidt · 9 years ago
  10. f401dd3 ppc: Add a bunch of hypervisor SPRs to Book3s by Benjamin Herrenschmidt · 9 years ago
  11. eb94268 ppc: Add macros to register hypervisor mode SPRs by Benjamin Herrenschmidt · 9 years ago
  12. 8b9f211 ppc64: set MSR_SF bit by Laurent Vivier · 9 years ago
  13. a88dced target-ppc: Add PVR for POWER8NVL processor by Alexey Kardashevskiy · 9 years ago
  14. 1464645 ppc: Add a few more P8 PMU SPRs by Benjamin Herrenschmidt · 9 years ago
  15. 1e440cb ppc: Fix migration of the TAR SPR by Thomas Huth · 9 years ago
  16. d6f1445 ppc: Define the PSPB register on POWER8 by Thomas Huth · 9 years ago
  17. d7bce99 qom: Swap 'name' next to visitor in ObjectPropertyAccessor by Eric Blake · 9 years ago
  18. 51e72bc qapi: Swap visit_* arguments for consistent 'name' placement by Eric Blake · 9 years ago
  19. a8891fb target-ppc: Allow more page sizes for POWER7 & POWER8 in TCG by David Gibson · 9 years ago
  20. 1438eff target-ppc: gdbstub: Add VSX support by Anton Blanchard · 9 years ago
  21. 95f5b54 target-ppc: gdbstub: fix spe registers for little-endian guests by Greg Kurz · 9 years ago
  22. ea499e7 target-ppc: gdbstub: fix altivec registers for little-endian guests by Greg Kurz · 9 years ago
  23. 87601e2 target-ppc: gdbstub: introduce avr_need_swap() by Greg Kurz · 9 years ago
  24. 385abeb target-ppc: gdbstub: fix float registers for little-endian guests by Greg Kurz · 9 years ago
  25. f9ab1e8 ppc: Clean up error handling in ppc_set_compat() by David Gibson · 9 years ago
  26. 0d75590 ppc: Clean up includes by Peter Maydell · 9 years ago
  27. b3820e6 gdb: provide the name of the architecture in the target.xml by David Hildenbrand · 9 years ago
  28. b09afd5 dump: qemunotes aren't commonly needed by Andrew Jones · 9 years ago
  29. 3ede8f6 taget-ppc: Fix read access to IBAT registers higher than IBAT3 by Julio Guerra · 9 years ago
  30. 90da0d5 ppc/spapr: Add "ibm,pa-features" property to the device-tree by Benjamin Herrenschmidt · 9 years ago
  31. aa4bb58 ppc: Add mmu_model defines for arch 2.03 and 2.07 by Benjamin Herrenschmidt · 9 years ago
  32. 74c373e Target-ppc: Remove unnecessary variable by Shraddha Barke · 10 years ago
  33. 4bad9e3 cpu: Change cpu_exec_init() arg to cpu, not env by Peter Crosthwaite · 10 years ago
  34. 6dd0f83 target-ppc: Move cpu_exec_init() call to realize function by Bharata B Rao · 10 years ago
  35. 5a790cc cpu: Add Error argument to cpu_exec_init() by Bharata B Rao · 10 years ago
  36. 3ba55e3 PPC: Introduce the Virtual Time Base (VTB) SPR register by Cyril Bur · 10 years ago
  37. 97052d6 Merge remote-tracking branch 'remotes/agraf/tags/signed-ppc-for-upstream' into staging by Peter Maydell · 10 years ago
  38. 3e28c5e target-ppc: Power8 Supports Transactional Memory by Tom Musta · 10 years ago
  39. bd79255 translate: check cflags instead of use_icount global by Paolo Bonzini · 10 years ago
  40. 69b058c target-ppc: pass DisasContext to SPR generator functions by Paolo Bonzini · 10 years ago
  41. 3ade1a0 target-ppc: Fix breakpoint registers for e300 by Fabien Chouteau · 10 years ago
  42. 81f194d target-ppc: Fix an invalid free in opcode table handling code. by Bharata B Rao · 10 years ago
  43. 54ff58b target-ppc: Use macros in opcodes table handling code by Bharata B Rao · 10 years ago
  44. b8c867e target-ppc : Add new processor type 440x5wDFPU by Pierre Mallard · 10 years ago
  45. 4171853 target-ppc : Allow fc[tf]id[*] mnemonics for non TARGET_PPC64 by Pierre Mallard · 10 years ago
  46. 8412d11 target-ppc: Implement IVOR[59] By Default for Book E by Tom Musta · 11 years ago
  47. 0b6ff57 target-ppc: Fix kvmppc_set_compat to use negotiated cpu-version by Alexey Kardashevskiy · 11 years ago
  48. 18b91a3 qdev: Drop legacy_name from qdev properties by Gonglei · 10 years ago
  49. 51b2e8c qdev: Add description field in PropertyInfo struct by Gonglei · 10 years ago
  50. 458dd76 target-ppc: Use cpu_exec_interrupt qom hook by Richard Henderson · 10 years ago
  51. 774f0ab target-ppc: Use cpu_exec_enter qom hook by Richard Henderson · 10 years ago
  52. 063cac5 target-ppc: Fix number of threads per core limit by Alexey Kardashevskiy · 11 years ago
  53. b60c600 target-ppc: Remove POWER7+ and POWER8E families by Alexey Kardashevskiy · 11 years ago
  54. 03ae413 target-ppc: Add pvr_match() callback by Alexey Kardashevskiy · 11 years ago
  55. a74029f target-ppc: Change default cpu for ppc64le-linux-user by Richard Henderson · 11 years ago
  56. 7826c2b target-ppc: enable virtio endian ambivalent support by Greg Kurz · 11 years ago
  57. f6c3ebc target-ppc: Add support for POWER8 pvr 0x4D0000 by Alexey Kardashevskiy · 11 years ago
  58. b3cad3a PPC: Add support for Apple gdb in gdbstub by Alexander Graf · 11 years ago
  59. cd9adfd target-ppc: Enable DABRX SPR and limit it to <=POWER7 by Alexey Kardashevskiy · 11 years ago
  60. 7303f83 target-ppc: Enable PPR and VRSAVE SPRs migration by Alexey Kardashevskiy · 11 years ago
  61. 4ee4a03 target-ppc: Add POWER8's Event Based Branch (EBB) control SPRs by Alexey Kardashevskiy · 11 years ago
  62. cdcdda2 target-ppc: Add POWER8's TM SPRs by Alexey Kardashevskiy · 11 years ago
  63. 70c5340 target-ppc: Add POWER8's MMCR2/MMCRS SPRs by Alexey Kardashevskiy · 11 years ago
  64. 45ed0be target-ppc: Enable FSCR facility check for TAR by Alexey Kardashevskiy · 11 years ago
  65. 7019cb3 target-ppc: Add POWER8's FSCR SPR by Alexey Kardashevskiy · 11 years ago
  66. d1a721a target-ppc: Add POWER8's TIR SPR by Alexey Kardashevskiy · 11 years ago
  67. a242881 target-ppc: Refactor class init for POWER7/8 by Alexey Kardashevskiy · 11 years ago
  68. 5881c29 target-ppc: Switch POWER7/8 classes to use correct PMU SPRs by Alexey Kardashevskiy · 11 years ago
  69. 7fc2db1 target-ppc: Make use of gen_spr_power5p_lpar() for POWER7/8 by Alexey Kardashevskiy · 11 years ago
  70. 6a1eed3 target-ppc: Make use of gen_spr_book3s_altivec() for POWER7/8 by Alexey Kardashevskiy · 11 years ago
  71. 5db7d4f target-ppc: Move POWER7/8 CFAR/DSCR/CTRL/PPR/PCR SPR registration to helpers by Alexey Kardashevskiy · 11 years ago
  72. 768167a target-ppc: Move POWER8 TCE Address control (TAR) to a helper by Alexey Kardashevskiy · 11 years ago
  73. e61716a target-ppc: Move POWER7/8 PIR/PURR/SPURR SPR registration to helpers by Alexey Kardashevskiy · 11 years ago
  74. 83cc6f8 target-ppc: Enable PMU SPRs migration by Alexey Kardashevskiy · 11 years ago
  75. 90618f4 target-ppc: Remove check_pow_970FX by Alexey Kardashevskiy · 11 years ago
  76. 7488d48 target-ppc: Introduce and reuse generalized init_proc_book3s_64() by Alexey Kardashevskiy · 11 years ago
  77. ba88100 target-ppc: Add HID4 SPR for PPC970 by Alexey Kardashevskiy · 11 years ago
  78. c36c97f target-ppc: Add PMC7/8 to 970 class by Alexey Kardashevskiy · 11 years ago
  79. 077850b target-ppc: Add PMC5/6, SDAR and MMCRA to 970 family by Alexey Kardashevskiy · 11 years ago
  80. 75b9c32 target-ppc: Add "POWER" prefix to MMCRA PMU registers by Alexey Kardashevskiy · 11 years ago
  81. fd51ff6 target-ppc: Copy and split gen_spr_7xx() for 970 by Alexey Kardashevskiy · 11 years ago
  82. eb16dd9 target-ppc: Make UCTRL a mirror of CTRL by Alexey Kardashevskiy · 11 years ago
  83. 42382f6 target-ppc: Refactor PPC970 by Alexey Kardashevskiy · 11 years ago
  84. bbc01ca target-ppc: Merge 970FX and 970MP into a single 970 class by Alexey Kardashevskiy · 11 years ago
  85. cb8b8bf target-ppc: Rename 7XX/60x/74XX/e600 PMU SPRs by Alexey Kardashevskiy · 11 years ago
  86. 5b274ed target-ppc: Support VSX in PPC User Mode by Tom Musta · 11 years ago
  87. e22c357 target-ppc: Allow little-endian user mode. by Doug Kwan · 11 years ago
  88. a721d39 PPC: e500: Fix MMUCSR0 emulation by Alex Zuepke · 11 years ago
  89. 6db5bb0 KVM: PPC: Enable compatibility mode by Alexey Kardashevskiy · 11 years ago
  90. 2a48d99 spapr: Limit threads per core according to current compatibility mode by Alexey Kardashevskiy · 11 years ago
  91. 1a68b71 target-ppc: Define Processor Compatibility Masks by Alexey Kardashevskiy · 11 years ago
  92. 6d9412e target-ppc: Implement "compat" CPU option by Alexey Kardashevskiy · 11 years ago
  93. 8dfa3a5 target-ppc: Add "compat" CPU option by Alexey Kardashevskiy · 11 years ago
  94. 382d2db target-ppc: Introduce callback for interrupt endianness by Greg Kurz · 11 years ago
  95. ea71258 PPC: Properly emulate L1CSR0 and L1CSR1 by Alexander Graf · 11 years ago
  96. d2ea2bf PPC: Add L1CFG1 SPR emulation by Alexander Graf · 11 years ago
  97. deb05c4 PPC: Fix SPR access control of L1CFG0 by Alexander Graf · 11 years ago
  98. 9df5a46 target-ppc: Eliminate Magic Number MSR Masks by Tom Musta · 11 years ago
  99. fdf8a96 target-ppc: Move alias lookup after class lookup by Alexey Kardashevskiy · 11 years ago
  100. 06f6e12 PPC: Add l1 cache sizes for 970 and above systems by Alexander Graf · 11 years ago