1. 14e54f8 tcg: Clean up tcg-target.h header guards by Markus Armbruster · 8 years ago
  2. 609ad70 tcg: Split trunc_shr_i32 opcode into extr[lh]_i64_i32 by Richard Henderson · 9 years ago
  3. 0632e55 tcg: rename trunc_shr_i32 into trunc_shr_i64_i32 by Aurelien Jarno · 9 years ago
  4. 006f863 tcg: add TCG_TARGET_TLB_DISPLACEMENT_BITS by Paolo Bonzini · 10 years ago
  5. de8301e tcg-sparc: Use UMULXHI instruction by Richard Henderson · 10 years ago
  6. 90379ca tcg-sparc: Use ADDXC in addsub2_i64 by Richard Henderson · 10 years ago
  7. 609ac1e tcg-sparc: Support addsub2_i64 by Richard Henderson · 11 years ago
  8. 3d1b2ff tcg: Remove TCG_TARGET_HAS_new_ldst by Richard Henderson · 11 years ago
  9. abce596 tcg-sparc: Define TCG_TARGET_INSN_UNIT_SIZE by Richard Henderson · 11 years ago
  10. f4c1666 tcg-sparc: Implement muls2_i32 by Richard Henderson · 11 years ago
  11. 34b1a49 tcg-sparc: Use 64-bit registers with sparcv8plus by Richard Henderson · 11 years ago
  12. a24fba9 tcg-sparc: Support trunc_shr_i32 by Richard Henderson · 11 years ago
  13. 4bb7a41 tcg: Add INDEX_op_trunc_shr_i32 by Richard Henderson · 11 years ago
  14. 02eb19d tcg: Use HOST_WORDS_BIGENDIAN by Richard Henderson · 11 years ago
  15. cab0a7e tcg-sparc: Convert to new ldst opcodes by Richard Henderson · 11 years ago
  16. 5f9eb02 tcg-sparc: Don't handle remainder by Richard Henderson · 11 years ago
  17. f713d6a tcg: Add qemu_ld_st_i32/64 by Richard Henderson · 11 years ago
  18. 387e417 tcg-sparc: Fix parenthesis warning by Richard Henderson · 11 years ago
  19. 78cd7b8 tcg: Allow TCG_TARGET_REG_BITS to be specified independantly by Richard Henderson · 11 years ago
  20. b93949e tcg: Change flush_icache_range arguments to uintptr_t by Richard Henderson · 11 years ago
  21. 0327152 tcg: Add muluh and mulsh opcodes by Richard Henderson · 11 years ago
  22. ca675f4 tcg: Split rem requirement from div requirement by Richard Henderson · 12 years ago
  23. 4d3203f tcg: Add signed multiword multiplication operations by Richard Henderson · 12 years ago
  24. d7156f7 tcg: Add 64-bit multiword arithmetic operations by Richard Henderson · 12 years ago
  25. 803d805 tcg-sparc: Always implement 32-bit multiword ops by Richard Henderson · 12 years ago
  26. e6a7273 tcg: Make 32-bit multiword operations optional for 64-bit hosts by Richard Henderson · 12 years ago
  27. cb9c377 janitor: add guards to headers by Paolo Bonzini · 12 years ago
  28. 41a05a4 Merge branch 'linux-user-for-upstream' of git://git.linaro.org/people/rikuvoipio/qemu by Aurelien Jarno · 12 years ago
  29. 89269f6 tcg-sparc: Use Z constraint for %g0 by Richard Henderson · 12 years ago
  30. ded37f0 tcg-sparc: Implement movcond. by Richard Henderson · 12 years ago
  31. 07e10e5 tcg: Remove TCG_TARGET_HAS_GUEST_BASE define by Peter Maydell · 12 years ago
  32. 4c3204c tcg-sparc: Clean up cruft stemming from attempts to use global registers. by Richard Henderson · 13 years ago
  33. 0c55416 tcg-sparc: Change AREG0 in generated code to %i0. by Richard Henderson · 13 years ago
  34. c6f7e4f tcg-sparc: Support GUEST_BASE. by Richard Henderson · 13 years ago
  35. 9b9c37c tcg-sparc: Assume v9 cpu always, i.e. force v8plus in 32-bit mode. by Richard Henderson · 12 years ago
  36. ffc5ea0 tcg: Introduce movcond by Richard Henderson · 12 years ago
  37. 89c3333 Remove unused CONFIG_TCG_PASS_AREG0 and dead code by Blue Swirl · 12 years ago
  38. dba4f1b w64: Change data type of parameters for flush_icache_range by Stefan Weil · 13 years ago
  39. 771142c tcg: Standardize on TCGReg as the enum for hard registers by Richard Henderson · 13 years ago
  40. 840f586 tcg: Don't declare TCG_TARGET_REG_BITS in tcg-target.h by Stefan Weil · 13 years ago
  41. 25c4d9c tcg: Always define all of the TCGOpcode enum members. by Richard Henderson · 13 years ago
  42. 2bece2c tcg: Optionally sign-extend 32-bit arguments for 64-bit hosts. by Richard Henderson · 15 years ago
  43. 32d98fb tcg: Allow target-specific implementation of NOR. by Richard Henderson · 15 years ago
  44. 9940a96 tcg: Allow target-specific implementation of NAND. by Richard Henderson · 15 years ago
  45. 8d625cf tcg: Allow target-specific implementation of EQV. by Richard Henderson · 15 years ago
  46. a63b582 remove remaining occurrences AREG[1-9] and TCG_AREG[1-9] by Paolo Bonzini · 15 years ago
  47. 3682825 tcg: Add comments for all optional instructions not implemented. by Richard Henderson · 15 years ago
  48. 18c8f7a tcg-sparc: Implement ORC. by Richard Henderson · 15 years ago
  49. dc69960 tcg-sparc: Implement ANDC. by Richard Henderson · 15 years ago
  50. be6551b tcg-sparc: Implement not. by Richard Henderson · 15 years ago
  51. 4b5a85c tcg-sparc: Implement neg. by Richard Henderson · 15 years ago
  52. cc6dfec tcg-sparc: Implement ext32[su]_i64 by Richard Henderson · 15 years ago
  53. 583d121 tcg-sparc: Implement division properly. by Richard Henderson · 15 years ago
  54. dfe5fff change HOST_SOLARIS to CONFIG_SOLARIS{_VERSION} by Juan Quintela · 15 years ago
  55. f843e52 Allocate space for static call args, increase stack frame size on Sparc64 by blueswir1 · 16 years ago
  56. 66896cb tcg: rename bswap_i32/i64 functions by aurel32 · 16 years ago
  57. e63d7ab Prune unused TCG_AREGs by blueswir1 · 16 years ago
  58. baf8cc5 Fix stack alignment on Sparc32 host by blueswir1 · 16 years ago
  59. 53c3748 Sparc code generator update by blueswir1 · 16 years ago
  60. e97b640 Try to avoid glibc global register mangling, again by blueswir1 · 16 years ago
  61. 77fcd09 Fix stack offsets and alignment by blueswir1 · 17 years ago
  62. 64e3257 Define stack offsets by blueswir1 · 17 years ago
  63. 7d55170 Fix compilation on Sparc host, implement ld and st by blueswir1 · 17 years ago
  64. b3db875 Add function prologue, fix pointer load on Sparc64 host by blueswir1 · 17 years ago
  65. 8289b27 Preliminary Sparc TCG target by blueswir1 · 17 years ago