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qemu / qemu / 0163a2e025cda6acb33e100d296965671ace17d9 / target-tricore / tricore-opcodes.h
  1. 9371557 target-tricore: add RR_DIV and RR_DIV_U instructions of the v1.6 ISA by Bastian Koppelmann · 10 years ago
  2. 0e045f4 target-tricore: add FRET instructions of the v1.6 ISA by Bastian Koppelmann · 10 years ago
  3. 9e14a7b target-tricore: add FCALL instructions of the v1.6 ISA by Bastian Koppelmann · 10 years ago
  4. bc3551c target-tricore: add SYS_RESTORE instruction of the v1.6 ISA by Bastian Koppelmann · 10 years ago
  5. e5c96c8 target-tricore: add RR_CRC32 instruction of the v1.6.1 ISA by Bastian Koppelmann · 10 years ago
  6. ddd8ceb target-tricore: add SWAPMSK instructions of the v1.6.1 ISA by Bastian Koppelmann · 10 years ago
  7. 62872eb target-tricore: add CMPSWP instructions of the v1.6.1 ISA by Bastian Koppelmann · 10 years ago
  8. 4959d6b target-tricore: fix BO_OFF10_SEXT calculating the wrong offset by Bastian Koppelmann · 10 years ago
  9. 068fac7 target-tricore: Add instructions of RRR1 opcode format, which have 0xe3 as first opcode by Bastian Koppelmann · 10 years ago
  10. 62e47b2 target-tricore: Add instructions of RRR1 opcode format, which have 0x63 as first opcode by Bastian Koppelmann · 10 years ago
  11. f4aef47 target-tricore: Add instructions of RRR1 opcode format, which have 0xa3 as first opcode by Bastian Koppelmann · 10 years ago
  12. b00aa8e target-tricore: Add instructions of RRR1 opcode format, which have 0x43 as first opcode by Bastian Koppelmann · 10 years ago
  13. 2984cfb target-tricore: Add instructions of RRR2 opcode format by Bastian Koppelmann · 10 years ago
  14. 0953225 target-tricore: Add instructions of RRR opcode format by Bastian Koppelmann · 10 years ago
  15. 3709741 target-tricore: Fix new typos by Stefan Weil · 10 years ago
  16. 436d63f target-tricore: Fix MFCR/MTCR insn and B format offset. by Bastian Koppelmann · 10 years ago
  17. b5fd8fa target-tricore: Add missing 1.6 insn of BOL opcode format by Bastian Koppelmann · 10 years ago
  18. e2bed10 target-tricore: Add instructions of RR opcode format, that have 0x4b as the first opcode by Bastian Koppelmann · 10 years ago
  19. d5de783 target-tricore: Add instructions of RR opcode format, that have 0xb as the first opcode by Bastian Koppelmann · 10 years ago
  20. 4b5b443 target-tricore: add missing 64-bit MOV in RLC format by Alex Zuepke · 10 years ago
  21. af715d9 target-tricore: typo in BOL format by Alex Zuepke · 10 years ago
  22. 781b717 target-tricore: fix offset masking in BOL format by Alex Zuepke · 10 years ago
  23. 328f1f0 target-tricore: Add instructions of RCR opcode format by Bastian Koppelmann · 10 years ago
  24. 2b2f7d9 target-tricore: Add instructions of RLC opcode format by Bastian Koppelmann · 10 years ago
  25. 0974257 target-tricore: Add instructions of RC opcode format by Bastian Koppelmann · 10 years ago
  26. a68e0d5 target-tricore: Add instructions of BRR opcode format by Bastian Koppelmann · 10 years ago
  27. 83c1bb1 target-tricore: Add instructions of BRN opcode format by Bastian Koppelmann · 10 years ago
  28. fc2ef4a target-tricore: Add instructions of BRC opcode format by Bastian Koppelmann · 10 years ago
  29. 3fb763c target-tricore: Add instructions of BOL opcode format by Bastian Koppelmann · 10 years ago
  30. 3a16ecb target-tricore: Add instructions of BO opcode format by Bastian Koppelmann · 10 years ago
  31. 030c58d target-tricore: Cleanup and Bugfixes by Bastian Koppelmann · 10 years ago
  32. 7c87d07 target-tricore: Add masks and opcodes for decoding by Bastian Koppelmann · 11 years ago