blob: 666936c81bfeceed660436d49ed76c0ce475032b [file] [log] [blame]
Blue Swirl895c2d02012-09-02 14:52:59 +00001DEF_HELPER_3(raise_exception_err, noreturn, env, i32, int)
2DEF_HELPER_2(raise_exception, noreturn, env, i32)
Pavel Dovgaluk9c708c72015-07-10 12:57:08 +03003DEF_HELPER_1(raise_exception_debug, noreturn, env)
ths7dd9e552008-06-08 07:42:23 +00004
Leon Alrae3b3c1692015-06-19 11:08:43 +01005DEF_HELPER_1(do_semihosting, void, env)
6
thsc8c22272008-06-20 15:12:14 +00007#ifdef TARGET_MIPS64
Blue Swirl895c2d02012-09-02 14:52:59 +00008DEF_HELPER_4(sdl, void, env, tl, tl, int)
9DEF_HELPER_4(sdr, void, env, tl, tl, int)
thsc8c22272008-06-20 15:12:14 +000010#endif
Blue Swirl895c2d02012-09-02 14:52:59 +000011DEF_HELPER_4(swl, void, env, tl, tl, int)
12DEF_HELPER_4(swr, void, env, tl, tl, int)
thsc8c22272008-06-20 15:12:14 +000013
Aurelien Jarnoe7139c42009-11-30 15:39:54 +010014#ifndef CONFIG_USER_ONLY
Blue Swirl895c2d02012-09-02 14:52:59 +000015DEF_HELPER_3(ll, tl, env, tl, int)
16DEF_HELPER_4(sc, tl, env, tl, tl, int)
Aurelien Jarnoe7139c42009-11-30 15:39:54 +010017#ifdef TARGET_MIPS64
Blue Swirl895c2d02012-09-02 14:52:59 +000018DEF_HELPER_3(lld, tl, env, tl, int)
19DEF_HELPER_4(scd, tl, env, tl, tl, int)
Aurelien Jarnoe7139c42009-11-30 15:39:54 +010020#endif
21#endif
22
Aurelien Jarno95bf7872012-10-09 21:53:09 +020023DEF_HELPER_FLAGS_1(clo, TCG_CALL_NO_RWG_SE, tl, tl)
24DEF_HELPER_FLAGS_1(clz, TCG_CALL_NO_RWG_SE, tl, tl)
ths7dd9e552008-06-08 07:42:23 +000025#ifdef TARGET_MIPS64
Aurelien Jarno95bf7872012-10-09 21:53:09 +020026DEF_HELPER_FLAGS_1(dclo, TCG_CALL_NO_RWG_SE, tl, tl)
27DEF_HELPER_FLAGS_1(dclz, TCG_CALL_NO_RWG_SE, tl, tl)
ths7dd9e552008-06-08 07:42:23 +000028#endif
thsf1aa6322008-06-09 07:13:38 +000029
Blue Swirl895c2d02012-09-02 14:52:59 +000030DEF_HELPER_3(muls, tl, env, tl, tl)
31DEF_HELPER_3(mulsu, tl, env, tl, tl)
32DEF_HELPER_3(macc, tl, env, tl, tl)
33DEF_HELPER_3(maccu, tl, env, tl, tl)
34DEF_HELPER_3(msac, tl, env, tl, tl)
35DEF_HELPER_3(msacu, tl, env, tl, tl)
36DEF_HELPER_3(mulhi, tl, env, tl, tl)
37DEF_HELPER_3(mulhiu, tl, env, tl, tl)
38DEF_HELPER_3(mulshi, tl, env, tl, tl)
39DEF_HELPER_3(mulshiu, tl, env, tl, tl)
40DEF_HELPER_3(macchi, tl, env, tl, tl)
41DEF_HELPER_3(macchiu, tl, env, tl, tl)
42DEF_HELPER_3(msachi, tl, env, tl, tl)
43DEF_HELPER_3(msachiu, tl, env, tl, tl)
ths92af06d2008-06-20 14:35:19 +000044
Yongbok Kim15eacb92014-06-27 08:49:05 +010045DEF_HELPER_FLAGS_1(bitswap, TCG_CALL_NO_RWG_SE, tl, tl)
46#ifdef TARGET_MIPS64
47DEF_HELPER_FLAGS_1(dbitswap, TCG_CALL_NO_RWG_SE, tl, tl)
48#endif
49
thsf1aa6322008-06-09 07:13:38 +000050#ifndef CONFIG_USER_ONLY
ths0eaef5a2008-07-23 16:14:22 +000051/* CP0 helpers */
Blue Swirl895c2d02012-09-02 14:52:59 +000052DEF_HELPER_1(mfc0_mvpcontrol, tl, env)
53DEF_HELPER_1(mfc0_mvpconf0, tl, env)
54DEF_HELPER_1(mfc0_mvpconf1, tl, env)
55DEF_HELPER_1(mftc0_vpecontrol, tl, env)
56DEF_HELPER_1(mftc0_vpeconf0, tl, env)
57DEF_HELPER_1(mfc0_random, tl, env)
58DEF_HELPER_1(mfc0_tcstatus, tl, env)
59DEF_HELPER_1(mftc0_tcstatus, tl, env)
60DEF_HELPER_1(mfc0_tcbind, tl, env)
61DEF_HELPER_1(mftc0_tcbind, tl, env)
62DEF_HELPER_1(mfc0_tcrestart, tl, env)
63DEF_HELPER_1(mftc0_tcrestart, tl, env)
64DEF_HELPER_1(mfc0_tchalt, tl, env)
65DEF_HELPER_1(mftc0_tchalt, tl, env)
66DEF_HELPER_1(mfc0_tccontext, tl, env)
67DEF_HELPER_1(mftc0_tccontext, tl, env)
68DEF_HELPER_1(mfc0_tcschedule, tl, env)
69DEF_HELPER_1(mftc0_tcschedule, tl, env)
70DEF_HELPER_1(mfc0_tcschefback, tl, env)
71DEF_HELPER_1(mftc0_tcschefback, tl, env)
72DEF_HELPER_1(mfc0_count, tl, env)
73DEF_HELPER_1(mftc0_entryhi, tl, env)
74DEF_HELPER_1(mftc0_status, tl, env)
75DEF_HELPER_1(mftc0_cause, tl, env)
76DEF_HELPER_1(mftc0_epc, tl, env)
77DEF_HELPER_1(mftc0_ebase, tl, env)
78DEF_HELPER_2(mftc0_configx, tl, env, tl)
79DEF_HELPER_1(mfc0_lladdr, tl, env)
Yongbok Kimf6d4dd82016-03-24 15:49:58 +000080DEF_HELPER_1(mfc0_maar, tl, env)
81DEF_HELPER_1(mfhc0_maar, tl, env)
Blue Swirl895c2d02012-09-02 14:52:59 +000082DEF_HELPER_2(mfc0_watchlo, tl, env, i32)
83DEF_HELPER_2(mfc0_watchhi, tl, env, i32)
84DEF_HELPER_1(mfc0_debug, tl, env)
85DEF_HELPER_1(mftc0_debug, tl, env)
thsf1aa6322008-06-09 07:13:38 +000086#ifdef TARGET_MIPS64
Blue Swirl895c2d02012-09-02 14:52:59 +000087DEF_HELPER_1(dmfc0_tcrestart, tl, env)
88DEF_HELPER_1(dmfc0_tchalt, tl, env)
89DEF_HELPER_1(dmfc0_tccontext, tl, env)
90DEF_HELPER_1(dmfc0_tcschedule, tl, env)
91DEF_HELPER_1(dmfc0_tcschefback, tl, env)
92DEF_HELPER_1(dmfc0_lladdr, tl, env)
Yongbok Kimf6d4dd82016-03-24 15:49:58 +000093DEF_HELPER_1(dmfc0_maar, tl, env)
Blue Swirl895c2d02012-09-02 14:52:59 +000094DEF_HELPER_2(dmfc0_watchlo, tl, env, i32)
thsf1aa6322008-06-09 07:13:38 +000095#endif /* TARGET_MIPS64 */
96
Blue Swirl895c2d02012-09-02 14:52:59 +000097DEF_HELPER_2(mtc0_index, void, env, tl)
98DEF_HELPER_2(mtc0_mvpcontrol, void, env, tl)
99DEF_HELPER_2(mtc0_vpecontrol, void, env, tl)
100DEF_HELPER_2(mttc0_vpecontrol, void, env, tl)
101DEF_HELPER_2(mtc0_vpeconf0, void, env, tl)
102DEF_HELPER_2(mttc0_vpeconf0, void, env, tl)
103DEF_HELPER_2(mtc0_vpeconf1, void, env, tl)
104DEF_HELPER_2(mtc0_yqmask, void, env, tl)
105DEF_HELPER_2(mtc0_vpeopt, void, env, tl)
106DEF_HELPER_2(mtc0_entrylo0, void, env, tl)
107DEF_HELPER_2(mtc0_tcstatus, void, env, tl)
108DEF_HELPER_2(mttc0_tcstatus, void, env, tl)
109DEF_HELPER_2(mtc0_tcbind, void, env, tl)
110DEF_HELPER_2(mttc0_tcbind, void, env, tl)
111DEF_HELPER_2(mtc0_tcrestart, void, env, tl)
112DEF_HELPER_2(mttc0_tcrestart, void, env, tl)
113DEF_HELPER_2(mtc0_tchalt, void, env, tl)
114DEF_HELPER_2(mttc0_tchalt, void, env, tl)
115DEF_HELPER_2(mtc0_tccontext, void, env, tl)
116DEF_HELPER_2(mttc0_tccontext, void, env, tl)
117DEF_HELPER_2(mtc0_tcschedule, void, env, tl)
118DEF_HELPER_2(mttc0_tcschedule, void, env, tl)
119DEF_HELPER_2(mtc0_tcschefback, void, env, tl)
120DEF_HELPER_2(mttc0_tcschefback, void, env, tl)
121DEF_HELPER_2(mtc0_entrylo1, void, env, tl)
122DEF_HELPER_2(mtc0_context, void, env, tl)
123DEF_HELPER_2(mtc0_pagemask, void, env, tl)
124DEF_HELPER_2(mtc0_pagegrain, void, env, tl)
125DEF_HELPER_2(mtc0_wired, void, env, tl)
126DEF_HELPER_2(mtc0_srsconf0, void, env, tl)
127DEF_HELPER_2(mtc0_srsconf1, void, env, tl)
128DEF_HELPER_2(mtc0_srsconf2, void, env, tl)
129DEF_HELPER_2(mtc0_srsconf3, void, env, tl)
130DEF_HELPER_2(mtc0_srsconf4, void, env, tl)
131DEF_HELPER_2(mtc0_hwrena, void, env, tl)
132DEF_HELPER_2(mtc0_count, void, env, tl)
133DEF_HELPER_2(mtc0_entryhi, void, env, tl)
134DEF_HELPER_2(mttc0_entryhi, void, env, tl)
135DEF_HELPER_2(mtc0_compare, void, env, tl)
136DEF_HELPER_2(mtc0_status, void, env, tl)
137DEF_HELPER_2(mttc0_status, void, env, tl)
138DEF_HELPER_2(mtc0_intctl, void, env, tl)
139DEF_HELPER_2(mtc0_srsctl, void, env, tl)
140DEF_HELPER_2(mtc0_cause, void, env, tl)
141DEF_HELPER_2(mttc0_cause, void, env, tl)
142DEF_HELPER_2(mtc0_ebase, void, env, tl)
143DEF_HELPER_2(mttc0_ebase, void, env, tl)
144DEF_HELPER_2(mtc0_config0, void, env, tl)
145DEF_HELPER_2(mtc0_config2, void, env, tl)
Maciej W. Rozycki90f12d72014-11-18 03:59:07 +0000146DEF_HELPER_2(mtc0_config3, void, env, tl)
Petar Jovanovicb4160af2014-01-24 13:45:05 +0100147DEF_HELPER_2(mtc0_config4, void, env, tl)
Petar Jovanovicb4dd99a2014-01-17 19:25:57 +0100148DEF_HELPER_2(mtc0_config5, void, env, tl)
Blue Swirl895c2d02012-09-02 14:52:59 +0000149DEF_HELPER_2(mtc0_lladdr, void, env, tl)
Yongbok Kimf6d4dd82016-03-24 15:49:58 +0000150DEF_HELPER_2(mtc0_maar, void, env, tl)
151DEF_HELPER_2(mthc0_maar, void, env, tl)
152DEF_HELPER_2(mtc0_maari, void, env, tl)
Blue Swirl895c2d02012-09-02 14:52:59 +0000153DEF_HELPER_3(mtc0_watchlo, void, env, tl, i32)
154DEF_HELPER_3(mtc0_watchhi, void, env, tl, i32)
155DEF_HELPER_2(mtc0_xcontext, void, env, tl)
156DEF_HELPER_2(mtc0_framemask, void, env, tl)
157DEF_HELPER_2(mtc0_debug, void, env, tl)
158DEF_HELPER_2(mttc0_debug, void, env, tl)
159DEF_HELPER_2(mtc0_performance0, void, env, tl)
Leon Alrae0d74a222016-03-25 13:49:36 +0000160DEF_HELPER_2(mtc0_errctl, void, env, tl)
Blue Swirl895c2d02012-09-02 14:52:59 +0000161DEF_HELPER_2(mtc0_taglo, void, env, tl)
162DEF_HELPER_2(mtc0_datalo, void, env, tl)
163DEF_HELPER_2(mtc0_taghi, void, env, tl)
164DEF_HELPER_2(mtc0_datahi, void, env, tl)
thsf1aa6322008-06-09 07:13:38 +0000165
Leon Alrae7207c7f2014-07-07 11:23:59 +0100166#if defined(TARGET_MIPS64)
167DEF_HELPER_2(dmtc0_entrylo0, void, env, i64)
168DEF_HELPER_2(dmtc0_entrylo1, void, env, i64)
169#endif
170
thsf1aa6322008-06-09 07:13:38 +0000171/* MIPS MT functions */
Richard Hendersonf5daeec2013-09-14 15:38:30 -0700172DEF_HELPER_2(mftgpr, tl, env, i32)
Blue Swirl895c2d02012-09-02 14:52:59 +0000173DEF_HELPER_2(mftlo, tl, env, i32)
174DEF_HELPER_2(mfthi, tl, env, i32)
175DEF_HELPER_2(mftacx, tl, env, i32)
176DEF_HELPER_1(mftdsp, tl, env)
177DEF_HELPER_3(mttgpr, void, env, tl, i32)
178DEF_HELPER_3(mttlo, void, env, tl, i32)
179DEF_HELPER_3(mtthi, void, env, tl, i32)
180DEF_HELPER_3(mttacx, void, env, tl, i32)
181DEF_HELPER_2(mttdsp, void, env, tl)
Nathan Froyd9ed57262010-10-29 07:48:46 -0700182DEF_HELPER_0(dmt, tl)
183DEF_HELPER_0(emt, tl)
Blue Swirl895c2d02012-09-02 14:52:59 +0000184DEF_HELPER_1(dvpe, tl, env)
185DEF_HELPER_1(evpe, tl, env)
Yongbok Kim01bc4352016-02-03 12:31:07 +0000186
187/* R6 Multi-threading */
188DEF_HELPER_1(dvp, tl, env)
189DEF_HELPER_1(evp, tl, env)
ths0eaef5a2008-07-23 16:14:22 +0000190#endif /* !CONFIG_USER_ONLY */
Nathan Froyd3c824102010-06-08 13:29:59 -0700191
192/* microMIPS functions */
Richard Hendersonf5daeec2013-09-14 15:38:30 -0700193DEF_HELPER_4(lwm, void, env, tl, tl, i32)
194DEF_HELPER_4(swm, void, env, tl, tl, i32)
Nathan Froyd3c824102010-06-08 13:29:59 -0700195#ifdef TARGET_MIPS64
Richard Hendersonf5daeec2013-09-14 15:38:30 -0700196DEF_HELPER_4(ldm, void, env, tl, tl, i32)
197DEF_HELPER_4(sdm, void, env, tl, tl, i32)
Nathan Froyd3c824102010-06-08 13:29:59 -0700198#endif
199
pbrooka7812ae2008-11-17 14:43:54 +0000200DEF_HELPER_2(fork, void, tl, tl)
Blue Swirl895c2d02012-09-02 14:52:59 +0000201DEF_HELPER_2(yield, tl, env, tl)
thsf1aa6322008-06-09 07:13:38 +0000202
203/* CP1 functions */
Blue Swirl895c2d02012-09-02 14:52:59 +0000204DEF_HELPER_2(cfc1, tl, env, i32)
Petar Jovanovic736d1202014-01-22 18:35:32 +0100205DEF_HELPER_4(ctc1, void, env, tl, i32, i32)
ths5d0fc902008-06-11 15:27:54 +0000206
Blue Swirl895c2d02012-09-02 14:52:59 +0000207DEF_HELPER_2(float_cvtd_s, i64, env, i32)
208DEF_HELPER_2(float_cvtd_w, i64, env, i32)
209DEF_HELPER_2(float_cvtd_l, i64, env, i64)
Blue Swirl895c2d02012-09-02 14:52:59 +0000210DEF_HELPER_2(float_cvtps_pw, i64, env, i64)
211DEF_HELPER_2(float_cvtpw_ps, i64, env, i64)
212DEF_HELPER_2(float_cvts_d, i32, env, i64)
213DEF_HELPER_2(float_cvts_w, i32, env, i32)
214DEF_HELPER_2(float_cvts_l, i32, env, i64)
215DEF_HELPER_2(float_cvts_pl, i32, env, i32)
216DEF_HELPER_2(float_cvts_pu, i32, env, i32)
ths5d0fc902008-06-11 15:27:54 +0000217
Blue Swirl895c2d02012-09-02 14:52:59 +0000218DEF_HELPER_3(float_addr_ps, i64, env, i64, i64)
219DEF_HELPER_3(float_mulr_ps, i64, env, i64, i64)
ths5d0fc902008-06-11 15:27:54 +0000220
Aleksandar Markovicaf39bc82016-06-10 11:57:28 +0200221DEF_HELPER_FLAGS_2(float_class_s, TCG_CALL_NO_RWG_SE, i32, env, i32)
222DEF_HELPER_FLAGS_2(float_class_d, TCG_CALL_NO_RWG_SE, i64, env, i64)
Leon Alraee7f16ab2014-06-27 08:49:07 +0100223
224#define FOP_PROTO(op) \
225DEF_HELPER_4(float_ ## op ## _s, i32, env, i32, i32, i32) \
226DEF_HELPER_4(float_ ## op ## _d, i64, env, i64, i64, i64)
227FOP_PROTO(maddf)
228FOP_PROTO(msubf)
229#undef FOP_PROTO
230
231#define FOP_PROTO(op) \
232DEF_HELPER_3(float_ ## op ## _s, i32, env, i32, i32) \
233DEF_HELPER_3(float_ ## op ## _d, i64, env, i64, i64)
234FOP_PROTO(max)
235FOP_PROTO(maxa)
236FOP_PROTO(min)
237FOP_PROTO(mina)
238#undef FOP_PROTO
239
Blue Swirl895c2d02012-09-02 14:52:59 +0000240#define FOP_PROTO(op) \
Aleksandar Markovic87552082016-06-10 11:57:35 +0200241DEF_HELPER_2(float_ ## op ## _l_s, i64, env, i32) \
242DEF_HELPER_2(float_ ## op ## _l_d, i64, env, i64) \
243DEF_HELPER_2(float_ ## op ## _w_s, i32, env, i32) \
244DEF_HELPER_2(float_ ## op ## _w_d, i32, env, i64)
245FOP_PROTO(cvt)
thsb6d96be2008-07-09 11:05:10 +0000246FOP_PROTO(round)
247FOP_PROTO(trunc)
248FOP_PROTO(ceil)
249FOP_PROTO(floor)
Aleksandar Markovic87552082016-06-10 11:57:35 +0200250FOP_PROTO(cvt_2008)
251FOP_PROTO(round_2008)
252FOP_PROTO(trunc_2008)
253FOP_PROTO(ceil_2008)
254FOP_PROTO(floor_2008)
thsb6d96be2008-07-09 11:05:10 +0000255#undef FOP_PROTO
256
Blue Swirl895c2d02012-09-02 14:52:59 +0000257#define FOP_PROTO(op) \
258DEF_HELPER_2(float_ ## op ## _s, i32, env, i32) \
259DEF_HELPER_2(float_ ## op ## _d, i64, env, i64)
thsa16336e2008-06-19 18:35:02 +0000260FOP_PROTO(sqrt)
ths5d0fc902008-06-11 15:27:54 +0000261FOP_PROTO(rsqrt)
262FOP_PROTO(recip)
Leon Alraee7f16ab2014-06-27 08:49:07 +0100263FOP_PROTO(rint)
ths5d0fc902008-06-11 15:27:54 +0000264#undef FOP_PROTO
265
pbrooka7812ae2008-11-17 14:43:54 +0000266#define FOP_PROTO(op) \
267DEF_HELPER_1(float_ ## op ## _s, i32, i32) \
268DEF_HELPER_1(float_ ## op ## _d, i64, i64) \
269DEF_HELPER_1(float_ ## op ## _ps, i64, i64)
thsb6d96be2008-07-09 11:05:10 +0000270FOP_PROTO(abs)
271FOP_PROTO(chs)
Blue Swirl895c2d02012-09-02 14:52:59 +0000272#undef FOP_PROTO
273
274#define FOP_PROTO(op) \
275DEF_HELPER_2(float_ ## op ## _s, i32, env, i32) \
276DEF_HELPER_2(float_ ## op ## _d, i64, env, i64) \
277DEF_HELPER_2(float_ ## op ## _ps, i64, env, i64)
thsb6d96be2008-07-09 11:05:10 +0000278FOP_PROTO(recip1)
279FOP_PROTO(rsqrt1)
280#undef FOP_PROTO
281
Blue Swirl895c2d02012-09-02 14:52:59 +0000282#define FOP_PROTO(op) \
283DEF_HELPER_3(float_ ## op ## _s, i32, env, i32, i32) \
284DEF_HELPER_3(float_ ## op ## _d, i64, env, i64, i64) \
285DEF_HELPER_3(float_ ## op ## _ps, i64, env, i64, i64)
ths5d0fc902008-06-11 15:27:54 +0000286FOP_PROTO(add)
287FOP_PROTO(sub)
288FOP_PROTO(mul)
289FOP_PROTO(div)
thsb6d96be2008-07-09 11:05:10 +0000290FOP_PROTO(recip2)
291FOP_PROTO(rsqrt2)
292#undef FOP_PROTO
293
Blue Swirl895c2d02012-09-02 14:52:59 +0000294#define FOP_PROTO(op) \
295DEF_HELPER_4(float_ ## op ## _s, i32, env, i32, i32, i32) \
296DEF_HELPER_4(float_ ## op ## _d, i64, env, i64, i64, i64) \
297DEF_HELPER_4(float_ ## op ## _ps, i64, env, i64, i64, i64)
Aurelien Jarnob3d6cd42012-10-09 21:53:20 +0200298FOP_PROTO(madd)
299FOP_PROTO(msub)
300FOP_PROTO(nmadd)
301FOP_PROTO(nmsub)
ths5d0fc902008-06-11 15:27:54 +0000302#undef FOP_PROTO
303
Blue Swirl895c2d02012-09-02 14:52:59 +0000304#define FOP_PROTO(op) \
305DEF_HELPER_4(cmp_d_ ## op, void, env, i64, i64, int) \
306DEF_HELPER_4(cmpabs_d_ ## op, void, env, i64, i64, int) \
307DEF_HELPER_4(cmp_s_ ## op, void, env, i32, i32, int) \
308DEF_HELPER_4(cmpabs_s_ ## op, void, env, i32, i32, int) \
309DEF_HELPER_4(cmp_ps_ ## op, void, env, i64, i64, int) \
310DEF_HELPER_4(cmpabs_ps_ ## op, void, env, i64, i64, int)
ths5d0fc902008-06-11 15:27:54 +0000311FOP_PROTO(f)
312FOP_PROTO(un)
313FOP_PROTO(eq)
314FOP_PROTO(ueq)
315FOP_PROTO(olt)
316FOP_PROTO(ult)
317FOP_PROTO(ole)
318FOP_PROTO(ule)
319FOP_PROTO(sf)
320FOP_PROTO(ngle)
321FOP_PROTO(seq)
322FOP_PROTO(ngl)
323FOP_PROTO(lt)
324FOP_PROTO(nge)
325FOP_PROTO(le)
326FOP_PROTO(ngt)
327#undef FOP_PROTO
ths08ba7962008-06-12 03:15:13 +0000328
Yongbok Kim3f493882014-06-27 08:49:07 +0100329#define FOP_PROTO(op) \
330DEF_HELPER_3(r6_cmp_d_ ## op, i64, env, i64, i64) \
331DEF_HELPER_3(r6_cmp_s_ ## op, i32, env, i32, i32)
332FOP_PROTO(af)
333FOP_PROTO(un)
334FOP_PROTO(eq)
335FOP_PROTO(ueq)
336FOP_PROTO(lt)
337FOP_PROTO(ult)
338FOP_PROTO(le)
339FOP_PROTO(ule)
340FOP_PROTO(saf)
341FOP_PROTO(sun)
342FOP_PROTO(seq)
343FOP_PROTO(sueq)
344FOP_PROTO(slt)
345FOP_PROTO(sult)
346FOP_PROTO(sle)
347FOP_PROTO(sule)
348FOP_PROTO(or)
349FOP_PROTO(une)
350FOP_PROTO(ne)
351FOP_PROTO(sor)
352FOP_PROTO(sune)
353FOP_PROTO(sne)
354#undef FOP_PROTO
355
ths08ba7962008-06-12 03:15:13 +0000356/* Special functions */
ths0eaef5a2008-07-23 16:14:22 +0000357#ifndef CONFIG_USER_ONLY
Blue Swirl895c2d02012-09-02 14:52:59 +0000358DEF_HELPER_1(tlbwi, void, env)
359DEF_HELPER_1(tlbwr, void, env)
360DEF_HELPER_1(tlbp, void, env)
361DEF_HELPER_1(tlbr, void, env)
Leon Alrae9456c2f2014-07-07 11:24:00 +0100362DEF_HELPER_1(tlbinv, void, env)
363DEF_HELPER_1(tlbinvf, void, env)
Blue Swirl895c2d02012-09-02 14:52:59 +0000364DEF_HELPER_1(di, tl, env)
365DEF_HELPER_1(ei, tl, env)
366DEF_HELPER_1(eret, void, env)
Leon Alraece9782f2015-06-04 17:00:31 +0100367DEF_HELPER_1(eretnc, void, env)
Blue Swirl895c2d02012-09-02 14:52:59 +0000368DEF_HELPER_1(deret, void, env)
ths0eaef5a2008-07-23 16:14:22 +0000369#endif /* !CONFIG_USER_ONLY */
Blue Swirl895c2d02012-09-02 14:52:59 +0000370DEF_HELPER_1(rdhwr_cpunum, tl, env)
371DEF_HELPER_1(rdhwr_synci_step, tl, env)
372DEF_HELPER_1(rdhwr_cc, tl, env)
373DEF_HELPER_1(rdhwr_ccres, tl, env)
Yongbok Kimb00c7212015-10-29 15:18:39 +0000374DEF_HELPER_1(rdhwr_performance, tl, env)
375DEF_HELPER_1(rdhwr_xnp, tl, env)
Blue Swirl895c2d02012-09-02 14:52:59 +0000376DEF_HELPER_2(pmon, void, env, int)
377DEF_HELPER_1(wait, void, env)
pbrooka7812ae2008-11-17 14:43:54 +0000378
Richard Hendersonbd277fa2012-09-18 21:59:44 -0700379/* Loongson multimedia functions. */
Aurelien Jarno95bf7872012-10-09 21:53:09 +0200380DEF_HELPER_FLAGS_2(paddsh, TCG_CALL_NO_RWG_SE, i64, i64, i64)
381DEF_HELPER_FLAGS_2(paddush, TCG_CALL_NO_RWG_SE, i64, i64, i64)
382DEF_HELPER_FLAGS_2(paddh, TCG_CALL_NO_RWG_SE, i64, i64, i64)
383DEF_HELPER_FLAGS_2(paddw, TCG_CALL_NO_RWG_SE, i64, i64, i64)
384DEF_HELPER_FLAGS_2(paddsb, TCG_CALL_NO_RWG_SE, i64, i64, i64)
385DEF_HELPER_FLAGS_2(paddusb, TCG_CALL_NO_RWG_SE, i64, i64, i64)
386DEF_HELPER_FLAGS_2(paddb, TCG_CALL_NO_RWG_SE, i64, i64, i64)
Richard Hendersonbd277fa2012-09-18 21:59:44 -0700387
Aurelien Jarno95bf7872012-10-09 21:53:09 +0200388DEF_HELPER_FLAGS_2(psubsh, TCG_CALL_NO_RWG_SE, i64, i64, i64)
389DEF_HELPER_FLAGS_2(psubush, TCG_CALL_NO_RWG_SE, i64, i64, i64)
390DEF_HELPER_FLAGS_2(psubh, TCG_CALL_NO_RWG_SE, i64, i64, i64)
391DEF_HELPER_FLAGS_2(psubw, TCG_CALL_NO_RWG_SE, i64, i64, i64)
392DEF_HELPER_FLAGS_2(psubsb, TCG_CALL_NO_RWG_SE, i64, i64, i64)
393DEF_HELPER_FLAGS_2(psubusb, TCG_CALL_NO_RWG_SE, i64, i64, i64)
394DEF_HELPER_FLAGS_2(psubb, TCG_CALL_NO_RWG_SE, i64, i64, i64)
Richard Hendersonbd277fa2012-09-18 21:59:44 -0700395
Aurelien Jarno95bf7872012-10-09 21:53:09 +0200396DEF_HELPER_FLAGS_2(pshufh, TCG_CALL_NO_RWG_SE, i64, i64, i64)
397DEF_HELPER_FLAGS_2(packsswh, TCG_CALL_NO_RWG_SE, i64, i64, i64)
398DEF_HELPER_FLAGS_2(packsshb, TCG_CALL_NO_RWG_SE, i64, i64, i64)
399DEF_HELPER_FLAGS_2(packushb, TCG_CALL_NO_RWG_SE, i64, i64, i64)
Richard Hendersonbd277fa2012-09-18 21:59:44 -0700400
Aurelien Jarno95bf7872012-10-09 21:53:09 +0200401DEF_HELPER_FLAGS_2(punpcklhw, TCG_CALL_NO_RWG_SE, i64, i64, i64)
402DEF_HELPER_FLAGS_2(punpckhhw, TCG_CALL_NO_RWG_SE, i64, i64, i64)
403DEF_HELPER_FLAGS_2(punpcklbh, TCG_CALL_NO_RWG_SE, i64, i64, i64)
404DEF_HELPER_FLAGS_2(punpckhbh, TCG_CALL_NO_RWG_SE, i64, i64, i64)
405DEF_HELPER_FLAGS_2(punpcklwd, TCG_CALL_NO_RWG_SE, i64, i64, i64)
406DEF_HELPER_FLAGS_2(punpckhwd, TCG_CALL_NO_RWG_SE, i64, i64, i64)
Richard Hendersonbd277fa2012-09-18 21:59:44 -0700407
Aurelien Jarno95bf7872012-10-09 21:53:09 +0200408DEF_HELPER_FLAGS_2(pavgh, TCG_CALL_NO_RWG_SE, i64, i64, i64)
409DEF_HELPER_FLAGS_2(pavgb, TCG_CALL_NO_RWG_SE, i64, i64, i64)
410DEF_HELPER_FLAGS_2(pmaxsh, TCG_CALL_NO_RWG_SE, i64, i64, i64)
411DEF_HELPER_FLAGS_2(pminsh, TCG_CALL_NO_RWG_SE, i64, i64, i64)
412DEF_HELPER_FLAGS_2(pmaxub, TCG_CALL_NO_RWG_SE, i64, i64, i64)
413DEF_HELPER_FLAGS_2(pminub, TCG_CALL_NO_RWG_SE, i64, i64, i64)
Richard Hendersonbd277fa2012-09-18 21:59:44 -0700414
Aurelien Jarno95bf7872012-10-09 21:53:09 +0200415DEF_HELPER_FLAGS_2(pcmpeqw, TCG_CALL_NO_RWG_SE, i64, i64, i64)
416DEF_HELPER_FLAGS_2(pcmpgtw, TCG_CALL_NO_RWG_SE, i64, i64, i64)
417DEF_HELPER_FLAGS_2(pcmpeqh, TCG_CALL_NO_RWG_SE, i64, i64, i64)
418DEF_HELPER_FLAGS_2(pcmpgth, TCG_CALL_NO_RWG_SE, i64, i64, i64)
419DEF_HELPER_FLAGS_2(pcmpeqb, TCG_CALL_NO_RWG_SE, i64, i64, i64)
420DEF_HELPER_FLAGS_2(pcmpgtb, TCG_CALL_NO_RWG_SE, i64, i64, i64)
Richard Hendersonbd277fa2012-09-18 21:59:44 -0700421
Aurelien Jarno95bf7872012-10-09 21:53:09 +0200422DEF_HELPER_FLAGS_2(psllw, TCG_CALL_NO_RWG_SE, i64, i64, i64)
423DEF_HELPER_FLAGS_2(psllh, TCG_CALL_NO_RWG_SE, i64, i64, i64)
424DEF_HELPER_FLAGS_2(psrlw, TCG_CALL_NO_RWG_SE, i64, i64, i64)
425DEF_HELPER_FLAGS_2(psrlh, TCG_CALL_NO_RWG_SE, i64, i64, i64)
426DEF_HELPER_FLAGS_2(psraw, TCG_CALL_NO_RWG_SE, i64, i64, i64)
427DEF_HELPER_FLAGS_2(psrah, TCG_CALL_NO_RWG_SE, i64, i64, i64)
Richard Hendersonbd277fa2012-09-18 21:59:44 -0700428
Aurelien Jarno95bf7872012-10-09 21:53:09 +0200429DEF_HELPER_FLAGS_2(pmullh, TCG_CALL_NO_RWG_SE, i64, i64, i64)
430DEF_HELPER_FLAGS_2(pmulhh, TCG_CALL_NO_RWG_SE, i64, i64, i64)
431DEF_HELPER_FLAGS_2(pmulhuh, TCG_CALL_NO_RWG_SE, i64, i64, i64)
432DEF_HELPER_FLAGS_2(pmaddhw, TCG_CALL_NO_RWG_SE, i64, i64, i64)
Richard Hendersonbd277fa2012-09-18 21:59:44 -0700433
Aurelien Jarno95bf7872012-10-09 21:53:09 +0200434DEF_HELPER_FLAGS_2(pasubub, TCG_CALL_NO_RWG_SE, i64, i64, i64)
435DEF_HELPER_FLAGS_1(biadd, TCG_CALL_NO_RWG_SE, i64, i64)
436DEF_HELPER_FLAGS_1(pmovmskb, TCG_CALL_NO_RWG_SE, i64, i64)
Richard Hendersonbd277fa2012-09-18 21:59:44 -0700437
Jia Liu461c08d2012-10-24 22:17:06 +0800438/*** MIPS DSP ***/
439/* DSP Arithmetic Sub-class insns */
440DEF_HELPER_FLAGS_3(addq_ph, 0, tl, tl, tl, env)
441DEF_HELPER_FLAGS_3(addq_s_ph, 0, tl, tl, tl, env)
442#if defined(TARGET_MIPS64)
443DEF_HELPER_FLAGS_3(addq_qh, 0, tl, tl, tl, env)
444DEF_HELPER_FLAGS_3(addq_s_qh, 0, tl, tl, tl, env)
445#endif
446DEF_HELPER_FLAGS_3(addq_s_w, 0, tl, tl, tl, env)
447#if defined(TARGET_MIPS64)
448DEF_HELPER_FLAGS_3(addq_pw, 0, tl, tl, tl, env)
449DEF_HELPER_FLAGS_3(addq_s_pw, 0, tl, tl, tl, env)
450#endif
451DEF_HELPER_FLAGS_3(addu_qb, 0, tl, tl, tl, env)
452DEF_HELPER_FLAGS_3(addu_s_qb, 0, tl, tl, tl, env)
453DEF_HELPER_FLAGS_2(adduh_qb, TCG_CALL_NO_RWG_SE, tl, tl, tl)
454DEF_HELPER_FLAGS_2(adduh_r_qb, TCG_CALL_NO_RWG_SE, tl, tl, tl)
455DEF_HELPER_FLAGS_3(addu_ph, 0, tl, tl, tl, env)
456DEF_HELPER_FLAGS_3(addu_s_ph, 0, tl, tl, tl, env)
457DEF_HELPER_FLAGS_2(addqh_ph, TCG_CALL_NO_RWG_SE, tl, tl, tl)
458DEF_HELPER_FLAGS_2(addqh_r_ph, TCG_CALL_NO_RWG_SE, tl, tl, tl)
459DEF_HELPER_FLAGS_2(addqh_w, TCG_CALL_NO_RWG_SE, tl, tl, tl)
460DEF_HELPER_FLAGS_2(addqh_r_w, TCG_CALL_NO_RWG_SE, tl, tl, tl)
461#if defined(TARGET_MIPS64)
462DEF_HELPER_FLAGS_3(addu_ob, 0, tl, tl, tl, env)
463DEF_HELPER_FLAGS_3(addu_s_ob, 0, tl, tl, tl, env)
464DEF_HELPER_FLAGS_2(adduh_ob, TCG_CALL_NO_RWG_SE, tl, tl, tl)
465DEF_HELPER_FLAGS_2(adduh_r_ob, TCG_CALL_NO_RWG_SE, tl, tl, tl)
466DEF_HELPER_FLAGS_3(addu_qh, 0, tl, tl, tl, env)
467DEF_HELPER_FLAGS_3(addu_s_qh, 0, tl, tl, tl, env)
468#endif
469DEF_HELPER_FLAGS_3(subq_ph, 0, tl, tl, tl, env)
470DEF_HELPER_FLAGS_3(subq_s_ph, 0, tl, tl, tl, env)
471#if defined(TARGET_MIPS64)
472DEF_HELPER_FLAGS_3(subq_qh, 0, tl, tl, tl, env)
473DEF_HELPER_FLAGS_3(subq_s_qh, 0, tl, tl, tl, env)
474#endif
475DEF_HELPER_FLAGS_3(subq_s_w, 0, tl, tl, tl, env)
476#if defined(TARGET_MIPS64)
477DEF_HELPER_FLAGS_3(subq_pw, 0, tl, tl, tl, env)
478DEF_HELPER_FLAGS_3(subq_s_pw, 0, tl, tl, tl, env)
479#endif
480DEF_HELPER_FLAGS_3(subu_qb, 0, tl, tl, tl, env)
481DEF_HELPER_FLAGS_3(subu_s_qb, 0, tl, tl, tl, env)
482DEF_HELPER_FLAGS_2(subuh_qb, TCG_CALL_NO_RWG_SE, tl, tl, tl)
483DEF_HELPER_FLAGS_2(subuh_r_qb, TCG_CALL_NO_RWG_SE, tl, tl, tl)
484DEF_HELPER_FLAGS_3(subu_ph, 0, tl, tl, tl, env)
485DEF_HELPER_FLAGS_3(subu_s_ph, 0, tl, tl, tl, env)
486DEF_HELPER_FLAGS_2(subqh_ph, TCG_CALL_NO_RWG_SE, tl, tl, tl)
487DEF_HELPER_FLAGS_2(subqh_r_ph, TCG_CALL_NO_RWG_SE, tl, tl, tl)
488DEF_HELPER_FLAGS_2(subqh_w, TCG_CALL_NO_RWG_SE, tl, tl, tl)
489DEF_HELPER_FLAGS_2(subqh_r_w, TCG_CALL_NO_RWG_SE, tl, tl, tl)
490#if defined(TARGET_MIPS64)
491DEF_HELPER_FLAGS_3(subu_ob, 0, tl, tl, tl, env)
492DEF_HELPER_FLAGS_3(subu_s_ob, 0, tl, tl, tl, env)
493DEF_HELPER_FLAGS_2(subuh_ob, TCG_CALL_NO_RWG_SE, tl, tl, tl)
494DEF_HELPER_FLAGS_2(subuh_r_ob, TCG_CALL_NO_RWG_SE, tl, tl, tl)
495DEF_HELPER_FLAGS_3(subu_qh, 0, tl, tl, tl, env)
496DEF_HELPER_FLAGS_3(subu_s_qh, 0, tl, tl, tl, env)
497#endif
498DEF_HELPER_FLAGS_3(addsc, 0, tl, tl, tl, env)
499DEF_HELPER_FLAGS_3(addwc, 0, tl, tl, tl, env)
500DEF_HELPER_FLAGS_2(modsub, TCG_CALL_NO_RWG_SE, tl, tl, tl)
501DEF_HELPER_FLAGS_1(raddu_w_qb, TCG_CALL_NO_RWG_SE, tl, tl)
502#if defined(TARGET_MIPS64)
503DEF_HELPER_FLAGS_1(raddu_l_ob, TCG_CALL_NO_RWG_SE, tl, tl)
504#endif
505DEF_HELPER_FLAGS_2(absq_s_qb, 0, tl, tl, env)
506DEF_HELPER_FLAGS_2(absq_s_ph, 0, tl, tl, env)
507DEF_HELPER_FLAGS_2(absq_s_w, 0, tl, tl, env)
508#if defined(TARGET_MIPS64)
509DEF_HELPER_FLAGS_2(absq_s_ob, 0, tl, tl, env)
510DEF_HELPER_FLAGS_2(absq_s_qh, 0, tl, tl, env)
511DEF_HELPER_FLAGS_2(absq_s_pw, 0, tl, tl, env)
512#endif
513DEF_HELPER_FLAGS_2(precr_qb_ph, TCG_CALL_NO_RWG_SE, tl, tl, tl)
514DEF_HELPER_FLAGS_2(precrq_qb_ph, TCG_CALL_NO_RWG_SE, tl, tl, tl)
515DEF_HELPER_FLAGS_3(precr_sra_ph_w, TCG_CALL_NO_RWG_SE,
516 tl, i32, tl, tl)
517DEF_HELPER_FLAGS_3(precr_sra_r_ph_w, TCG_CALL_NO_RWG_SE,
518 tl, i32, tl, tl)
519DEF_HELPER_FLAGS_2(precrq_ph_w, TCG_CALL_NO_RWG_SE, tl, tl, tl)
520DEF_HELPER_FLAGS_3(precrq_rs_ph_w, 0, tl, tl, tl, env)
521#if defined(TARGET_MIPS64)
522DEF_HELPER_FLAGS_2(precr_ob_qh, TCG_CALL_NO_RWG_SE, tl, tl, tl)
523DEF_HELPER_FLAGS_3(precr_sra_qh_pw,
524 TCG_CALL_NO_RWG_SE, tl, tl, tl, i32)
525DEF_HELPER_FLAGS_3(precr_sra_r_qh_pw,
526 TCG_CALL_NO_RWG_SE, tl, tl, tl, i32)
527DEF_HELPER_FLAGS_2(precrq_ob_qh, TCG_CALL_NO_RWG_SE, tl, tl, tl)
528DEF_HELPER_FLAGS_2(precrq_qh_pw, TCG_CALL_NO_RWG_SE, tl, tl, tl)
529DEF_HELPER_FLAGS_3(precrq_rs_qh_pw,
530 TCG_CALL_NO_RWG_SE, tl, tl, tl, env)
531DEF_HELPER_FLAGS_2(precrq_pw_l, TCG_CALL_NO_RWG_SE, tl, tl, tl)
532#endif
533DEF_HELPER_FLAGS_3(precrqu_s_qb_ph, 0, tl, tl, tl, env)
534#if defined(TARGET_MIPS64)
535DEF_HELPER_FLAGS_3(precrqu_s_ob_qh,
536 TCG_CALL_NO_RWG_SE, tl, tl, tl, env)
537
538DEF_HELPER_FLAGS_1(preceq_pw_qhl, TCG_CALL_NO_RWG_SE, tl, tl)
539DEF_HELPER_FLAGS_1(preceq_pw_qhr, TCG_CALL_NO_RWG_SE, tl, tl)
540DEF_HELPER_FLAGS_1(preceq_pw_qhla, TCG_CALL_NO_RWG_SE, tl, tl)
541DEF_HELPER_FLAGS_1(preceq_pw_qhra, TCG_CALL_NO_RWG_SE, tl, tl)
542#endif
543DEF_HELPER_FLAGS_1(precequ_ph_qbl, TCG_CALL_NO_RWG_SE, tl, tl)
544DEF_HELPER_FLAGS_1(precequ_ph_qbr, TCG_CALL_NO_RWG_SE, tl, tl)
545DEF_HELPER_FLAGS_1(precequ_ph_qbla, TCG_CALL_NO_RWG_SE, tl, tl)
546DEF_HELPER_FLAGS_1(precequ_ph_qbra, TCG_CALL_NO_RWG_SE, tl, tl)
547#if defined(TARGET_MIPS64)
548DEF_HELPER_FLAGS_1(precequ_qh_obl, TCG_CALL_NO_RWG_SE, tl, tl)
549DEF_HELPER_FLAGS_1(precequ_qh_obr, TCG_CALL_NO_RWG_SE, tl, tl)
550DEF_HELPER_FLAGS_1(precequ_qh_obla, TCG_CALL_NO_RWG_SE, tl, tl)
551DEF_HELPER_FLAGS_1(precequ_qh_obra, TCG_CALL_NO_RWG_SE, tl, tl)
552#endif
553DEF_HELPER_FLAGS_1(preceu_ph_qbl, TCG_CALL_NO_RWG_SE, tl, tl)
554DEF_HELPER_FLAGS_1(preceu_ph_qbr, TCG_CALL_NO_RWG_SE, tl, tl)
555DEF_HELPER_FLAGS_1(preceu_ph_qbla, TCG_CALL_NO_RWG_SE, tl, tl)
556DEF_HELPER_FLAGS_1(preceu_ph_qbra, TCG_CALL_NO_RWG_SE, tl, tl)
557#if defined(TARGET_MIPS64)
558DEF_HELPER_FLAGS_1(preceu_qh_obl, TCG_CALL_NO_RWG_SE, tl, tl)
559DEF_HELPER_FLAGS_1(preceu_qh_obr, TCG_CALL_NO_RWG_SE, tl, tl)
560DEF_HELPER_FLAGS_1(preceu_qh_obla, TCG_CALL_NO_RWG_SE, tl, tl)
561DEF_HELPER_FLAGS_1(preceu_qh_obra, TCG_CALL_NO_RWG_SE, tl, tl)
562#endif
563
Jia Liu77c5fa82012-10-24 22:17:07 +0800564/* DSP GPR-Based Shift Sub-class insns */
565DEF_HELPER_FLAGS_3(shll_qb, 0, tl, tl, tl, env)
566#if defined(TARGET_MIPS64)
567DEF_HELPER_FLAGS_3(shll_ob, 0, tl, tl, tl, env)
568#endif
569DEF_HELPER_FLAGS_3(shll_ph, 0, tl, tl, tl, env)
570DEF_HELPER_FLAGS_3(shll_s_ph, 0, tl, tl, tl, env)
571#if defined(TARGET_MIPS64)
572DEF_HELPER_FLAGS_3(shll_qh, 0, tl, tl, tl, env)
573DEF_HELPER_FLAGS_3(shll_s_qh, 0, tl, tl, tl, env)
574#endif
575DEF_HELPER_FLAGS_3(shll_s_w, 0, tl, tl, tl, env)
576#if defined(TARGET_MIPS64)
577DEF_HELPER_FLAGS_3(shll_pw, 0, tl, tl, tl, env)
578DEF_HELPER_FLAGS_3(shll_s_pw, 0, tl, tl, tl, env)
579#endif
580DEF_HELPER_FLAGS_2(shrl_qb, TCG_CALL_NO_RWG_SE, tl, tl, tl)
581DEF_HELPER_FLAGS_2(shrl_ph, TCG_CALL_NO_RWG_SE, tl, tl, tl)
582#if defined(TARGET_MIPS64)
583DEF_HELPER_FLAGS_2(shrl_ob, TCG_CALL_NO_RWG_SE, tl, tl, tl)
584DEF_HELPER_FLAGS_2(shrl_qh, TCG_CALL_NO_RWG_SE, tl, tl, tl)
585#endif
586DEF_HELPER_FLAGS_2(shra_qb, TCG_CALL_NO_RWG_SE, tl, tl, tl)
587DEF_HELPER_FLAGS_2(shra_r_qb, TCG_CALL_NO_RWG_SE, tl, tl, tl)
588#if defined(TARGET_MIPS64)
589DEF_HELPER_FLAGS_2(shra_ob, TCG_CALL_NO_RWG_SE, tl, tl, tl)
590DEF_HELPER_FLAGS_2(shra_r_ob, TCG_CALL_NO_RWG_SE, tl, tl, tl)
591#endif
592DEF_HELPER_FLAGS_2(shra_ph, TCG_CALL_NO_RWG_SE, tl, tl, tl)
593DEF_HELPER_FLAGS_2(shra_r_ph, TCG_CALL_NO_RWG_SE, tl, tl, tl)
594DEF_HELPER_FLAGS_2(shra_r_w, TCG_CALL_NO_RWG_SE, tl, tl, tl)
595#if defined(TARGET_MIPS64)
596DEF_HELPER_FLAGS_2(shra_qh, TCG_CALL_NO_RWG_SE, tl, tl, tl)
597DEF_HELPER_FLAGS_2(shra_r_qh, TCG_CALL_NO_RWG_SE, tl, tl, tl)
598DEF_HELPER_FLAGS_2(shra_pw, TCG_CALL_NO_RWG_SE, tl, tl, tl)
599DEF_HELPER_FLAGS_2(shra_r_pw, TCG_CALL_NO_RWG_SE, tl, tl, tl)
600#endif
601
Jia Liua22260a2012-10-24 22:17:08 +0800602/* DSP Multiply Sub-class insns */
603DEF_HELPER_FLAGS_3(muleu_s_ph_qbl, 0, tl, tl, tl, env)
604DEF_HELPER_FLAGS_3(muleu_s_ph_qbr, 0, tl, tl, tl, env)
605#if defined(TARGET_MIPS64)
606DEF_HELPER_FLAGS_3(muleu_s_qh_obl, 0, tl, tl, tl, env)
607DEF_HELPER_FLAGS_3(muleu_s_qh_obr, 0, tl, tl, tl, env)
608#endif
609DEF_HELPER_FLAGS_3(mulq_rs_ph, 0, tl, tl, tl, env)
610#if defined(TARGET_MIPS64)
611DEF_HELPER_FLAGS_3(mulq_rs_qh, 0, tl, tl, tl, env)
612#endif
613DEF_HELPER_FLAGS_3(muleq_s_w_phl, 0, tl, tl, tl, env)
614DEF_HELPER_FLAGS_3(muleq_s_w_phr, 0, tl, tl, tl, env)
615#if defined(TARGET_MIPS64)
616DEF_HELPER_FLAGS_3(muleq_s_pw_qhl, 0, tl, tl, tl, env)
617DEF_HELPER_FLAGS_3(muleq_s_pw_qhr, 0, tl, tl, tl, env)
618#endif
619DEF_HELPER_FLAGS_4(dpau_h_qbl, 0, void, i32, tl, tl, env)
620DEF_HELPER_FLAGS_4(dpau_h_qbr, 0, void, i32, tl, tl, env)
621#if defined(TARGET_MIPS64)
622DEF_HELPER_FLAGS_4(dpau_h_obl, 0, void, tl, tl, i32, env)
623DEF_HELPER_FLAGS_4(dpau_h_obr, 0, void, tl, tl, i32, env)
624#endif
625DEF_HELPER_FLAGS_4(dpsu_h_qbl, 0, void, i32, tl, tl, env)
626DEF_HELPER_FLAGS_4(dpsu_h_qbr, 0, void, i32, tl, tl, env)
627#if defined(TARGET_MIPS64)
628DEF_HELPER_FLAGS_4(dpsu_h_obl, 0, void, tl, tl, i32, env)
629DEF_HELPER_FLAGS_4(dpsu_h_obr, 0, void, tl, tl, i32, env)
630#endif
631DEF_HELPER_FLAGS_4(dpa_w_ph, 0, void, i32, tl, tl, env)
632#if defined(TARGET_MIPS64)
633DEF_HELPER_FLAGS_4(dpa_w_qh, 0, void, tl, tl, i32, env)
634#endif
635DEF_HELPER_FLAGS_4(dpax_w_ph, 0, void, i32, tl, tl, env)
636DEF_HELPER_FLAGS_4(dpaq_s_w_ph, 0, void, i32, tl, tl, env)
637#if defined(TARGET_MIPS64)
638DEF_HELPER_FLAGS_4(dpaq_s_w_qh, 0, void, tl, tl, i32, env)
639#endif
640DEF_HELPER_FLAGS_4(dpaqx_s_w_ph, 0, void, i32, tl, tl, env)
641DEF_HELPER_FLAGS_4(dpaqx_sa_w_ph, 0, void, i32, tl, tl, env)
642DEF_HELPER_FLAGS_4(dps_w_ph, 0, void, i32, tl, tl, env)
643#if defined(TARGET_MIPS64)
644DEF_HELPER_FLAGS_4(dps_w_qh, 0, void, tl, tl, i32, env)
645#endif
646DEF_HELPER_FLAGS_4(dpsx_w_ph, 0, void, i32, tl, tl, env)
647DEF_HELPER_FLAGS_4(dpsq_s_w_ph, 0, void, i32, tl, tl, env)
648#if defined(TARGET_MIPS64)
649DEF_HELPER_FLAGS_4(dpsq_s_w_qh, 0, void, tl, tl, i32, env)
650#endif
651DEF_HELPER_FLAGS_4(dpsqx_s_w_ph, 0, void, i32, tl, tl, env)
652DEF_HELPER_FLAGS_4(dpsqx_sa_w_ph, 0, void, i32, tl, tl, env)
653DEF_HELPER_FLAGS_4(mulsaq_s_w_ph, 0, void, i32, tl, tl, env)
654#if defined(TARGET_MIPS64)
655DEF_HELPER_FLAGS_4(mulsaq_s_w_qh, 0, void, tl, tl, i32, env)
656#endif
657DEF_HELPER_FLAGS_4(dpaq_sa_l_w, 0, void, i32, tl, tl, env)
658#if defined(TARGET_MIPS64)
659DEF_HELPER_FLAGS_4(dpaq_sa_l_pw, 0, void, tl, tl, i32, env)
660#endif
661DEF_HELPER_FLAGS_4(dpsq_sa_l_w, 0, void, i32, tl, tl, env)
662#if defined(TARGET_MIPS64)
663DEF_HELPER_FLAGS_4(dpsq_sa_l_pw, 0, void, tl, tl, i32, env)
664DEF_HELPER_FLAGS_4(mulsaq_s_l_pw, 0, void, tl, tl, i32, env)
665#endif
666DEF_HELPER_FLAGS_4(maq_s_w_phl, 0, void, i32, tl, tl, env)
667DEF_HELPER_FLAGS_4(maq_s_w_phr, 0, void, i32, tl, tl, env)
668DEF_HELPER_FLAGS_4(maq_sa_w_phl, 0, void, i32, tl, tl, env)
669DEF_HELPER_FLAGS_4(maq_sa_w_phr, 0, void, i32, tl, tl, env)
670DEF_HELPER_FLAGS_3(mul_ph, 0, tl, tl, tl, env)
671DEF_HELPER_FLAGS_3(mul_s_ph, 0, tl, tl, tl, env)
672DEF_HELPER_FLAGS_3(mulq_s_ph, 0, tl, tl, tl, env)
673DEF_HELPER_FLAGS_3(mulq_s_w, 0, tl, tl, tl, env)
674DEF_HELPER_FLAGS_3(mulq_rs_w, 0, tl, tl, tl, env)
675DEF_HELPER_FLAGS_4(mulsa_w_ph, 0, void, i32, tl, tl, env)
676#if defined(TARGET_MIPS64)
677DEF_HELPER_FLAGS_4(maq_s_w_qhll, 0, void, tl, tl, i32, env)
678DEF_HELPER_FLAGS_4(maq_s_w_qhlr, 0, void, tl, tl, i32, env)
679DEF_HELPER_FLAGS_4(maq_s_w_qhrl, 0, void, tl, tl, i32, env)
680DEF_HELPER_FLAGS_4(maq_s_w_qhrr, 0, void, tl, tl, i32, env)
681DEF_HELPER_FLAGS_4(maq_sa_w_qhll, 0, void, tl, tl, i32, env)
682DEF_HELPER_FLAGS_4(maq_sa_w_qhlr, 0, void, tl, tl, i32, env)
683DEF_HELPER_FLAGS_4(maq_sa_w_qhrl, 0, void, tl, tl, i32, env)
684DEF_HELPER_FLAGS_4(maq_sa_w_qhrr, 0, void, tl, tl, i32, env)
685DEF_HELPER_FLAGS_4(maq_s_l_pwl, 0, void, tl, tl, i32, env)
686DEF_HELPER_FLAGS_4(maq_s_l_pwr, 0, void, tl, tl, i32, env)
687DEF_HELPER_FLAGS_4(dmadd, 0, void, tl, tl, i32, env)
688DEF_HELPER_FLAGS_4(dmaddu, 0, void, tl, tl, i32, env)
689DEF_HELPER_FLAGS_4(dmsub, 0, void, tl, tl, i32, env)
690DEF_HELPER_FLAGS_4(dmsubu, 0, void, tl, tl, i32, env)
691#endif
692
Jia Liu1cb66862012-10-24 22:17:09 +0800693/* DSP Bit/Manipulation Sub-class insns */
694DEF_HELPER_FLAGS_1(bitrev, TCG_CALL_NO_RWG_SE, tl, tl)
695DEF_HELPER_FLAGS_3(insv, 0, tl, env, tl, tl)
696#if defined(TARGET_MIPS64)
Richard Hendersonf5daeec2013-09-14 15:38:30 -0700697DEF_HELPER_FLAGS_3(dinsv, 0, tl, env, tl, tl)
Jia Liu1cb66862012-10-24 22:17:09 +0800698#endif
699
Jia Liu26690562012-10-24 22:17:10 +0800700/* DSP Compare-Pick Sub-class insns */
701DEF_HELPER_FLAGS_3(cmpu_eq_qb, 0, void, tl, tl, env)
702DEF_HELPER_FLAGS_3(cmpu_lt_qb, 0, void, tl, tl, env)
703DEF_HELPER_FLAGS_3(cmpu_le_qb, 0, void, tl, tl, env)
704DEF_HELPER_FLAGS_2(cmpgu_eq_qb, TCG_CALL_NO_RWG_SE, tl, tl, tl)
705DEF_HELPER_FLAGS_2(cmpgu_lt_qb, TCG_CALL_NO_RWG_SE, tl, tl, tl)
706DEF_HELPER_FLAGS_2(cmpgu_le_qb, TCG_CALL_NO_RWG_SE, tl, tl, tl)
707DEF_HELPER_FLAGS_3(cmp_eq_ph, 0, void, tl, tl, env)
708DEF_HELPER_FLAGS_3(cmp_lt_ph, 0, void, tl, tl, env)
709DEF_HELPER_FLAGS_3(cmp_le_ph, 0, void, tl, tl, env)
710#if defined(TARGET_MIPS64)
711DEF_HELPER_FLAGS_3(cmpu_eq_ob, 0, void, tl, tl, env)
712DEF_HELPER_FLAGS_3(cmpu_lt_ob, 0, void, tl, tl, env)
713DEF_HELPER_FLAGS_3(cmpu_le_ob, 0, void, tl, tl, env)
714DEF_HELPER_FLAGS_3(cmpgdu_eq_ob, 0, tl, tl, tl, env)
715DEF_HELPER_FLAGS_3(cmpgdu_lt_ob, 0, tl, tl, tl, env)
716DEF_HELPER_FLAGS_3(cmpgdu_le_ob, 0, tl, tl, tl, env)
717DEF_HELPER_FLAGS_2(cmpgu_eq_ob, TCG_CALL_NO_RWG_SE, tl, tl, tl)
718DEF_HELPER_FLAGS_2(cmpgu_lt_ob, TCG_CALL_NO_RWG_SE, tl, tl, tl)
719DEF_HELPER_FLAGS_2(cmpgu_le_ob, TCG_CALL_NO_RWG_SE, tl, tl, tl)
720DEF_HELPER_FLAGS_3(cmp_eq_qh, 0, void, tl, tl, env)
721DEF_HELPER_FLAGS_3(cmp_lt_qh, 0, void, tl, tl, env)
722DEF_HELPER_FLAGS_3(cmp_le_qh, 0, void, tl, tl, env)
723DEF_HELPER_FLAGS_3(cmp_eq_pw, 0, void, tl, tl, env)
724DEF_HELPER_FLAGS_3(cmp_lt_pw, 0, void, tl, tl, env)
725DEF_HELPER_FLAGS_3(cmp_le_pw, 0, void, tl, tl, env)
726#endif
727DEF_HELPER_FLAGS_3(pick_qb, 0, tl, tl, tl, env)
728DEF_HELPER_FLAGS_3(pick_ph, 0, tl, tl, tl, env)
729#if defined(TARGET_MIPS64)
730DEF_HELPER_FLAGS_3(pick_ob, 0, tl, tl, tl, env)
731DEF_HELPER_FLAGS_3(pick_qh, 0, tl, tl, tl, env)
732DEF_HELPER_FLAGS_3(pick_pw, 0, tl, tl, tl, env)
733#endif
Jia Liu26690562012-10-24 22:17:10 +0800734DEF_HELPER_FLAGS_2(packrl_ph, TCG_CALL_NO_RWG_SE, tl, tl, tl)
735#if defined(TARGET_MIPS64)
736DEF_HELPER_FLAGS_2(packrl_pw, TCG_CALL_NO_RWG_SE, tl, tl, tl)
737#endif
738
Jia Liub53371e2012-10-24 22:17:11 +0800739/* DSP Accumulator and DSPControl Access Sub-class insns */
740DEF_HELPER_FLAGS_3(extr_w, 0, tl, tl, tl, env)
741DEF_HELPER_FLAGS_3(extr_r_w, 0, tl, tl, tl, env)
742DEF_HELPER_FLAGS_3(extr_rs_w, 0, tl, tl, tl, env)
743#if defined(TARGET_MIPS64)
744DEF_HELPER_FLAGS_3(dextr_w, 0, tl, tl, tl, env)
745DEF_HELPER_FLAGS_3(dextr_r_w, 0, tl, tl, tl, env)
746DEF_HELPER_FLAGS_3(dextr_rs_w, 0, tl, tl, tl, env)
747DEF_HELPER_FLAGS_3(dextr_l, 0, tl, tl, tl, env)
748DEF_HELPER_FLAGS_3(dextr_r_l, 0, tl, tl, tl, env)
749DEF_HELPER_FLAGS_3(dextr_rs_l, 0, tl, tl, tl, env)
750#endif
751DEF_HELPER_FLAGS_3(extr_s_h, 0, tl, tl, tl, env)
752#if defined(TARGET_MIPS64)
753DEF_HELPER_FLAGS_3(dextr_s_h, 0, tl, tl, tl, env)
754#endif
755DEF_HELPER_FLAGS_3(extp, 0, tl, tl, tl, env)
756DEF_HELPER_FLAGS_3(extpdp, 0, tl, tl, tl, env)
757#if defined(TARGET_MIPS64)
758DEF_HELPER_FLAGS_3(dextp, 0, tl, tl, tl, env)
759DEF_HELPER_FLAGS_3(dextpdp, 0, tl, tl, tl, env)
760#endif
761DEF_HELPER_FLAGS_3(shilo, 0, void, tl, tl, env)
762#if defined(TARGET_MIPS64)
763DEF_HELPER_FLAGS_3(dshilo, 0, void, tl, tl, env)
764#endif
765DEF_HELPER_FLAGS_3(mthlip, 0, void, tl, tl, env)
766#if defined(TARGET_MIPS64)
767DEF_HELPER_FLAGS_3(dmthlip, 0, void, tl, tl, env)
768#endif
769DEF_HELPER_FLAGS_3(wrdsp, 0, void, tl, tl, env)
770DEF_HELPER_FLAGS_2(rddsp, 0, tl, tl, env)
Yongbok Kim4c789542014-11-01 05:28:43 +0000771
772/* MIPS SIMD Architecture */
773DEF_HELPER_4(msa_andi_b, void, env, i32, i32, i32)
774DEF_HELPER_4(msa_ori_b, void, env, i32, i32, i32)
775DEF_HELPER_4(msa_nori_b, void, env, i32, i32, i32)
776DEF_HELPER_4(msa_xori_b, void, env, i32, i32, i32)
777DEF_HELPER_4(msa_bmnzi_b, void, env, i32, i32, i32)
778DEF_HELPER_4(msa_bmzi_b, void, env, i32, i32, i32)
779DEF_HELPER_4(msa_bseli_b, void, env, i32, i32, i32)
780DEF_HELPER_5(msa_shf_df, void, env, i32, i32, i32, i32)
Yongbok Kim80e71592014-11-01 05:28:44 +0000781
782DEF_HELPER_5(msa_addvi_df, void, env, i32, i32, i32, s32)
783DEF_HELPER_5(msa_subvi_df, void, env, i32, i32, i32, s32)
784DEF_HELPER_5(msa_maxi_s_df, void, env, i32, i32, i32, s32)
785DEF_HELPER_5(msa_maxi_u_df, void, env, i32, i32, i32, s32)
786DEF_HELPER_5(msa_mini_s_df, void, env, i32, i32, i32, s32)
787DEF_HELPER_5(msa_mini_u_df, void, env, i32, i32, i32, s32)
788DEF_HELPER_5(msa_ceqi_df, void, env, i32, i32, i32, s32)
789DEF_HELPER_5(msa_clti_s_df, void, env, i32, i32, i32, s32)
790DEF_HELPER_5(msa_clti_u_df, void, env, i32, i32, i32, s32)
791DEF_HELPER_5(msa_clei_s_df, void, env, i32, i32, i32, s32)
792DEF_HELPER_5(msa_clei_u_df, void, env, i32, i32, i32, s32)
793DEF_HELPER_4(msa_ldi_df, void, env, i32, i32, s32)
Yongbok Kimd4cf28d2014-11-01 05:28:45 +0000794
795DEF_HELPER_5(msa_slli_df, void, env, i32, i32, i32, i32)
796DEF_HELPER_5(msa_srai_df, void, env, i32, i32, i32, i32)
797DEF_HELPER_5(msa_srli_df, void, env, i32, i32, i32, i32)
798DEF_HELPER_5(msa_bclri_df, void, env, i32, i32, i32, i32)
799DEF_HELPER_5(msa_bseti_df, void, env, i32, i32, i32, i32)
800DEF_HELPER_5(msa_bnegi_df, void, env, i32, i32, i32, i32)
801DEF_HELPER_5(msa_binsli_df, void, env, i32, i32, i32, i32)
802DEF_HELPER_5(msa_binsri_df, void, env, i32, i32, i32, i32)
803DEF_HELPER_5(msa_sat_s_df, void, env, i32, i32, i32, i32)
804DEF_HELPER_5(msa_sat_u_df, void, env, i32, i32, i32, i32)
805DEF_HELPER_5(msa_srari_df, void, env, i32, i32, i32, i32)
806DEF_HELPER_5(msa_srlri_df, void, env, i32, i32, i32, i32)
Yongbok Kim28f99f02014-11-01 05:28:46 +0000807
808DEF_HELPER_5(msa_sll_df, void, env, i32, i32, i32, i32)
809DEF_HELPER_5(msa_sra_df, void, env, i32, i32, i32, i32)
810DEF_HELPER_5(msa_srl_df, void, env, i32, i32, i32, i32)
811DEF_HELPER_5(msa_bclr_df, void, env, i32, i32, i32, i32)
812DEF_HELPER_5(msa_bset_df, void, env, i32, i32, i32, i32)
813DEF_HELPER_5(msa_bneg_df, void, env, i32, i32, i32, i32)
814DEF_HELPER_5(msa_binsl_df, void, env, i32, i32, i32, i32)
815DEF_HELPER_5(msa_binsr_df, void, env, i32, i32, i32, i32)
816DEF_HELPER_5(msa_addv_df, void, env, i32, i32, i32, i32)
817DEF_HELPER_5(msa_subv_df, void, env, i32, i32, i32, i32)
818DEF_HELPER_5(msa_max_s_df, void, env, i32, i32, i32, i32)
819DEF_HELPER_5(msa_max_u_df, void, env, i32, i32, i32, i32)
820DEF_HELPER_5(msa_min_s_df, void, env, i32, i32, i32, i32)
821DEF_HELPER_5(msa_min_u_df, void, env, i32, i32, i32, i32)
822DEF_HELPER_5(msa_max_a_df, void, env, i32, i32, i32, i32)
823DEF_HELPER_5(msa_min_a_df, void, env, i32, i32, i32, i32)
824DEF_HELPER_5(msa_ceq_df, void, env, i32, i32, i32, i32)
825DEF_HELPER_5(msa_clt_s_df, void, env, i32, i32, i32, i32)
826DEF_HELPER_5(msa_clt_u_df, void, env, i32, i32, i32, i32)
827DEF_HELPER_5(msa_cle_s_df, void, env, i32, i32, i32, i32)
828DEF_HELPER_5(msa_cle_u_df, void, env, i32, i32, i32, i32)
829DEF_HELPER_5(msa_add_a_df, void, env, i32, i32, i32, i32)
830DEF_HELPER_5(msa_adds_a_df, void, env, i32, i32, i32, i32)
831DEF_HELPER_5(msa_adds_s_df, void, env, i32, i32, i32, i32)
832DEF_HELPER_5(msa_adds_u_df, void, env, i32, i32, i32, i32)
833DEF_HELPER_5(msa_ave_s_df, void, env, i32, i32, i32, i32)
834DEF_HELPER_5(msa_ave_u_df, void, env, i32, i32, i32, i32)
835DEF_HELPER_5(msa_aver_s_df, void, env, i32, i32, i32, i32)
836DEF_HELPER_5(msa_aver_u_df, void, env, i32, i32, i32, i32)
837DEF_HELPER_5(msa_subs_s_df, void, env, i32, i32, i32, i32)
838DEF_HELPER_5(msa_subs_u_df, void, env, i32, i32, i32, i32)
839DEF_HELPER_5(msa_subsus_u_df, void, env, i32, i32, i32, i32)
840DEF_HELPER_5(msa_subsuu_s_df, void, env, i32, i32, i32, i32)
841DEF_HELPER_5(msa_asub_s_df, void, env, i32, i32, i32, i32)
842DEF_HELPER_5(msa_asub_u_df, void, env, i32, i32, i32, i32)
843DEF_HELPER_5(msa_mulv_df, void, env, i32, i32, i32, i32)
844DEF_HELPER_5(msa_maddv_df, void, env, i32, i32, i32, i32)
845DEF_HELPER_5(msa_msubv_df, void, env, i32, i32, i32, i32)
846DEF_HELPER_5(msa_div_s_df, void, env, i32, i32, i32, i32)
847DEF_HELPER_5(msa_div_u_df, void, env, i32, i32, i32, i32)
848DEF_HELPER_5(msa_mod_s_df, void, env, i32, i32, i32, i32)
849DEF_HELPER_5(msa_mod_u_df, void, env, i32, i32, i32, i32)
850DEF_HELPER_5(msa_dotp_s_df, void, env, i32, i32, i32, i32)
851DEF_HELPER_5(msa_dotp_u_df, void, env, i32, i32, i32, i32)
852DEF_HELPER_5(msa_dpadd_s_df, void, env, i32, i32, i32, i32)
853DEF_HELPER_5(msa_dpadd_u_df, void, env, i32, i32, i32, i32)
854DEF_HELPER_5(msa_dpsub_s_df, void, env, i32, i32, i32, i32)
855DEF_HELPER_5(msa_dpsub_u_df, void, env, i32, i32, i32, i32)
856DEF_HELPER_5(msa_sld_df, void, env, i32, i32, i32, i32)
857DEF_HELPER_5(msa_splat_df, void, env, i32, i32, i32, i32)
858DEF_HELPER_5(msa_pckev_df, void, env, i32, i32, i32, i32)
859DEF_HELPER_5(msa_pckod_df, void, env, i32, i32, i32, i32)
860DEF_HELPER_5(msa_ilvl_df, void, env, i32, i32, i32, i32)
861DEF_HELPER_5(msa_ilvr_df, void, env, i32, i32, i32, i32)
862DEF_HELPER_5(msa_ilvev_df, void, env, i32, i32, i32, i32)
863DEF_HELPER_5(msa_ilvod_df, void, env, i32, i32, i32, i32)
864DEF_HELPER_5(msa_vshf_df, void, env, i32, i32, i32, i32)
865DEF_HELPER_5(msa_srar_df, void, env, i32, i32, i32, i32)
866DEF_HELPER_5(msa_srlr_df, void, env, i32, i32, i32, i32)
867DEF_HELPER_5(msa_hadd_s_df, void, env, i32, i32, i32, i32)
868DEF_HELPER_5(msa_hadd_u_df, void, env, i32, i32, i32, i32)
869DEF_HELPER_5(msa_hsub_s_df, void, env, i32, i32, i32, i32)
870DEF_HELPER_5(msa_hsub_u_df, void, env, i32, i32, i32, i32)
Yongbok Kim1e608ec2014-11-01 05:28:47 +0000871
872DEF_HELPER_5(msa_sldi_df, void, env, i32, i32, i32, i32)
873DEF_HELPER_5(msa_splati_df, void, env, i32, i32, i32, i32)
874DEF_HELPER_5(msa_copy_s_df, void, env, i32, i32, i32, i32)
875DEF_HELPER_5(msa_copy_u_df, void, env, i32, i32, i32, i32)
876DEF_HELPER_5(msa_insert_df, void, env, i32, i32, i32, i32)
877DEF_HELPER_5(msa_insve_df, void, env, i32, i32, i32, i32)
878DEF_HELPER_3(msa_ctcmsa, void, env, tl, i32)
879DEF_HELPER_2(msa_cfcmsa, tl, env, i32)
880DEF_HELPER_3(msa_move_v, void, env, i32, i32)
Yongbok Kim7d05b9c2014-11-01 05:28:48 +0000881
882DEF_HELPER_5(msa_fcaf_df, void, env, i32, i32, i32, i32)
883DEF_HELPER_5(msa_fcun_df, void, env, i32, i32, i32, i32)
884DEF_HELPER_5(msa_fceq_df, void, env, i32, i32, i32, i32)
885DEF_HELPER_5(msa_fcueq_df, void, env, i32, i32, i32, i32)
886DEF_HELPER_5(msa_fclt_df, void, env, i32, i32, i32, i32)
887DEF_HELPER_5(msa_fcult_df, void, env, i32, i32, i32, i32)
888DEF_HELPER_5(msa_fcle_df, void, env, i32, i32, i32, i32)
889DEF_HELPER_5(msa_fcule_df, void, env, i32, i32, i32, i32)
890DEF_HELPER_5(msa_fsaf_df, void, env, i32, i32, i32, i32)
891DEF_HELPER_5(msa_fsun_df, void, env, i32, i32, i32, i32)
892DEF_HELPER_5(msa_fseq_df, void, env, i32, i32, i32, i32)
893DEF_HELPER_5(msa_fsueq_df, void, env, i32, i32, i32, i32)
894DEF_HELPER_5(msa_fslt_df, void, env, i32, i32, i32, i32)
895DEF_HELPER_5(msa_fsult_df, void, env, i32, i32, i32, i32)
896DEF_HELPER_5(msa_fsle_df, void, env, i32, i32, i32, i32)
897DEF_HELPER_5(msa_fsule_df, void, env, i32, i32, i32, i32)
898DEF_HELPER_5(msa_fadd_df, void, env, i32, i32, i32, i32)
899DEF_HELPER_5(msa_fsub_df, void, env, i32, i32, i32, i32)
900DEF_HELPER_5(msa_fmul_df, void, env, i32, i32, i32, i32)
901DEF_HELPER_5(msa_fdiv_df, void, env, i32, i32, i32, i32)
902DEF_HELPER_5(msa_fmadd_df, void, env, i32, i32, i32, i32)
903DEF_HELPER_5(msa_fmsub_df, void, env, i32, i32, i32, i32)
904DEF_HELPER_5(msa_fexp2_df, void, env, i32, i32, i32, i32)
905DEF_HELPER_5(msa_fexdo_df, void, env, i32, i32, i32, i32)
906DEF_HELPER_5(msa_ftq_df, void, env, i32, i32, i32, i32)
907DEF_HELPER_5(msa_fmin_df, void, env, i32, i32, i32, i32)
908DEF_HELPER_5(msa_fmin_a_df, void, env, i32, i32, i32, i32)
909DEF_HELPER_5(msa_fmax_df, void, env, i32, i32, i32, i32)
910DEF_HELPER_5(msa_fmax_a_df, void, env, i32, i32, i32, i32)
911DEF_HELPER_5(msa_fcor_df, void, env, i32, i32, i32, i32)
912DEF_HELPER_5(msa_fcune_df, void, env, i32, i32, i32, i32)
913DEF_HELPER_5(msa_fcne_df, void, env, i32, i32, i32, i32)
914DEF_HELPER_5(msa_mul_q_df, void, env, i32, i32, i32, i32)
915DEF_HELPER_5(msa_madd_q_df, void, env, i32, i32, i32, i32)
916DEF_HELPER_5(msa_msub_q_df, void, env, i32, i32, i32, i32)
917DEF_HELPER_5(msa_fsor_df, void, env, i32, i32, i32, i32)
918DEF_HELPER_5(msa_fsune_df, void, env, i32, i32, i32, i32)
919DEF_HELPER_5(msa_fsne_df, void, env, i32, i32, i32, i32)
920DEF_HELPER_5(msa_mulr_q_df, void, env, i32, i32, i32, i32)
921DEF_HELPER_5(msa_maddr_q_df, void, env, i32, i32, i32, i32)
922DEF_HELPER_5(msa_msubr_q_df, void, env, i32, i32, i32, i32)
Yongbok Kimcbe50b92014-11-01 05:28:49 +0000923
924DEF_HELPER_4(msa_and_v, void, env, i32, i32, i32)
925DEF_HELPER_4(msa_or_v, void, env, i32, i32, i32)
926DEF_HELPER_4(msa_nor_v, void, env, i32, i32, i32)
927DEF_HELPER_4(msa_xor_v, void, env, i32, i32, i32)
928DEF_HELPER_4(msa_bmnz_v, void, env, i32, i32, i32)
929DEF_HELPER_4(msa_bmz_v, void, env, i32, i32, i32)
930DEF_HELPER_4(msa_bsel_v, void, env, i32, i32, i32)
931DEF_HELPER_4(msa_fill_df, void, env, i32, i32, i32)
932DEF_HELPER_4(msa_pcnt_df, void, env, i32, i32, i32)
933DEF_HELPER_4(msa_nloc_df, void, env, i32, i32, i32)
934DEF_HELPER_4(msa_nlzc_df, void, env, i32, i32, i32)
Yongbok Kim3bdeb682014-11-01 05:28:50 +0000935
936DEF_HELPER_4(msa_fclass_df, void, env, i32, i32, i32)
937DEF_HELPER_4(msa_ftrunc_s_df, void, env, i32, i32, i32)
938DEF_HELPER_4(msa_ftrunc_u_df, void, env, i32, i32, i32)
939DEF_HELPER_4(msa_fsqrt_df, void, env, i32, i32, i32)
940DEF_HELPER_4(msa_frsqrt_df, void, env, i32, i32, i32)
941DEF_HELPER_4(msa_frcp_df, void, env, i32, i32, i32)
942DEF_HELPER_4(msa_frint_df, void, env, i32, i32, i32)
943DEF_HELPER_4(msa_flog2_df, void, env, i32, i32, i32)
944DEF_HELPER_4(msa_fexupl_df, void, env, i32, i32, i32)
945DEF_HELPER_4(msa_fexupr_df, void, env, i32, i32, i32)
946DEF_HELPER_4(msa_ffql_df, void, env, i32, i32, i32)
947DEF_HELPER_4(msa_ffqr_df, void, env, i32, i32, i32)
948DEF_HELPER_4(msa_ftint_s_df, void, env, i32, i32, i32)
949DEF_HELPER_4(msa_ftint_u_df, void, env, i32, i32, i32)
950DEF_HELPER_4(msa_ffint_s_df, void, env, i32, i32, i32)
951DEF_HELPER_4(msa_ffint_u_df, void, env, i32, i32, i32)
Yongbok Kimf7685872014-11-01 05:28:51 +0000952
Yongbok Kimadc370a2015-06-01 12:13:24 +0100953#define MSALDST_PROTO(type) \
954DEF_HELPER_3(msa_ld_ ## type, void, env, i32, tl) \
955DEF_HELPER_3(msa_st_ ## type, void, env, i32, tl)
956MSALDST_PROTO(b)
957MSALDST_PROTO(h)
958MSALDST_PROTO(w)
959MSALDST_PROTO(d)
960#undef MSALDST_PROTO
Leon Alrae0d74a222016-03-25 13:49:36 +0000961
962DEF_HELPER_3(cache, void, env, tl, i32)