bellard | 5493600 | 2003-05-13 00:25:15 +0000 | [diff] [blame] | 1 | /* |
Paolo Bonzini | d9f24bf | 2020-10-06 09:05:29 +0200 | [diff] [blame] | 2 | * RAM allocation and memory access |
ths | 5fafdf2 | 2007-09-16 21:08:06 +0000 | [diff] [blame] | 3 | * |
bellard | 5493600 | 2003-05-13 00:25:15 +0000 | [diff] [blame] | 4 | * Copyright (c) 2003 Fabrice Bellard |
| 5 | * |
| 6 | * This library is free software; you can redistribute it and/or |
| 7 | * modify it under the terms of the GNU Lesser General Public |
| 8 | * License as published by the Free Software Foundation; either |
Chetan Pant | 61f3c91 | 2020-10-23 12:44:24 +0000 | [diff] [blame] | 9 | * version 2.1 of the License, or (at your option) any later version. |
bellard | 5493600 | 2003-05-13 00:25:15 +0000 | [diff] [blame] | 10 | * |
| 11 | * This library is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
| 14 | * Lesser General Public License for more details. |
| 15 | * |
| 16 | * You should have received a copy of the GNU Lesser General Public |
Blue Swirl | 8167ee8 | 2009-07-16 20:47:01 +0000 | [diff] [blame] | 17 | * License along with this library; if not, see <http://www.gnu.org/licenses/>. |
bellard | 5493600 | 2003-05-13 00:25:15 +0000 | [diff] [blame] | 18 | */ |
Markus Armbruster | 14a48c1 | 2019-05-23 16:35:05 +0200 | [diff] [blame] | 19 | |
Peter Maydell | 7b31bbc | 2016-01-26 18:16:56 +0000 | [diff] [blame] | 20 | #include "qemu/osdep.h" |
Marc-André Lureau | ec5f7ca | 2022-03-23 19:57:34 +0400 | [diff] [blame] | 21 | #include "exec/page-vary.h" |
Markus Armbruster | da34e65 | 2016-03-14 09:01:28 +0100 | [diff] [blame] | 22 | #include "qapi/error.h" |
bellard | 5493600 | 2003-05-13 00:25:15 +0000 | [diff] [blame] | 23 | |
Veronia Bahaa | f348b6d | 2016-03-20 19:16:19 +0200 | [diff] [blame] | 24 | #include "qemu/cutils.h" |
Richard Henderson | 084cfca | 2020-12-14 08:02:33 -0600 | [diff] [blame] | 25 | #include "qemu/cacheflush.h" |
Markus Armbruster | e2c1c34 | 2022-12-21 14:35:49 +0100 | [diff] [blame] | 26 | #include "qemu/hbitmap.h" |
Peter Maydell | b85ea5f | 2022-02-08 20:08:52 +0000 | [diff] [blame] | 27 | #include "qemu/madvise.h" |
Philippe Mathieu-Daudé | d5e2681 | 2024-05-07 14:12:46 +0200 | [diff] [blame] | 28 | #include "qemu/lockable.h" |
Claudio Fontana | 7827168 | 2021-02-04 17:39:23 +0100 | [diff] [blame] | 29 | |
| 30 | #ifdef CONFIG_TCG |
| 31 | #include "hw/core/tcg-cpu-ops.h" |
| 32 | #endif /* CONFIG_TCG */ |
| 33 | |
Paolo Bonzini | 63c9155 | 2016-03-15 13:18:37 +0100 | [diff] [blame] | 34 | #include "exec/exec-all.h" |
Philippe Mathieu-Daudé | 74781c0 | 2023-12-06 20:27:32 +0100 | [diff] [blame] | 35 | #include "exec/page-protection.h" |
Juan Quintela | 5118042 | 2017-04-24 20:50:19 +0200 | [diff] [blame] | 36 | #include "exec/target_page.h" |
Philippe Mathieu-Daudé | 68df8c8 | 2024-11-13 22:46:13 +0100 | [diff] [blame] | 37 | #include "exec/translation-block.h" |
Paolo Bonzini | 741da0d | 2014-06-27 08:40:04 +0200 | [diff] [blame] | 38 | #include "hw/qdev-core.h" |
Fam Zheng | c7e002c | 2017-07-14 10:15:08 +0800 | [diff] [blame] | 39 | #include "hw/qdev-properties.h" |
Marcel Apfelbaum | 47c8ca5 | 2015-02-04 17:43:54 +0200 | [diff] [blame] | 40 | #include "hw/boards.h" |
Philippe Mathieu-Daudé | 32cad1f | 2024-12-03 15:20:13 +0100 | [diff] [blame] | 41 | #include "system/xen.h" |
| 42 | #include "system/kvm.h" |
| 43 | #include "system/tcg.h" |
| 44 | #include "system/qtest.h" |
Paolo Bonzini | 1de7afc | 2012-12-17 18:20:00 +0100 | [diff] [blame] | 45 | #include "qemu/timer.h" |
| 46 | #include "qemu/config-file.h" |
Andreas Färber | 75a3403 | 2013-09-02 16:57:02 +0200 | [diff] [blame] | 47 | #include "qemu/error-report.h" |
Markus Armbruster | b6b71cb | 2019-04-17 21:17:56 +0200 | [diff] [blame] | 48 | #include "qemu/qemu-print.h" |
Philippe Mathieu-Daudé | 3ab6fdc | 2021-12-15 19:24:21 +0100 | [diff] [blame] | 49 | #include "qemu/log.h" |
Peter Maydell | 5df022c | 2022-02-26 18:07:23 +0000 | [diff] [blame] | 50 | #include "qemu/memalign.h" |
Paolo Bonzini | 741da0d | 2014-06-27 08:40:04 +0200 | [diff] [blame] | 51 | #include "exec/memory.h" |
Paolo Bonzini | df43d49 | 2016-03-16 10:24:54 +0100 | [diff] [blame] | 52 | #include "exec/ioport.h" |
Philippe Mathieu-Daudé | 32cad1f | 2024-12-03 15:20:13 +0100 | [diff] [blame] | 53 | #include "system/dma.h" |
| 54 | #include "system/hostmem.h" |
| 55 | #include "system/hw_accel.h" |
| 56 | #include "system/xen-mapcache.h" |
Alex Bennée | d44fe13 | 2024-07-05 09:40:10 +0100 | [diff] [blame] | 57 | #include "trace.h" |
Dr. David Alan Gilbert | d3a5038 | 2017-02-24 18:28:32 +0000 | [diff] [blame] | 58 | |
Dr. David Alan Gilbert | e2fa71f | 2017-02-24 18:28:33 +0000 | [diff] [blame] | 59 | #ifdef CONFIG_FALLOCATE_PUNCH_HOLE |
Dr. David Alan Gilbert | e2fa71f | 2017-02-24 18:28:33 +0000 | [diff] [blame] | 60 | #include <linux/falloc.h> |
| 61 | #endif |
| 62 | |
Mike Day | 0dc3f44 | 2013-09-05 14:41:35 -0400 | [diff] [blame] | 63 | #include "qemu/rcu_queue.h" |
Jan Kiszka | 4840f10 | 2015-06-18 18:47:22 +0200 | [diff] [blame] | 64 | #include "qemu/main-loop.h" |
Philippe Mathieu-Daudé | 32cad1f | 2024-12-03 15:20:13 +0100 | [diff] [blame] | 65 | #include "system/replay.h" |
Blue Swirl | 0cac1b6 | 2012-04-09 16:50:52 +0000 | [diff] [blame] | 66 | |
Paolo Bonzini | 022c62c | 2012-12-17 18:19:49 +0100 | [diff] [blame] | 67 | #include "exec/memory-internal.h" |
Juan Quintela | 220c3eb | 2013-10-14 17:13:59 +0200 | [diff] [blame] | 68 | #include "exec/ram_addr.h" |
Avi Kivity | 67d95c1 | 2011-12-15 15:25:22 +0200 | [diff] [blame] | 69 | |
Beata Michalska | 61c490e | 2019-11-21 00:08:41 +0000 | [diff] [blame] | 70 | #include "qemu/pmem.h" |
| 71 | |
Bharata B Rao | 9dfeca7 | 2016-05-12 09:18:12 +0530 | [diff] [blame] | 72 | #include "migration/vmstate.h" |
| 73 | |
Michael S. Tsirkin | b35ba30 | 2013-11-11 17:52:07 +0200 | [diff] [blame] | 74 | #include "qemu/range.h" |
Michael S. Tsirkin | 794e8f3 | 2015-09-24 14:41:17 +0300 | [diff] [blame] | 75 | #ifndef _WIN32 |
| 76 | #include "qemu/mmap-alloc.h" |
| 77 | #endif |
Michael S. Tsirkin | b35ba30 | 2013-11-11 17:52:07 +0200 | [diff] [blame] | 78 | |
Peter Xu | be9b23c | 2017-05-12 12:17:41 +0800 | [diff] [blame] | 79 | #include "monitor/monitor.h" |
| 80 | |
Jingqi Liu | ce317be | 2020-04-29 16:50:09 +0800 | [diff] [blame] | 81 | #ifdef CONFIG_LIBDAXCTL |
| 82 | #include <daxctl/libdaxctl.h> |
| 83 | #endif |
| 84 | |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 85 | //#define DEBUG_SUBPAGE |
ths | 1196be3 | 2007-03-17 15:17:58 +0000 | [diff] [blame] | 86 | |
Mike Day | 0dc3f44 | 2013-09-05 14:41:35 -0400 | [diff] [blame] | 87 | /* ram_list is read under rcu_read_lock()/rcu_read_unlock(). Writes |
| 88 | * are protected by the ramlist lock. |
| 89 | */ |
Mike Day | 0d53d9f | 2015-01-21 13:45:24 +0100 | [diff] [blame] | 90 | RAMList ram_list = { .blocks = QLIST_HEAD_INITIALIZER(ram_list.blocks) }; |
Avi Kivity | 62152b8 | 2011-07-26 14:26:14 +0300 | [diff] [blame] | 91 | |
| 92 | static MemoryRegion *system_memory; |
Avi Kivity | 309cb47 | 2011-08-08 16:09:03 +0300 | [diff] [blame] | 93 | static MemoryRegion *system_io; |
Avi Kivity | 62152b8 | 2011-07-26 14:26:14 +0300 | [diff] [blame] | 94 | |
Avi Kivity | f6790af | 2012-10-02 20:13:51 +0200 | [diff] [blame] | 95 | AddressSpace address_space_io; |
| 96 | AddressSpace address_space_memory; |
Avi Kivity | 2673a5d | 2012-10-02 18:49:28 +0200 | [diff] [blame] | 97 | |
Jan Kiszka | acc9d80 | 2013-05-26 21:55:37 +0200 | [diff] [blame] | 98 | static MemoryRegion io_mem_unassigned; |
Avi Kivity | 4346ae3 | 2012-02-10 17:00:01 +0200 | [diff] [blame] | 99 | |
Paolo Bonzini | 1db8abb | 2013-05-21 12:07:21 +0200 | [diff] [blame] | 100 | typedef struct PhysPageEntry PhysPageEntry; |
| 101 | |
| 102 | struct PhysPageEntry { |
Michael S. Tsirkin | 9736e55 | 2013-11-11 14:42:43 +0200 | [diff] [blame] | 103 | /* How many bits skip to next level (in units of L2_SIZE). 0 for a leaf. */ |
Michael S. Tsirkin | 8b79576 | 2013-11-11 14:51:56 +0200 | [diff] [blame] | 104 | uint32_t skip : 6; |
Michael S. Tsirkin | 9736e55 | 2013-11-11 14:42:43 +0200 | [diff] [blame] | 105 | /* index into phys_sections (!skip) or phys_map_nodes (skip) */ |
Michael S. Tsirkin | 8b79576 | 2013-11-11 14:51:56 +0200 | [diff] [blame] | 106 | uint32_t ptr : 26; |
Paolo Bonzini | 1db8abb | 2013-05-21 12:07:21 +0200 | [diff] [blame] | 107 | }; |
| 108 | |
Michael S. Tsirkin | 8b79576 | 2013-11-11 14:51:56 +0200 | [diff] [blame] | 109 | #define PHYS_MAP_NODE_NIL (((uint32_t)~0) >> 6) |
| 110 | |
Paolo Bonzini | 03f4995 | 2013-11-07 17:14:36 +0100 | [diff] [blame] | 111 | /* Size of the L2 (and L3, etc) page tables. */ |
Paolo Bonzini | 57271d6 | 2013-11-07 17:14:37 +0100 | [diff] [blame] | 112 | #define ADDR_SPACE_BITS 64 |
Paolo Bonzini | 03f4995 | 2013-11-07 17:14:36 +0100 | [diff] [blame] | 113 | |
Michael S. Tsirkin | 026736c | 2013-11-13 20:13:03 +0200 | [diff] [blame] | 114 | #define P_L2_BITS 9 |
Paolo Bonzini | 03f4995 | 2013-11-07 17:14:36 +0100 | [diff] [blame] | 115 | #define P_L2_SIZE (1 << P_L2_BITS) |
| 116 | |
| 117 | #define P_L2_LEVELS (((ADDR_SPACE_BITS - TARGET_PAGE_BITS - 1) / P_L2_BITS) + 1) |
| 118 | |
| 119 | typedef PhysPageEntry Node[P_L2_SIZE]; |
Paolo Bonzini | 0475d94 | 2013-05-29 12:28:21 +0200 | [diff] [blame] | 120 | |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 121 | typedef struct PhysPageMap { |
Paolo Bonzini | 79e2b9a | 2015-01-21 12:09:14 +0100 | [diff] [blame] | 122 | struct rcu_head rcu; |
| 123 | |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 124 | unsigned sections_nb; |
| 125 | unsigned sections_nb_alloc; |
| 126 | unsigned nodes_nb; |
| 127 | unsigned nodes_nb_alloc; |
| 128 | Node *nodes; |
| 129 | MemoryRegionSection *sections; |
| 130 | } PhysPageMap; |
| 131 | |
Paolo Bonzini | 1db8abb | 2013-05-21 12:07:21 +0200 | [diff] [blame] | 132 | struct AddressSpaceDispatch { |
Fam Zheng | 729633c | 2016-03-01 14:18:24 +0800 | [diff] [blame] | 133 | MemoryRegionSection *mru_section; |
Paolo Bonzini | 1db8abb | 2013-05-21 12:07:21 +0200 | [diff] [blame] | 134 | /* This is a multi-level map on the physical address space. |
| 135 | * The bottom level has pointers to MemoryRegionSections. |
| 136 | */ |
| 137 | PhysPageEntry phys_map; |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 138 | PhysPageMap map; |
Paolo Bonzini | 1db8abb | 2013-05-21 12:07:21 +0200 | [diff] [blame] | 139 | }; |
| 140 | |
Jan Kiszka | 90260c6 | 2013-05-26 21:46:51 +0200 | [diff] [blame] | 141 | #define SUBPAGE_IDX(addr) ((addr) & ~TARGET_PAGE_MASK) |
| 142 | typedef struct subpage_t { |
| 143 | MemoryRegion iomem; |
Alexey Kardashevskiy | 1662068 | 2017-09-21 18:50:58 +1000 | [diff] [blame] | 144 | FlatView *fv; |
Jan Kiszka | 90260c6 | 2013-05-26 21:46:51 +0200 | [diff] [blame] | 145 | hwaddr base; |
Vijaya Kumar K | 2615fab | 2016-10-24 16:26:49 +0100 | [diff] [blame] | 146 | uint16_t sub_section[]; |
Jan Kiszka | 90260c6 | 2013-05-26 21:46:51 +0200 | [diff] [blame] | 147 | } subpage_t; |
| 148 | |
Liu Ping Fan | b41aac4 | 2013-05-29 11:09:17 +0200 | [diff] [blame] | 149 | #define PHYS_SECTION_UNASSIGNED 0 |
Avi Kivity | 5312bd8 | 2012-02-12 18:32:55 +0200 | [diff] [blame] | 150 | |
pbrook | e2eef17 | 2008-06-08 01:09:01 +0000 | [diff] [blame] | 151 | static void io_mem_init(void); |
Avi Kivity | 62152b8 | 2011-07-26 14:26:14 +0300 | [diff] [blame] | 152 | static void memory_map_init(void); |
Paolo Bonzini | 9458a9a | 2018-02-06 18:37:39 +0100 | [diff] [blame] | 153 | static void tcg_log_global_after_sync(MemoryListener *listener); |
Edgar E. Iglesias | 09daed8 | 2013-12-17 13:06:51 +1000 | [diff] [blame] | 154 | static void tcg_commit(MemoryListener *listener); |
pbrook | e2eef17 | 2008-06-08 01:09:01 +0000 | [diff] [blame] | 155 | |
Peter Maydell | 32857f4 | 2015-10-01 15:29:50 +0100 | [diff] [blame] | 156 | /** |
| 157 | * CPUAddressSpace: all the information a CPU needs about an AddressSpace |
| 158 | * @cpu: the CPU whose AddressSpace this is |
| 159 | * @as: the AddressSpace itself |
| 160 | * @memory_dispatch: its dispatch pointer (cached, RCU protected) |
| 161 | * @tcg_as_listener: listener for tracking changes to the AddressSpace |
| 162 | */ |
Paolo Bonzini | 15d6253 | 2024-05-02 17:14:42 +0200 | [diff] [blame] | 163 | typedef struct CPUAddressSpace { |
Peter Maydell | 32857f4 | 2015-10-01 15:29:50 +0100 | [diff] [blame] | 164 | CPUState *cpu; |
| 165 | AddressSpace *as; |
| 166 | struct AddressSpaceDispatch *memory_dispatch; |
| 167 | MemoryListener tcg_as_listener; |
Paolo Bonzini | 15d6253 | 2024-05-02 17:14:42 +0200 | [diff] [blame] | 168 | } CPUAddressSpace; |
Peter Maydell | 32857f4 | 2015-10-01 15:29:50 +0100 | [diff] [blame] | 169 | |
Gerd Hoffmann | 8deaf12 | 2017-04-21 11:16:25 +0200 | [diff] [blame] | 170 | struct DirtyBitmapSnapshot { |
| 171 | ram_addr_t start; |
| 172 | ram_addr_t end; |
| 173 | unsigned long dirty[]; |
| 174 | }; |
| 175 | |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 176 | static void phys_map_node_reserve(PhysPageMap *map, unsigned nodes) |
Avi Kivity | f7bf546 | 2012-02-13 20:12:05 +0200 | [diff] [blame] | 177 | { |
Peter Lieven | 101420b | 2016-07-15 12:03:50 +0200 | [diff] [blame] | 178 | static unsigned alloc_hint = 16; |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 179 | if (map->nodes_nb + nodes > map->nodes_nb_alloc) { |
Wei Yang | c95cfd0 | 2019-03-21 16:25:52 +0800 | [diff] [blame] | 180 | map->nodes_nb_alloc = MAX(alloc_hint, map->nodes_nb + nodes); |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 181 | map->nodes = g_renew(Node, map->nodes, map->nodes_nb_alloc); |
Peter Lieven | 101420b | 2016-07-15 12:03:50 +0200 | [diff] [blame] | 182 | alloc_hint = map->nodes_nb_alloc; |
Avi Kivity | f7bf546 | 2012-02-13 20:12:05 +0200 | [diff] [blame] | 183 | } |
| 184 | } |
| 185 | |
Paolo Bonzini | db94604 | 2015-05-21 15:12:29 +0200 | [diff] [blame] | 186 | static uint32_t phys_map_node_alloc(PhysPageMap *map, bool leaf) |
Avi Kivity | d6f2ea2 | 2012-02-12 20:12:49 +0200 | [diff] [blame] | 187 | { |
| 188 | unsigned i; |
Michael S. Tsirkin | 8b79576 | 2013-11-11 14:51:56 +0200 | [diff] [blame] | 189 | uint32_t ret; |
Paolo Bonzini | db94604 | 2015-05-21 15:12:29 +0200 | [diff] [blame] | 190 | PhysPageEntry e; |
| 191 | PhysPageEntry *p; |
Avi Kivity | d6f2ea2 | 2012-02-12 20:12:49 +0200 | [diff] [blame] | 192 | |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 193 | ret = map->nodes_nb++; |
Paolo Bonzini | db94604 | 2015-05-21 15:12:29 +0200 | [diff] [blame] | 194 | p = map->nodes[ret]; |
Avi Kivity | d6f2ea2 | 2012-02-12 20:12:49 +0200 | [diff] [blame] | 195 | assert(ret != PHYS_MAP_NODE_NIL); |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 196 | assert(ret != map->nodes_nb_alloc); |
Paolo Bonzini | db94604 | 2015-05-21 15:12:29 +0200 | [diff] [blame] | 197 | |
| 198 | e.skip = leaf ? 0 : 1; |
| 199 | e.ptr = leaf ? PHYS_SECTION_UNASSIGNED : PHYS_MAP_NODE_NIL; |
Paolo Bonzini | 03f4995 | 2013-11-07 17:14:36 +0100 | [diff] [blame] | 200 | for (i = 0; i < P_L2_SIZE; ++i) { |
Paolo Bonzini | db94604 | 2015-05-21 15:12:29 +0200 | [diff] [blame] | 201 | memcpy(&p[i], &e, sizeof(e)); |
Avi Kivity | d6f2ea2 | 2012-02-12 20:12:49 +0200 | [diff] [blame] | 202 | } |
Avi Kivity | f7bf546 | 2012-02-13 20:12:05 +0200 | [diff] [blame] | 203 | return ret; |
Avi Kivity | d6f2ea2 | 2012-02-12 20:12:49 +0200 | [diff] [blame] | 204 | } |
| 205 | |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 206 | static void phys_page_set_level(PhysPageMap *map, PhysPageEntry *lp, |
Wei Yang | 56b1507 | 2019-03-21 16:25:50 +0800 | [diff] [blame] | 207 | hwaddr *index, uint64_t *nb, uint16_t leaf, |
Avi Kivity | 2999097 | 2012-02-13 20:21:20 +0200 | [diff] [blame] | 208 | int level) |
Avi Kivity | f7bf546 | 2012-02-13 20:12:05 +0200 | [diff] [blame] | 209 | { |
| 210 | PhysPageEntry *p; |
Paolo Bonzini | 03f4995 | 2013-11-07 17:14:36 +0100 | [diff] [blame] | 211 | hwaddr step = (hwaddr)1 << (level * P_L2_BITS); |
Avi Kivity | f7bf546 | 2012-02-13 20:12:05 +0200 | [diff] [blame] | 212 | |
Michael S. Tsirkin | 9736e55 | 2013-11-11 14:42:43 +0200 | [diff] [blame] | 213 | if (lp->skip && lp->ptr == PHYS_MAP_NODE_NIL) { |
Paolo Bonzini | db94604 | 2015-05-21 15:12:29 +0200 | [diff] [blame] | 214 | lp->ptr = phys_map_node_alloc(map, level == 0); |
Avi Kivity | f7bf546 | 2012-02-13 20:12:05 +0200 | [diff] [blame] | 215 | } |
Paolo Bonzini | db94604 | 2015-05-21 15:12:29 +0200 | [diff] [blame] | 216 | p = map->nodes[lp->ptr]; |
Paolo Bonzini | 03f4995 | 2013-11-07 17:14:36 +0100 | [diff] [blame] | 217 | lp = &p[(*index >> (level * P_L2_BITS)) & (P_L2_SIZE - 1)]; |
Avi Kivity | f7bf546 | 2012-02-13 20:12:05 +0200 | [diff] [blame] | 218 | |
Paolo Bonzini | 03f4995 | 2013-11-07 17:14:36 +0100 | [diff] [blame] | 219 | while (*nb && lp < &p[P_L2_SIZE]) { |
Avi Kivity | 07f07b3 | 2012-02-13 20:45:32 +0200 | [diff] [blame] | 220 | if ((*index & (step - 1)) == 0 && *nb >= step) { |
Michael S. Tsirkin | 9736e55 | 2013-11-11 14:42:43 +0200 | [diff] [blame] | 221 | lp->skip = 0; |
Avi Kivity | c19e880 | 2012-02-13 20:25:31 +0200 | [diff] [blame] | 222 | lp->ptr = leaf; |
Avi Kivity | 07f07b3 | 2012-02-13 20:45:32 +0200 | [diff] [blame] | 223 | *index += step; |
| 224 | *nb -= step; |
Avi Kivity | 2999097 | 2012-02-13 20:21:20 +0200 | [diff] [blame] | 225 | } else { |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 226 | phys_page_set_level(map, lp, index, nb, leaf, level - 1); |
Avi Kivity | 2999097 | 2012-02-13 20:21:20 +0200 | [diff] [blame] | 227 | } |
| 228 | ++lp; |
Avi Kivity | f7bf546 | 2012-02-13 20:12:05 +0200 | [diff] [blame] | 229 | } |
| 230 | } |
| 231 | |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 232 | static void phys_page_set(AddressSpaceDispatch *d, |
Wei Yang | 56b1507 | 2019-03-21 16:25:50 +0800 | [diff] [blame] | 233 | hwaddr index, uint64_t nb, |
Avi Kivity | 2999097 | 2012-02-13 20:21:20 +0200 | [diff] [blame] | 234 | uint16_t leaf) |
bellard | 92e873b | 2004-05-21 14:52:29 +0000 | [diff] [blame] | 235 | { |
Avi Kivity | 2999097 | 2012-02-13 20:21:20 +0200 | [diff] [blame] | 236 | /* Wildly overreserve - it doesn't matter much. */ |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 237 | phys_map_node_reserve(&d->map, 3 * P_L2_LEVELS); |
bellard | 92e873b | 2004-05-21 14:52:29 +0000 | [diff] [blame] | 238 | |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 239 | phys_page_set_level(&d->map, &d->phys_map, &index, &nb, leaf, P_L2_LEVELS - 1); |
bellard | 92e873b | 2004-05-21 14:52:29 +0000 | [diff] [blame] | 240 | } |
| 241 | |
Michael S. Tsirkin | b35ba30 | 2013-11-11 17:52:07 +0200 | [diff] [blame] | 242 | /* Compact a non leaf page entry. Simply detect that the entry has a single child, |
| 243 | * and update our entry so we can skip it and go directly to the destination. |
| 244 | */ |
Marc-André Lureau | efee678 | 2016-09-28 16:37:20 +0400 | [diff] [blame] | 245 | static void phys_page_compact(PhysPageEntry *lp, Node *nodes) |
Michael S. Tsirkin | b35ba30 | 2013-11-11 17:52:07 +0200 | [diff] [blame] | 246 | { |
| 247 | unsigned valid_ptr = P_L2_SIZE; |
| 248 | int valid = 0; |
| 249 | PhysPageEntry *p; |
| 250 | int i; |
| 251 | |
| 252 | if (lp->ptr == PHYS_MAP_NODE_NIL) { |
| 253 | return; |
| 254 | } |
| 255 | |
| 256 | p = nodes[lp->ptr]; |
| 257 | for (i = 0; i < P_L2_SIZE; i++) { |
| 258 | if (p[i].ptr == PHYS_MAP_NODE_NIL) { |
| 259 | continue; |
| 260 | } |
| 261 | |
| 262 | valid_ptr = i; |
| 263 | valid++; |
| 264 | if (p[i].skip) { |
Marc-André Lureau | efee678 | 2016-09-28 16:37:20 +0400 | [diff] [blame] | 265 | phys_page_compact(&p[i], nodes); |
Michael S. Tsirkin | b35ba30 | 2013-11-11 17:52:07 +0200 | [diff] [blame] | 266 | } |
| 267 | } |
| 268 | |
| 269 | /* We can only compress if there's only one child. */ |
| 270 | if (valid != 1) { |
| 271 | return; |
| 272 | } |
| 273 | |
| 274 | assert(valid_ptr < P_L2_SIZE); |
| 275 | |
| 276 | /* Don't compress if it won't fit in the # of bits we have. */ |
Wei Yang | 526ca23 | 2019-03-21 16:25:55 +0800 | [diff] [blame] | 277 | if (P_L2_LEVELS >= (1 << 6) && |
| 278 | lp->skip + p[valid_ptr].skip >= (1 << 6)) { |
Michael S. Tsirkin | b35ba30 | 2013-11-11 17:52:07 +0200 | [diff] [blame] | 279 | return; |
| 280 | } |
| 281 | |
| 282 | lp->ptr = p[valid_ptr].ptr; |
| 283 | if (!p[valid_ptr].skip) { |
| 284 | /* If our only child is a leaf, make this a leaf. */ |
| 285 | /* By design, we should have made this node a leaf to begin with so we |
| 286 | * should never reach here. |
| 287 | * But since it's so simple to handle this, let's do it just in case we |
| 288 | * change this rule. |
| 289 | */ |
| 290 | lp->skip = 0; |
| 291 | } else { |
| 292 | lp->skip += p[valid_ptr].skip; |
| 293 | } |
| 294 | } |
| 295 | |
Alexey Kardashevskiy | 8629d3f | 2017-09-21 18:51:00 +1000 | [diff] [blame] | 296 | void address_space_dispatch_compact(AddressSpaceDispatch *d) |
Michael S. Tsirkin | b35ba30 | 2013-11-11 17:52:07 +0200 | [diff] [blame] | 297 | { |
Michael S. Tsirkin | b35ba30 | 2013-11-11 17:52:07 +0200 | [diff] [blame] | 298 | if (d->phys_map.skip) { |
Marc-André Lureau | efee678 | 2016-09-28 16:37:20 +0400 | [diff] [blame] | 299 | phys_page_compact(&d->phys_map, d->map.nodes); |
Michael S. Tsirkin | b35ba30 | 2013-11-11 17:52:07 +0200 | [diff] [blame] | 300 | } |
| 301 | } |
| 302 | |
Fam Zheng | 29cb533 | 2016-03-01 14:18:23 +0800 | [diff] [blame] | 303 | static inline bool section_covers_addr(const MemoryRegionSection *section, |
| 304 | hwaddr addr) |
| 305 | { |
| 306 | /* Memory topology clips a memory region to [0, 2^64); size.hi > 0 means |
| 307 | * the section must cover the entire address space. |
| 308 | */ |
Richard Henderson | 258dfaa | 2016-06-29 15:48:03 -0700 | [diff] [blame] | 309 | return int128_gethi(section->size) || |
Fam Zheng | 29cb533 | 2016-03-01 14:18:23 +0800 | [diff] [blame] | 310 | range_covers_byte(section->offset_within_address_space, |
Richard Henderson | 258dfaa | 2016-06-29 15:48:03 -0700 | [diff] [blame] | 311 | int128_getlo(section->size), addr); |
Fam Zheng | 29cb533 | 2016-03-01 14:18:23 +0800 | [diff] [blame] | 312 | } |
| 313 | |
Peter Xu | 003a0cf | 2017-05-15 16:50:57 +0800 | [diff] [blame] | 314 | static MemoryRegionSection *phys_page_find(AddressSpaceDispatch *d, hwaddr addr) |
bellard | 92e873b | 2004-05-21 14:52:29 +0000 | [diff] [blame] | 315 | { |
Peter Xu | 003a0cf | 2017-05-15 16:50:57 +0800 | [diff] [blame] | 316 | PhysPageEntry lp = d->phys_map, *p; |
| 317 | Node *nodes = d->map.nodes; |
| 318 | MemoryRegionSection *sections = d->map.sections; |
Michael S. Tsirkin | 97115a8 | 2013-11-13 20:08:19 +0200 | [diff] [blame] | 319 | hwaddr index = addr >> TARGET_PAGE_BITS; |
Avi Kivity | 31ab2b4 | 2012-02-13 16:44:19 +0200 | [diff] [blame] | 320 | int i; |
Avi Kivity | f1f6e3b | 2011-11-20 17:52:22 +0200 | [diff] [blame] | 321 | |
Michael S. Tsirkin | 9736e55 | 2013-11-11 14:42:43 +0200 | [diff] [blame] | 322 | for (i = P_L2_LEVELS; lp.skip && (i -= lp.skip) >= 0;) { |
Avi Kivity | c19e880 | 2012-02-13 20:25:31 +0200 | [diff] [blame] | 323 | if (lp.ptr == PHYS_MAP_NODE_NIL) { |
Paolo Bonzini | 9affd6f | 2013-05-29 12:09:47 +0200 | [diff] [blame] | 324 | return §ions[PHYS_SECTION_UNASSIGNED]; |
Avi Kivity | 31ab2b4 | 2012-02-13 16:44:19 +0200 | [diff] [blame] | 325 | } |
Paolo Bonzini | 9affd6f | 2013-05-29 12:09:47 +0200 | [diff] [blame] | 326 | p = nodes[lp.ptr]; |
Paolo Bonzini | 03f4995 | 2013-11-07 17:14:36 +0100 | [diff] [blame] | 327 | lp = p[(index >> (i * P_L2_BITS)) & (P_L2_SIZE - 1)]; |
Avi Kivity | f1f6e3b | 2011-11-20 17:52:22 +0200 | [diff] [blame] | 328 | } |
Michael S. Tsirkin | b35ba30 | 2013-11-11 17:52:07 +0200 | [diff] [blame] | 329 | |
Fam Zheng | 29cb533 | 2016-03-01 14:18:23 +0800 | [diff] [blame] | 330 | if (section_covers_addr(§ions[lp.ptr], addr)) { |
Michael S. Tsirkin | b35ba30 | 2013-11-11 17:52:07 +0200 | [diff] [blame] | 331 | return §ions[lp.ptr]; |
| 332 | } else { |
| 333 | return §ions[PHYS_SECTION_UNASSIGNED]; |
| 334 | } |
Avi Kivity | f3705d5 | 2012-03-08 16:16:34 +0200 | [diff] [blame] | 335 | } |
| 336 | |
Paolo Bonzini | 79e2b9a | 2015-01-21 12:09:14 +0100 | [diff] [blame] | 337 | /* Called from RCU critical section */ |
Paolo Bonzini | c7086b4 | 2013-06-02 15:27:39 +0200 | [diff] [blame] | 338 | static MemoryRegionSection *address_space_lookup_region(AddressSpaceDispatch *d, |
Jan Kiszka | 90260c6 | 2013-05-26 21:46:51 +0200 | [diff] [blame] | 339 | hwaddr addr, |
| 340 | bool resolve_subpage) |
Jan Kiszka | 9f02960 | 2013-05-06 16:48:02 +0200 | [diff] [blame] | 341 | { |
Stefan Hajnoczi | d73415a | 2020-09-23 11:56:46 +0100 | [diff] [blame] | 342 | MemoryRegionSection *section = qatomic_read(&d->mru_section); |
Jan Kiszka | 90260c6 | 2013-05-26 21:46:51 +0200 | [diff] [blame] | 343 | subpage_t *subpage; |
| 344 | |
Paolo Bonzini | 07c114b | 2017-11-15 15:11:03 +0100 | [diff] [blame] | 345 | if (!section || section == &d->map.sections[PHYS_SECTION_UNASSIGNED] || |
| 346 | !section_covers_addr(section, addr)) { |
Peter Xu | 003a0cf | 2017-05-15 16:50:57 +0800 | [diff] [blame] | 347 | section = phys_page_find(d, addr); |
Stefan Hajnoczi | d73415a | 2020-09-23 11:56:46 +0100 | [diff] [blame] | 348 | qatomic_set(&d->mru_section, section); |
Fam Zheng | 729633c | 2016-03-01 14:18:24 +0800 | [diff] [blame] | 349 | } |
Jan Kiszka | 90260c6 | 2013-05-26 21:46:51 +0200 | [diff] [blame] | 350 | if (resolve_subpage && section->mr->subpage) { |
| 351 | subpage = container_of(section->mr, subpage_t, iomem); |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 352 | section = &d->map.sections[subpage->sub_section[SUBPAGE_IDX(addr)]]; |
Jan Kiszka | 90260c6 | 2013-05-26 21:46:51 +0200 | [diff] [blame] | 353 | } |
| 354 | return section; |
Jan Kiszka | 9f02960 | 2013-05-06 16:48:02 +0200 | [diff] [blame] | 355 | } |
| 356 | |
Paolo Bonzini | 79e2b9a | 2015-01-21 12:09:14 +0100 | [diff] [blame] | 357 | /* Called from RCU critical section */ |
Jan Kiszka | 90260c6 | 2013-05-26 21:46:51 +0200 | [diff] [blame] | 358 | static MemoryRegionSection * |
Paolo Bonzini | c7086b4 | 2013-06-02 15:27:39 +0200 | [diff] [blame] | 359 | address_space_translate_internal(AddressSpaceDispatch *d, hwaddr addr, hwaddr *xlat, |
Jan Kiszka | 90260c6 | 2013-05-26 21:46:51 +0200 | [diff] [blame] | 360 | hwaddr *plen, bool resolve_subpage) |
Paolo Bonzini | 149f54b | 2013-05-24 12:59:37 +0200 | [diff] [blame] | 361 | { |
| 362 | MemoryRegionSection *section; |
Paolo Bonzini | 965eb2f | 2015-06-17 10:40:27 +0200 | [diff] [blame] | 363 | MemoryRegion *mr; |
Paolo Bonzini | a87f395 | 2014-02-07 15:47:46 +0100 | [diff] [blame] | 364 | Int128 diff; |
Paolo Bonzini | 149f54b | 2013-05-24 12:59:37 +0200 | [diff] [blame] | 365 | |
Paolo Bonzini | c7086b4 | 2013-06-02 15:27:39 +0200 | [diff] [blame] | 366 | section = address_space_lookup_region(d, addr, resolve_subpage); |
Paolo Bonzini | 149f54b | 2013-05-24 12:59:37 +0200 | [diff] [blame] | 367 | /* Compute offset within MemoryRegionSection */ |
| 368 | addr -= section->offset_within_address_space; |
| 369 | |
| 370 | /* Compute offset within MemoryRegion */ |
| 371 | *xlat = addr + section->offset_within_region; |
| 372 | |
Paolo Bonzini | 965eb2f | 2015-06-17 10:40:27 +0200 | [diff] [blame] | 373 | mr = section->mr; |
Paolo Bonzini | b242e0e | 2015-07-04 00:24:51 +0200 | [diff] [blame] | 374 | |
| 375 | /* MMIO registers can be expected to perform full-width accesses based only |
| 376 | * on their address, without considering adjacent registers that could |
| 377 | * decode to completely different MemoryRegions. When such registers |
| 378 | * exist (e.g. I/O ports 0xcf8 and 0xcf9 on most PC chipsets), MMIO |
| 379 | * regions overlap wildly. For this reason we cannot clamp the accesses |
| 380 | * here. |
| 381 | * |
| 382 | * If the length is small (as is the case for address_space_ldl/stl), |
| 383 | * everything works fine. If the incoming length is large, however, |
| 384 | * the caller really has to do the clamping through memory_access_size. |
| 385 | */ |
Paolo Bonzini | 965eb2f | 2015-06-17 10:40:27 +0200 | [diff] [blame] | 386 | if (memory_region_is_ram(mr)) { |
Paolo Bonzini | e4a511f | 2015-06-17 10:36:54 +0200 | [diff] [blame] | 387 | diff = int128_sub(section->size, int128_make64(addr)); |
Paolo Bonzini | 965eb2f | 2015-06-17 10:40:27 +0200 | [diff] [blame] | 388 | *plen = int128_get64(int128_min(diff, int128_make64(*plen))); |
| 389 | } |
Paolo Bonzini | 149f54b | 2013-05-24 12:59:37 +0200 | [diff] [blame] | 390 | return section; |
| 391 | } |
Jan Kiszka | 90260c6 | 2013-05-26 21:46:51 +0200 | [diff] [blame] | 392 | |
Peter Xu | d5e5faf | 2017-10-10 11:42:45 +0200 | [diff] [blame] | 393 | /** |
Paolo Bonzini | a411c84 | 2018-03-03 17:24:04 +0100 | [diff] [blame] | 394 | * address_space_translate_iommu - translate an address through an IOMMU |
| 395 | * memory region and then through the target address space. |
| 396 | * |
| 397 | * @iommu_mr: the IOMMU memory region that we start the translation from |
| 398 | * @addr: the address to be translated through the MMU |
| 399 | * @xlat: the translated address offset within the destination memory region. |
| 400 | * It cannot be %NULL. |
| 401 | * @plen_out: valid read/write length of the translated address. It |
| 402 | * cannot be %NULL. |
| 403 | * @page_mask_out: page mask for the translated address. This |
| 404 | * should only be meaningful for IOMMU translated |
| 405 | * addresses, since there may be huge pages that this bit |
| 406 | * would tell. It can be %NULL if we don't care about it. |
| 407 | * @is_write: whether the translation operation is for write |
| 408 | * @is_mmio: whether this can be MMIO, set true if it can |
| 409 | * @target_as: the address space targeted by the IOMMU |
Peter Maydell | 2f7b009 | 2018-05-31 14:50:53 +0100 | [diff] [blame] | 410 | * @attrs: transaction attributes |
Paolo Bonzini | a411c84 | 2018-03-03 17:24:04 +0100 | [diff] [blame] | 411 | * |
| 412 | * This function is called from RCU critical section. It is the common |
| 413 | * part of flatview_do_translate and address_space_translate_cached. |
| 414 | */ |
| 415 | static MemoryRegionSection address_space_translate_iommu(IOMMUMemoryRegion *iommu_mr, |
| 416 | hwaddr *xlat, |
| 417 | hwaddr *plen_out, |
| 418 | hwaddr *page_mask_out, |
| 419 | bool is_write, |
| 420 | bool is_mmio, |
Peter Maydell | 2f7b009 | 2018-05-31 14:50:53 +0100 | [diff] [blame] | 421 | AddressSpace **target_as, |
| 422 | MemTxAttrs attrs) |
Paolo Bonzini | a411c84 | 2018-03-03 17:24:04 +0100 | [diff] [blame] | 423 | { |
| 424 | MemoryRegionSection *section; |
| 425 | hwaddr page_mask = (hwaddr)-1; |
| 426 | |
| 427 | do { |
| 428 | hwaddr addr = *xlat; |
| 429 | IOMMUMemoryRegionClass *imrc = memory_region_get_iommu_class_nocheck(iommu_mr); |
Peter Maydell | 2c91bcf | 2018-06-15 14:57:16 +0100 | [diff] [blame] | 430 | int iommu_idx = 0; |
| 431 | IOMMUTLBEntry iotlb; |
| 432 | |
| 433 | if (imrc->attrs_to_index) { |
| 434 | iommu_idx = imrc->attrs_to_index(iommu_mr, attrs); |
| 435 | } |
| 436 | |
| 437 | iotlb = imrc->translate(iommu_mr, addr, is_write ? |
| 438 | IOMMU_WO : IOMMU_RO, iommu_idx); |
Paolo Bonzini | a411c84 | 2018-03-03 17:24:04 +0100 | [diff] [blame] | 439 | |
| 440 | if (!(iotlb.perm & (1 << is_write))) { |
| 441 | goto unassigned; |
| 442 | } |
| 443 | |
| 444 | addr = ((iotlb.translated_addr & ~iotlb.addr_mask) |
| 445 | | (addr & iotlb.addr_mask)); |
| 446 | page_mask &= iotlb.addr_mask; |
| 447 | *plen_out = MIN(*plen_out, (addr | iotlb.addr_mask) - addr + 1); |
| 448 | *target_as = iotlb.target_as; |
| 449 | |
| 450 | section = address_space_translate_internal( |
| 451 | address_space_to_dispatch(iotlb.target_as), addr, xlat, |
| 452 | plen_out, is_mmio); |
| 453 | |
| 454 | iommu_mr = memory_region_get_iommu(section->mr); |
| 455 | } while (unlikely(iommu_mr)); |
| 456 | |
| 457 | if (page_mask_out) { |
| 458 | *page_mask_out = page_mask; |
| 459 | } |
| 460 | return *section; |
| 461 | |
| 462 | unassigned: |
| 463 | return (MemoryRegionSection) { .mr = &io_mem_unassigned }; |
| 464 | } |
| 465 | |
| 466 | /** |
Peter Xu | d5e5faf | 2017-10-10 11:42:45 +0200 | [diff] [blame] | 467 | * flatview_do_translate - translate an address in FlatView |
| 468 | * |
| 469 | * @fv: the flat view that we want to translate on |
| 470 | * @addr: the address to be translated in above address space |
| 471 | * @xlat: the translated address offset within memory region. It |
| 472 | * cannot be @NULL. |
| 473 | * @plen_out: valid read/write length of the translated address. It |
| 474 | * can be @NULL when we don't care about it. |
| 475 | * @page_mask_out: page mask for the translated address. This |
| 476 | * should only be meaningful for IOMMU translated |
| 477 | * addresses, since there may be huge pages that this bit |
| 478 | * would tell. It can be @NULL if we don't care about it. |
| 479 | * @is_write: whether the translation operation is for write |
| 480 | * @is_mmio: whether this can be MMIO, set true if it can |
Paolo Bonzini | ad2804d | 2018-04-17 11:39:35 +0200 | [diff] [blame] | 481 | * @target_as: the address space targeted by the IOMMU |
Peter Maydell | 49e14aa | 2018-05-31 14:50:53 +0100 | [diff] [blame] | 482 | * @attrs: memory transaction attributes |
Peter Xu | d5e5faf | 2017-10-10 11:42:45 +0200 | [diff] [blame] | 483 | * |
| 484 | * This function is called from RCU critical section |
| 485 | */ |
Alexey Kardashevskiy | 1662068 | 2017-09-21 18:50:58 +1000 | [diff] [blame] | 486 | static MemoryRegionSection flatview_do_translate(FlatView *fv, |
| 487 | hwaddr addr, |
| 488 | hwaddr *xlat, |
Peter Xu | d5e5faf | 2017-10-10 11:42:45 +0200 | [diff] [blame] | 489 | hwaddr *plen_out, |
| 490 | hwaddr *page_mask_out, |
Alexey Kardashevskiy | 1662068 | 2017-09-21 18:50:58 +1000 | [diff] [blame] | 491 | bool is_write, |
| 492 | bool is_mmio, |
Peter Maydell | 49e14aa | 2018-05-31 14:50:53 +0100 | [diff] [blame] | 493 | AddressSpace **target_as, |
| 494 | MemTxAttrs attrs) |
Jan Kiszka | 90260c6 | 2013-05-26 21:46:51 +0200 | [diff] [blame] | 495 | { |
Avi Kivity | 3095115 | 2012-10-30 13:47:46 +0200 | [diff] [blame] | 496 | MemoryRegionSection *section; |
Alexey Kardashevskiy | 3df9d74 | 2017-07-11 13:56:19 +1000 | [diff] [blame] | 497 | IOMMUMemoryRegion *iommu_mr; |
Peter Xu | d5e5faf | 2017-10-10 11:42:45 +0200 | [diff] [blame] | 498 | hwaddr plen = (hwaddr)(-1); |
| 499 | |
Paolo Bonzini | ad2804d | 2018-04-17 11:39:35 +0200 | [diff] [blame] | 500 | if (!plen_out) { |
| 501 | plen_out = &plen; |
Peter Xu | d5e5faf | 2017-10-10 11:42:45 +0200 | [diff] [blame] | 502 | } |
Avi Kivity | 3095115 | 2012-10-30 13:47:46 +0200 | [diff] [blame] | 503 | |
Paolo Bonzini | a411c84 | 2018-03-03 17:24:04 +0100 | [diff] [blame] | 504 | section = address_space_translate_internal( |
| 505 | flatview_to_dispatch(fv), addr, xlat, |
| 506 | plen_out, is_mmio); |
Avi Kivity | 3095115 | 2012-10-30 13:47:46 +0200 | [diff] [blame] | 507 | |
Paolo Bonzini | a411c84 | 2018-03-03 17:24:04 +0100 | [diff] [blame] | 508 | iommu_mr = memory_region_get_iommu(section->mr); |
| 509 | if (unlikely(iommu_mr)) { |
| 510 | return address_space_translate_iommu(iommu_mr, xlat, |
| 511 | plen_out, page_mask_out, |
| 512 | is_write, is_mmio, |
Peter Maydell | 2f7b009 | 2018-05-31 14:50:53 +0100 | [diff] [blame] | 513 | target_as, attrs); |
Avi Kivity | 3095115 | 2012-10-30 13:47:46 +0200 | [diff] [blame] | 514 | } |
Peter Xu | d5e5faf | 2017-10-10 11:42:45 +0200 | [diff] [blame] | 515 | if (page_mask_out) { |
Paolo Bonzini | a411c84 | 2018-03-03 17:24:04 +0100 | [diff] [blame] | 516 | /* Not behind an IOMMU, use default page size. */ |
| 517 | *page_mask_out = ~TARGET_PAGE_MASK; |
Peter Xu | d5e5faf | 2017-10-10 11:42:45 +0200 | [diff] [blame] | 518 | } |
| 519 | |
Peter Xu | a764040 | 2017-05-17 16:57:42 +0800 | [diff] [blame] | 520 | return *section; |
Peter Xu | a764040 | 2017-05-17 16:57:42 +0800 | [diff] [blame] | 521 | } |
| 522 | |
| 523 | /* Called from RCU critical section */ |
| 524 | IOMMUTLBEntry address_space_get_iotlb_entry(AddressSpace *as, hwaddr addr, |
Peter Maydell | 7446eb0 | 2018-05-31 14:50:53 +0100 | [diff] [blame] | 525 | bool is_write, MemTxAttrs attrs) |
Peter Xu | a764040 | 2017-05-17 16:57:42 +0800 | [diff] [blame] | 526 | { |
| 527 | MemoryRegionSection section; |
Peter Xu | 076a93d | 2017-10-10 11:42:46 +0200 | [diff] [blame] | 528 | hwaddr xlat, page_mask; |
Peter Xu | a764040 | 2017-05-17 16:57:42 +0800 | [diff] [blame] | 529 | |
Peter Xu | 076a93d | 2017-10-10 11:42:46 +0200 | [diff] [blame] | 530 | /* |
| 531 | * This can never be MMIO, and we don't really care about plen, |
| 532 | * but page mask. |
| 533 | */ |
| 534 | section = flatview_do_translate(address_space_to_flatview(as), addr, &xlat, |
Peter Maydell | 49e14aa | 2018-05-31 14:50:53 +0100 | [diff] [blame] | 535 | NULL, &page_mask, is_write, false, &as, |
| 536 | attrs); |
Peter Xu | a764040 | 2017-05-17 16:57:42 +0800 | [diff] [blame] | 537 | |
| 538 | /* Illegal translation */ |
| 539 | if (section.mr == &io_mem_unassigned) { |
| 540 | goto iotlb_fail; |
| 541 | } |
| 542 | |
| 543 | /* Convert memory region offset into address space offset */ |
| 544 | xlat += section.offset_within_address_space - |
| 545 | section.offset_within_region; |
| 546 | |
Peter Xu | a764040 | 2017-05-17 16:57:42 +0800 | [diff] [blame] | 547 | return (IOMMUTLBEntry) { |
Alexey Kardashevskiy | e76bb18 | 2017-09-21 18:50:53 +1000 | [diff] [blame] | 548 | .target_as = as, |
Peter Xu | 076a93d | 2017-10-10 11:42:46 +0200 | [diff] [blame] | 549 | .iova = addr & ~page_mask, |
| 550 | .translated_addr = xlat & ~page_mask, |
| 551 | .addr_mask = page_mask, |
Peter Xu | a764040 | 2017-05-17 16:57:42 +0800 | [diff] [blame] | 552 | /* IOTLBs are for DMAs, and DMA only allows on RAMs. */ |
| 553 | .perm = IOMMU_RW, |
| 554 | }; |
| 555 | |
| 556 | iotlb_fail: |
| 557 | return (IOMMUTLBEntry) {0}; |
| 558 | } |
| 559 | |
| 560 | /* Called from RCU critical section */ |
Alexey Kardashevskiy | 1662068 | 2017-09-21 18:50:58 +1000 | [diff] [blame] | 561 | MemoryRegion *flatview_translate(FlatView *fv, hwaddr addr, hwaddr *xlat, |
Peter Maydell | efa99a2 | 2018-05-31 14:50:52 +0100 | [diff] [blame] | 562 | hwaddr *plen, bool is_write, |
| 563 | MemTxAttrs attrs) |
Peter Xu | a764040 | 2017-05-17 16:57:42 +0800 | [diff] [blame] | 564 | { |
| 565 | MemoryRegion *mr; |
| 566 | MemoryRegionSection section; |
Alexey Kardashevskiy | 1662068 | 2017-09-21 18:50:58 +1000 | [diff] [blame] | 567 | AddressSpace *as = NULL; |
Peter Xu | a764040 | 2017-05-17 16:57:42 +0800 | [diff] [blame] | 568 | |
| 569 | /* This can be MMIO, so setup MMIO bit. */ |
Peter Xu | d5e5faf | 2017-10-10 11:42:45 +0200 | [diff] [blame] | 570 | section = flatview_do_translate(fv, addr, xlat, plen, NULL, |
Peter Maydell | 49e14aa | 2018-05-31 14:50:53 +0100 | [diff] [blame] | 571 | is_write, true, &as, attrs); |
Peter Xu | a764040 | 2017-05-17 16:57:42 +0800 | [diff] [blame] | 572 | mr = section.mr; |
| 573 | |
Alexey Kardashevskiy | fe680d0 | 2014-05-07 13:40:39 +0000 | [diff] [blame] | 574 | if (xen_enabled() && memory_access_is_direct(mr, is_write)) { |
Paolo Bonzini | a87f395 | 2014-02-07 15:47:46 +0100 | [diff] [blame] | 575 | hwaddr page = ((addr & TARGET_PAGE_MASK) + TARGET_PAGE_SIZE) - addr; |
Peter Crosthwaite | 23820db | 2015-03-16 22:35:54 -0700 | [diff] [blame] | 576 | *plen = MIN(page, *plen); |
Paolo Bonzini | a87f395 | 2014-02-07 15:47:46 +0100 | [diff] [blame] | 577 | } |
| 578 | |
Avi Kivity | 3095115 | 2012-10-30 13:47:46 +0200 | [diff] [blame] | 579 | return mr; |
Jan Kiszka | 90260c6 | 2013-05-26 21:46:51 +0200 | [diff] [blame] | 580 | } |
| 581 | |
Peter Maydell | 1f871c5 | 2018-06-15 14:57:16 +0100 | [diff] [blame] | 582 | typedef struct TCGIOMMUNotifier { |
| 583 | IOMMUNotifier n; |
| 584 | MemoryRegion *mr; |
| 585 | CPUState *cpu; |
| 586 | int iommu_idx; |
| 587 | bool active; |
| 588 | } TCGIOMMUNotifier; |
| 589 | |
| 590 | static void tcg_iommu_unmap_notify(IOMMUNotifier *n, IOMMUTLBEntry *iotlb) |
| 591 | { |
| 592 | TCGIOMMUNotifier *notifier = container_of(n, TCGIOMMUNotifier, n); |
| 593 | |
| 594 | if (!notifier->active) { |
| 595 | return; |
| 596 | } |
| 597 | tlb_flush(notifier->cpu); |
| 598 | notifier->active = false; |
| 599 | /* We leave the notifier struct on the list to avoid reallocating it later. |
| 600 | * Generally the number of IOMMUs a CPU deals with will be small. |
| 601 | * In any case we can't unregister the iommu notifier from a notify |
| 602 | * callback. |
| 603 | */ |
| 604 | } |
| 605 | |
| 606 | static void tcg_register_iommu_notifier(CPUState *cpu, |
| 607 | IOMMUMemoryRegion *iommu_mr, |
| 608 | int iommu_idx) |
| 609 | { |
| 610 | /* Make sure this CPU has an IOMMU notifier registered for this |
| 611 | * IOMMU/IOMMU index combination, so that we can flush its TLB |
| 612 | * when the IOMMU tells us the mappings we've cached have changed. |
| 613 | */ |
| 614 | MemoryRegion *mr = MEMORY_REGION(iommu_mr); |
Philippe Mathieu-Daudé | bbf9019 | 2021-01-17 18:04:11 +0100 | [diff] [blame] | 615 | TCGIOMMUNotifier *notifier = NULL; |
Markus Armbruster | 805d449 | 2020-07-22 10:40:48 +0200 | [diff] [blame] | 616 | int i; |
Peter Maydell | 1f871c5 | 2018-06-15 14:57:16 +0100 | [diff] [blame] | 617 | |
| 618 | for (i = 0; i < cpu->iommu_notifiers->len; i++) { |
Peter Maydell | 5601be3 | 2019-02-01 14:55:45 +0000 | [diff] [blame] | 619 | notifier = g_array_index(cpu->iommu_notifiers, TCGIOMMUNotifier *, i); |
Peter Maydell | 1f871c5 | 2018-06-15 14:57:16 +0100 | [diff] [blame] | 620 | if (notifier->mr == mr && notifier->iommu_idx == iommu_idx) { |
| 621 | break; |
| 622 | } |
| 623 | } |
| 624 | if (i == cpu->iommu_notifiers->len) { |
| 625 | /* Not found, add a new entry at the end of the array */ |
| 626 | cpu->iommu_notifiers = g_array_set_size(cpu->iommu_notifiers, i + 1); |
Peter Maydell | 5601be3 | 2019-02-01 14:55:45 +0000 | [diff] [blame] | 627 | notifier = g_new0(TCGIOMMUNotifier, 1); |
| 628 | g_array_index(cpu->iommu_notifiers, TCGIOMMUNotifier *, i) = notifier; |
Peter Maydell | 1f871c5 | 2018-06-15 14:57:16 +0100 | [diff] [blame] | 629 | |
| 630 | notifier->mr = mr; |
| 631 | notifier->iommu_idx = iommu_idx; |
| 632 | notifier->cpu = cpu; |
| 633 | /* Rather than trying to register interest in the specific part |
| 634 | * of the iommu's address space that we've accessed and then |
| 635 | * expand it later as subsequent accesses touch more of it, we |
| 636 | * just register interest in the whole thing, on the assumption |
| 637 | * that iommu reconfiguration will be rare. |
| 638 | */ |
| 639 | iommu_notifier_init(¬ifier->n, |
| 640 | tcg_iommu_unmap_notify, |
| 641 | IOMMU_NOTIFIER_UNMAP, |
| 642 | 0, |
| 643 | HWADDR_MAX, |
| 644 | iommu_idx); |
Markus Armbruster | 805d449 | 2020-07-22 10:40:48 +0200 | [diff] [blame] | 645 | memory_region_register_iommu_notifier(notifier->mr, ¬ifier->n, |
| 646 | &error_fatal); |
Peter Maydell | 1f871c5 | 2018-06-15 14:57:16 +0100 | [diff] [blame] | 647 | } |
| 648 | |
| 649 | if (!notifier->active) { |
| 650 | notifier->active = true; |
| 651 | } |
| 652 | } |
| 653 | |
Paolo Bonzini | d9f24bf | 2020-10-06 09:05:29 +0200 | [diff] [blame] | 654 | void tcg_iommu_free_notifier_list(CPUState *cpu) |
Peter Maydell | 1f871c5 | 2018-06-15 14:57:16 +0100 | [diff] [blame] | 655 | { |
| 656 | /* Destroy the CPU's notifier list */ |
| 657 | int i; |
| 658 | TCGIOMMUNotifier *notifier; |
| 659 | |
| 660 | for (i = 0; i < cpu->iommu_notifiers->len; i++) { |
Peter Maydell | 5601be3 | 2019-02-01 14:55:45 +0000 | [diff] [blame] | 661 | notifier = g_array_index(cpu->iommu_notifiers, TCGIOMMUNotifier *, i); |
Peter Maydell | 1f871c5 | 2018-06-15 14:57:16 +0100 | [diff] [blame] | 662 | memory_region_unregister_iommu_notifier(notifier->mr, ¬ifier->n); |
Peter Maydell | 5601be3 | 2019-02-01 14:55:45 +0000 | [diff] [blame] | 663 | g_free(notifier); |
Peter Maydell | 1f871c5 | 2018-06-15 14:57:16 +0100 | [diff] [blame] | 664 | } |
| 665 | g_array_free(cpu->iommu_notifiers, true); |
| 666 | } |
| 667 | |
Paolo Bonzini | d9f24bf | 2020-10-06 09:05:29 +0200 | [diff] [blame] | 668 | void tcg_iommu_init_notifier_list(CPUState *cpu) |
| 669 | { |
| 670 | cpu->iommu_notifiers = g_array_new(false, true, sizeof(TCGIOMMUNotifier *)); |
| 671 | } |
| 672 | |
Paolo Bonzini | 79e2b9a | 2015-01-21 12:09:14 +0100 | [diff] [blame] | 673 | /* Called from RCU critical section */ |
Jan Kiszka | 90260c6 | 2013-05-26 21:46:51 +0200 | [diff] [blame] | 674 | MemoryRegionSection * |
Richard Henderson | 418ade7 | 2022-06-21 08:38:29 -0700 | [diff] [blame] | 675 | address_space_translate_for_iotlb(CPUState *cpu, int asidx, hwaddr orig_addr, |
Peter Maydell | 1f871c5 | 2018-06-15 14:57:16 +0100 | [diff] [blame] | 676 | hwaddr *xlat, hwaddr *plen, |
| 677 | MemTxAttrs attrs, int *prot) |
Jan Kiszka | 90260c6 | 2013-05-26 21:46:51 +0200 | [diff] [blame] | 678 | { |
Avi Kivity | 3095115 | 2012-10-30 13:47:46 +0200 | [diff] [blame] | 679 | MemoryRegionSection *section; |
Peter Maydell | 1f871c5 | 2018-06-15 14:57:16 +0100 | [diff] [blame] | 680 | IOMMUMemoryRegion *iommu_mr; |
| 681 | IOMMUMemoryRegionClass *imrc; |
| 682 | IOMMUTLBEntry iotlb; |
| 683 | int iommu_idx; |
Richard Henderson | 418ade7 | 2022-06-21 08:38:29 -0700 | [diff] [blame] | 684 | hwaddr addr = orig_addr; |
Richard Henderson | 0d58c66 | 2023-08-25 16:13:17 -0700 | [diff] [blame] | 685 | AddressSpaceDispatch *d = cpu->cpu_ases[asidx].memory_dispatch; |
Peter Maydell | d7898cd | 2016-01-21 14:15:05 +0000 | [diff] [blame] | 686 | |
Peter Maydell | 1f871c5 | 2018-06-15 14:57:16 +0100 | [diff] [blame] | 687 | for (;;) { |
| 688 | section = address_space_translate_internal(d, addr, &addr, plen, false); |
| 689 | |
| 690 | iommu_mr = memory_region_get_iommu(section->mr); |
| 691 | if (!iommu_mr) { |
| 692 | break; |
| 693 | } |
| 694 | |
| 695 | imrc = memory_region_get_iommu_class_nocheck(iommu_mr); |
| 696 | |
| 697 | iommu_idx = imrc->attrs_to_index(iommu_mr, attrs); |
| 698 | tcg_register_iommu_notifier(cpu, iommu_mr, iommu_idx); |
| 699 | /* We need all the permissions, so pass IOMMU_NONE so the IOMMU |
| 700 | * doesn't short-cut its translation table walk. |
| 701 | */ |
| 702 | iotlb = imrc->translate(iommu_mr, addr, IOMMU_NONE, iommu_idx); |
| 703 | addr = ((iotlb.translated_addr & ~iotlb.addr_mask) |
| 704 | | (addr & iotlb.addr_mask)); |
| 705 | /* Update the caller's prot bits to remove permissions the IOMMU |
| 706 | * is giving us a failure response for. If we get down to no |
| 707 | * permissions left at all we can give up now. |
| 708 | */ |
| 709 | if (!(iotlb.perm & IOMMU_RO)) { |
| 710 | *prot &= ~(PAGE_READ | PAGE_EXEC); |
| 711 | } |
| 712 | if (!(iotlb.perm & IOMMU_WO)) { |
| 713 | *prot &= ~PAGE_WRITE; |
| 714 | } |
| 715 | |
| 716 | if (!*prot) { |
| 717 | goto translate_fail; |
| 718 | } |
| 719 | |
| 720 | d = flatview_to_dispatch(address_space_to_flatview(iotlb.target_as)); |
| 721 | } |
Avi Kivity | 3095115 | 2012-10-30 13:47:46 +0200 | [diff] [blame] | 722 | |
Alexey Kardashevskiy | 3df9d74 | 2017-07-11 13:56:19 +1000 | [diff] [blame] | 723 | assert(!memory_region_is_iommu(section->mr)); |
Peter Maydell | 1f871c5 | 2018-06-15 14:57:16 +0100 | [diff] [blame] | 724 | *xlat = addr; |
Avi Kivity | 3095115 | 2012-10-30 13:47:46 +0200 | [diff] [blame] | 725 | return section; |
Peter Maydell | 1f871c5 | 2018-06-15 14:57:16 +0100 | [diff] [blame] | 726 | |
| 727 | translate_fail: |
Richard Henderson | 418ade7 | 2022-06-21 08:38:29 -0700 | [diff] [blame] | 728 | /* |
| 729 | * We should be given a page-aligned address -- certainly |
| 730 | * tlb_set_page_with_attrs() does so. The page offset of xlat |
| 731 | * is used to index sections[], and PHYS_SECTION_UNASSIGNED = 0. |
| 732 | * The page portion of xlat will be logged by memory_region_access_valid() |
| 733 | * when this memory access is rejected, so use the original untranslated |
| 734 | * physical address. |
| 735 | */ |
| 736 | assert((orig_addr & ~TARGET_PAGE_MASK) == 0); |
| 737 | *xlat = orig_addr; |
Peter Maydell | 1f871c5 | 2018-06-15 14:57:16 +0100 | [diff] [blame] | 738 | return &d->map.sections[PHYS_SECTION_UNASSIGNED]; |
Jan Kiszka | 90260c6 | 2013-05-26 21:46:51 +0200 | [diff] [blame] | 739 | } |
Andreas Färber | 1a1562f | 2013-06-17 04:09:11 +0200 | [diff] [blame] | 740 | |
Peter Xu | 80ceb07 | 2017-11-23 17:23:32 +0800 | [diff] [blame] | 741 | void cpu_address_space_init(CPUState *cpu, int asidx, |
| 742 | const char *prefix, MemoryRegion *mr) |
Edgar E. Iglesias | 09daed8 | 2013-12-17 13:06:51 +1000 | [diff] [blame] | 743 | { |
Peter Maydell | 12ebc9a | 2016-01-21 14:15:04 +0000 | [diff] [blame] | 744 | CPUAddressSpace *newas; |
Peter Xu | 80ceb07 | 2017-11-23 17:23:32 +0800 | [diff] [blame] | 745 | AddressSpace *as = g_new0(AddressSpace, 1); |
Peter Xu | 87a621d | 2017-11-23 17:23:33 +0800 | [diff] [blame] | 746 | char *as_name; |
Peter Xu | 80ceb07 | 2017-11-23 17:23:32 +0800 | [diff] [blame] | 747 | |
| 748 | assert(mr); |
Peter Xu | 87a621d | 2017-11-23 17:23:33 +0800 | [diff] [blame] | 749 | as_name = g_strdup_printf("%s-%d", prefix, cpu->cpu_index); |
| 750 | address_space_init(as, mr, as_name); |
| 751 | g_free(as_name); |
Peter Maydell | 12ebc9a | 2016-01-21 14:15:04 +0000 | [diff] [blame] | 752 | |
| 753 | /* Target code should have set num_ases before calling us */ |
| 754 | assert(asidx < cpu->num_ases); |
| 755 | |
Peter Maydell | 56943e8 | 2016-01-21 14:15:04 +0000 | [diff] [blame] | 756 | if (asidx == 0) { |
| 757 | /* address space 0 gets the convenience alias */ |
| 758 | cpu->as = as; |
| 759 | } |
| 760 | |
Peter Maydell | 12ebc9a | 2016-01-21 14:15:04 +0000 | [diff] [blame] | 761 | /* KVM cannot currently support multiple address spaces. */ |
| 762 | assert(asidx == 0 || !kvm_enabled()); |
Edgar E. Iglesias | 09daed8 | 2013-12-17 13:06:51 +1000 | [diff] [blame] | 763 | |
Peter Maydell | 12ebc9a | 2016-01-21 14:15:04 +0000 | [diff] [blame] | 764 | if (!cpu->cpu_ases) { |
| 765 | cpu->cpu_ases = g_new0(CPUAddressSpace, cpu->num_ases); |
Salil Mehta | 24bec42 | 2024-07-16 12:15:01 +0100 | [diff] [blame] | 766 | cpu->cpu_ases_count = cpu->num_ases; |
Edgar E. Iglesias | 09daed8 | 2013-12-17 13:06:51 +1000 | [diff] [blame] | 767 | } |
Peter Maydell | 32857f4 | 2015-10-01 15:29:50 +0100 | [diff] [blame] | 768 | |
Peter Maydell | 12ebc9a | 2016-01-21 14:15:04 +0000 | [diff] [blame] | 769 | newas = &cpu->cpu_ases[asidx]; |
| 770 | newas->cpu = cpu; |
| 771 | newas->as = as; |
Peter Maydell | 56943e8 | 2016-01-21 14:15:04 +0000 | [diff] [blame] | 772 | if (tcg_enabled()) { |
Paolo Bonzini | 9458a9a | 2018-02-06 18:37:39 +0100 | [diff] [blame] | 773 | newas->tcg_as_listener.log_global_after_sync = tcg_log_global_after_sync; |
Peter Maydell | 12ebc9a | 2016-01-21 14:15:04 +0000 | [diff] [blame] | 774 | newas->tcg_as_listener.commit = tcg_commit; |
Peter Xu | 142518b | 2021-08-16 21:35:52 -0400 | [diff] [blame] | 775 | newas->tcg_as_listener.name = "tcg"; |
Peter Maydell | 12ebc9a | 2016-01-21 14:15:04 +0000 | [diff] [blame] | 776 | memory_listener_register(&newas->tcg_as_listener, as); |
Peter Maydell | 56943e8 | 2016-01-21 14:15:04 +0000 | [diff] [blame] | 777 | } |
Edgar E. Iglesias | 09daed8 | 2013-12-17 13:06:51 +1000 | [diff] [blame] | 778 | } |
Peter Maydell | 651a5bc | 2016-01-21 14:15:05 +0000 | [diff] [blame] | 779 | |
Salil Mehta | 24bec42 | 2024-07-16 12:15:01 +0100 | [diff] [blame] | 780 | void cpu_address_space_destroy(CPUState *cpu, int asidx) |
| 781 | { |
| 782 | CPUAddressSpace *cpuas; |
| 783 | |
| 784 | assert(cpu->cpu_ases); |
| 785 | assert(asidx >= 0 && asidx < cpu->num_ases); |
| 786 | /* KVM cannot currently support multiple address spaces. */ |
| 787 | assert(asidx == 0 || !kvm_enabled()); |
| 788 | |
| 789 | cpuas = &cpu->cpu_ases[asidx]; |
| 790 | if (tcg_enabled()) { |
| 791 | memory_listener_unregister(&cpuas->tcg_as_listener); |
| 792 | } |
| 793 | |
| 794 | address_space_destroy(cpuas->as); |
| 795 | g_free_rcu(cpuas->as, rcu); |
| 796 | |
| 797 | if (asidx == 0) { |
| 798 | /* reset the convenience alias for address space 0 */ |
| 799 | cpu->as = NULL; |
| 800 | } |
| 801 | |
| 802 | if (--cpu->cpu_ases_count == 0) { |
| 803 | g_free(cpu->cpu_ases); |
| 804 | cpu->cpu_ases = NULL; |
| 805 | } |
| 806 | } |
| 807 | |
Peter Maydell | 651a5bc | 2016-01-21 14:15:05 +0000 | [diff] [blame] | 808 | AddressSpace *cpu_get_address_space(CPUState *cpu, int asidx) |
| 809 | { |
| 810 | /* Return the AddressSpace corresponding to the specified index */ |
| 811 | return cpu->cpu_ases[asidx].as; |
| 812 | } |
Edgar E. Iglesias | 09daed8 | 2013-12-17 13:06:51 +1000 | [diff] [blame] | 813 | |
Mike Day | 0dc3f44 | 2013-09-05 14:41:35 -0400 | [diff] [blame] | 814 | /* Called from RCU critical section */ |
Paolo Bonzini | 041603f | 2013-09-09 17:49:45 +0200 | [diff] [blame] | 815 | static RAMBlock *qemu_get_ram_block(ram_addr_t addr) |
| 816 | { |
| 817 | RAMBlock *block; |
| 818 | |
Stefan Hajnoczi | d73415a | 2020-09-23 11:56:46 +0100 | [diff] [blame] | 819 | block = qatomic_rcu_read(&ram_list.mru_block); |
Michael S. Tsirkin | 9b8424d | 2014-12-15 22:55:32 +0200 | [diff] [blame] | 820 | if (block && addr - block->offset < block->max_length) { |
Paolo Bonzini | 68851b9 | 2015-10-22 13:51:30 +0200 | [diff] [blame] | 821 | return block; |
Paolo Bonzini | 041603f | 2013-09-09 17:49:45 +0200 | [diff] [blame] | 822 | } |
Peter Xu | 99e1558 | 2017-05-12 12:17:39 +0800 | [diff] [blame] | 823 | RAMBLOCK_FOREACH(block) { |
Michael S. Tsirkin | 9b8424d | 2014-12-15 22:55:32 +0200 | [diff] [blame] | 824 | if (addr - block->offset < block->max_length) { |
Paolo Bonzini | 041603f | 2013-09-09 17:49:45 +0200 | [diff] [blame] | 825 | goto found; |
| 826 | } |
| 827 | } |
| 828 | |
| 829 | fprintf(stderr, "Bad ram offset %" PRIx64 "\n", (uint64_t)addr); |
| 830 | abort(); |
| 831 | |
| 832 | found: |
Stefan Hajnoczi | a4a411f | 2024-01-02 10:35:28 -0500 | [diff] [blame] | 833 | /* It is safe to write mru_block outside the BQL. This |
Paolo Bonzini | 4377153 | 2013-09-09 17:58:40 +0200 | [diff] [blame] | 834 | * is what happens: |
| 835 | * |
| 836 | * mru_block = xxx |
| 837 | * rcu_read_unlock() |
| 838 | * xxx removed from list |
| 839 | * rcu_read_lock() |
| 840 | * read mru_block |
| 841 | * mru_block = NULL; |
| 842 | * call_rcu(reclaim_ramblock, xxx); |
| 843 | * rcu_read_unlock() |
| 844 | * |
Stefan Hajnoczi | d73415a | 2020-09-23 11:56:46 +0100 | [diff] [blame] | 845 | * qatomic_rcu_set is not needed here. The block was already published |
Paolo Bonzini | 4377153 | 2013-09-09 17:58:40 +0200 | [diff] [blame] | 846 | * when it was placed into the list. Here we're just making an extra |
| 847 | * copy of the pointer. |
| 848 | */ |
Paolo Bonzini | 041603f | 2013-09-09 17:49:45 +0200 | [diff] [blame] | 849 | ram_list.mru_block = block; |
| 850 | return block; |
| 851 | } |
| 852 | |
Philippe Mathieu-Daudé | 7e8ccf9 | 2024-03-12 21:14:56 +0100 | [diff] [blame] | 853 | void tlb_reset_dirty_range_all(ram_addr_t start, ram_addr_t length) |
bellard | 1ccde1c | 2004-02-06 19:46:14 +0000 | [diff] [blame] | 854 | { |
Peter Crosthwaite | 9a13565 | 2015-09-10 22:39:41 -0700 | [diff] [blame] | 855 | CPUState *cpu; |
Paolo Bonzini | 041603f | 2013-09-09 17:49:45 +0200 | [diff] [blame] | 856 | ram_addr_t start1; |
Juan Quintela | a2f4d5b | 2013-10-10 11:49:53 +0200 | [diff] [blame] | 857 | RAMBlock *block; |
| 858 | ram_addr_t end; |
| 859 | |
Emilio G. Cota | f28d0df | 2018-06-22 13:45:31 -0400 | [diff] [blame] | 860 | assert(tcg_enabled()); |
Juan Quintela | a2f4d5b | 2013-10-10 11:49:53 +0200 | [diff] [blame] | 861 | end = TARGET_PAGE_ALIGN(start + length); |
| 862 | start &= TARGET_PAGE_MASK; |
bellard | f23db16 | 2005-08-21 19:12:28 +0000 | [diff] [blame] | 863 | |
Dr. David Alan Gilbert | 694ea27 | 2019-10-07 15:36:41 +0100 | [diff] [blame] | 864 | RCU_READ_LOCK_GUARD(); |
Paolo Bonzini | 041603f | 2013-09-09 17:49:45 +0200 | [diff] [blame] | 865 | block = qemu_get_ram_block(start); |
| 866 | assert(block == qemu_get_ram_block(end - 1)); |
Michael S. Tsirkin | 1240be2 | 2014-11-12 11:44:41 +0200 | [diff] [blame] | 867 | start1 = (uintptr_t)ramblock_ptr(block, start - block->offset); |
Peter Crosthwaite | 9a13565 | 2015-09-10 22:39:41 -0700 | [diff] [blame] | 868 | CPU_FOREACH(cpu) { |
| 869 | tlb_reset_dirty(cpu, start1, length); |
| 870 | } |
Juan Quintela | d24981d | 2012-05-22 00:42:40 +0200 | [diff] [blame] | 871 | } |
| 872 | |
| 873 | /* Note: start and end must be within the same ram block. */ |
Stefan Hajnoczi | 03eebc9 | 2014-12-02 11:23:18 +0000 | [diff] [blame] | 874 | bool cpu_physical_memory_test_and_clear_dirty(ram_addr_t start, |
| 875 | ram_addr_t length, |
| 876 | unsigned client) |
Juan Quintela | d24981d | 2012-05-22 00:42:40 +0200 | [diff] [blame] | 877 | { |
Stefan Hajnoczi | 5b82b70 | 2016-01-25 13:33:20 +0000 | [diff] [blame] | 878 | DirtyMemoryBlocks *blocks; |
Matt Borgerson | 25aa6b3 | 2020-02-18 03:19:10 -0700 | [diff] [blame] | 879 | unsigned long end, page, start_page; |
Stefan Hajnoczi | 5b82b70 | 2016-01-25 13:33:20 +0000 | [diff] [blame] | 880 | bool dirty = false; |
Peter Xu | 077874e | 2019-06-03 14:50:51 +0800 | [diff] [blame] | 881 | RAMBlock *ramblock; |
| 882 | uint64_t mr_offset, mr_size; |
Juan Quintela | d24981d | 2012-05-22 00:42:40 +0200 | [diff] [blame] | 883 | |
Stefan Hajnoczi | 03eebc9 | 2014-12-02 11:23:18 +0000 | [diff] [blame] | 884 | if (length == 0) { |
| 885 | return false; |
| 886 | } |
| 887 | |
| 888 | end = TARGET_PAGE_ALIGN(start + length) >> TARGET_PAGE_BITS; |
Matt Borgerson | 25aa6b3 | 2020-02-18 03:19:10 -0700 | [diff] [blame] | 889 | start_page = start >> TARGET_PAGE_BITS; |
| 890 | page = start_page; |
Stefan Hajnoczi | 5b82b70 | 2016-01-25 13:33:20 +0000 | [diff] [blame] | 891 | |
Dr. David Alan Gilbert | 694ea27 | 2019-10-07 15:36:41 +0100 | [diff] [blame] | 892 | WITH_RCU_READ_LOCK_GUARD() { |
Stefan Hajnoczi | d73415a | 2020-09-23 11:56:46 +0100 | [diff] [blame] | 893 | blocks = qatomic_rcu_read(&ram_list.dirty_memory[client]); |
Dr. David Alan Gilbert | 694ea27 | 2019-10-07 15:36:41 +0100 | [diff] [blame] | 894 | ramblock = qemu_get_ram_block(start); |
| 895 | /* Range sanity check on the ramblock */ |
| 896 | assert(start >= ramblock->offset && |
| 897 | start + length <= ramblock->offset + ramblock->used_length); |
Stefan Hajnoczi | 5b82b70 | 2016-01-25 13:33:20 +0000 | [diff] [blame] | 898 | |
Dr. David Alan Gilbert | 694ea27 | 2019-10-07 15:36:41 +0100 | [diff] [blame] | 899 | while (page < end) { |
| 900 | unsigned long idx = page / DIRTY_MEMORY_BLOCK_SIZE; |
| 901 | unsigned long offset = page % DIRTY_MEMORY_BLOCK_SIZE; |
| 902 | unsigned long num = MIN(end - page, |
| 903 | DIRTY_MEMORY_BLOCK_SIZE - offset); |
Stefan Hajnoczi | 5b82b70 | 2016-01-25 13:33:20 +0000 | [diff] [blame] | 904 | |
Dr. David Alan Gilbert | 694ea27 | 2019-10-07 15:36:41 +0100 | [diff] [blame] | 905 | dirty |= bitmap_test_and_clear_atomic(blocks->blocks[idx], |
| 906 | offset, num); |
| 907 | page += num; |
| 908 | } |
Stefan Hajnoczi | 5b82b70 | 2016-01-25 13:33:20 +0000 | [diff] [blame] | 909 | |
Matt Borgerson | 25aa6b3 | 2020-02-18 03:19:10 -0700 | [diff] [blame] | 910 | mr_offset = (ram_addr_t)(start_page << TARGET_PAGE_BITS) - ramblock->offset; |
| 911 | mr_size = (end - start_page) << TARGET_PAGE_BITS; |
Dr. David Alan Gilbert | 694ea27 | 2019-10-07 15:36:41 +0100 | [diff] [blame] | 912 | memory_region_clear_dirty_bitmap(ramblock->mr, mr_offset, mr_size); |
Stefan Hajnoczi | 5b82b70 | 2016-01-25 13:33:20 +0000 | [diff] [blame] | 913 | } |
| 914 | |
Nicholas Piggin | 86a9ae8 | 2024-03-12 21:14:57 +0100 | [diff] [blame] | 915 | if (dirty) { |
| 916 | cpu_physical_memory_dirty_bits_cleared(start, length); |
Juan Quintela | d24981d | 2012-05-22 00:42:40 +0200 | [diff] [blame] | 917 | } |
Stefan Hajnoczi | 03eebc9 | 2014-12-02 11:23:18 +0000 | [diff] [blame] | 918 | |
| 919 | return dirty; |
bellard | 1ccde1c | 2004-02-06 19:46:14 +0000 | [diff] [blame] | 920 | } |
| 921 | |
Gerd Hoffmann | 8deaf12 | 2017-04-21 11:16:25 +0200 | [diff] [blame] | 922 | DirtyBitmapSnapshot *cpu_physical_memory_snapshot_and_clear_dirty |
Peter Xu | 5dea407 | 2019-06-03 14:50:50 +0800 | [diff] [blame] | 923 | (MemoryRegion *mr, hwaddr offset, hwaddr length, unsigned client) |
Gerd Hoffmann | 8deaf12 | 2017-04-21 11:16:25 +0200 | [diff] [blame] | 924 | { |
| 925 | DirtyMemoryBlocks *blocks; |
Peter Maydell | 7318806 | 2024-07-23 18:05:13 +0100 | [diff] [blame] | 926 | ram_addr_t start, first, last; |
Gerd Hoffmann | 8deaf12 | 2017-04-21 11:16:25 +0200 | [diff] [blame] | 927 | unsigned long align = 1UL << (TARGET_PAGE_BITS + BITS_PER_LEVEL); |
Gerd Hoffmann | 8deaf12 | 2017-04-21 11:16:25 +0200 | [diff] [blame] | 928 | DirtyBitmapSnapshot *snap; |
| 929 | unsigned long page, end, dest; |
| 930 | |
Peter Maydell | 7318806 | 2024-07-23 18:05:13 +0100 | [diff] [blame] | 931 | start = memory_region_get_ram_addr(mr); |
| 932 | /* We know we're only called for RAM MemoryRegions */ |
| 933 | assert(start != RAM_ADDR_INVALID); |
| 934 | start += offset; |
| 935 | |
| 936 | first = QEMU_ALIGN_DOWN(start, align); |
| 937 | last = QEMU_ALIGN_UP(start + length, align); |
| 938 | |
Gerd Hoffmann | 8deaf12 | 2017-04-21 11:16:25 +0200 | [diff] [blame] | 939 | snap = g_malloc0(sizeof(*snap) + |
| 940 | ((last - first) >> (TARGET_PAGE_BITS + 3))); |
| 941 | snap->start = first; |
| 942 | snap->end = last; |
| 943 | |
| 944 | page = first >> TARGET_PAGE_BITS; |
| 945 | end = last >> TARGET_PAGE_BITS; |
| 946 | dest = 0; |
| 947 | |
Dr. David Alan Gilbert | 694ea27 | 2019-10-07 15:36:41 +0100 | [diff] [blame] | 948 | WITH_RCU_READ_LOCK_GUARD() { |
Stefan Hajnoczi | d73415a | 2020-09-23 11:56:46 +0100 | [diff] [blame] | 949 | blocks = qatomic_rcu_read(&ram_list.dirty_memory[client]); |
Gerd Hoffmann | 8deaf12 | 2017-04-21 11:16:25 +0200 | [diff] [blame] | 950 | |
Dr. David Alan Gilbert | 694ea27 | 2019-10-07 15:36:41 +0100 | [diff] [blame] | 951 | while (page < end) { |
| 952 | unsigned long idx = page / DIRTY_MEMORY_BLOCK_SIZE; |
Philippe Mathieu-Daudé | 6ba9b60 | 2023-09-04 18:12:34 +0200 | [diff] [blame] | 953 | unsigned long ofs = page % DIRTY_MEMORY_BLOCK_SIZE; |
Dr. David Alan Gilbert | 694ea27 | 2019-10-07 15:36:41 +0100 | [diff] [blame] | 954 | unsigned long num = MIN(end - page, |
Philippe Mathieu-Daudé | 6ba9b60 | 2023-09-04 18:12:34 +0200 | [diff] [blame] | 955 | DIRTY_MEMORY_BLOCK_SIZE - ofs); |
Gerd Hoffmann | 8deaf12 | 2017-04-21 11:16:25 +0200 | [diff] [blame] | 956 | |
Philippe Mathieu-Daudé | 6ba9b60 | 2023-09-04 18:12:34 +0200 | [diff] [blame] | 957 | assert(QEMU_IS_ALIGNED(ofs, (1 << BITS_PER_LEVEL))); |
Dr. David Alan Gilbert | 694ea27 | 2019-10-07 15:36:41 +0100 | [diff] [blame] | 958 | assert(QEMU_IS_ALIGNED(num, (1 << BITS_PER_LEVEL))); |
Philippe Mathieu-Daudé | 6ba9b60 | 2023-09-04 18:12:34 +0200 | [diff] [blame] | 959 | ofs >>= BITS_PER_LEVEL; |
Gerd Hoffmann | 8deaf12 | 2017-04-21 11:16:25 +0200 | [diff] [blame] | 960 | |
Dr. David Alan Gilbert | 694ea27 | 2019-10-07 15:36:41 +0100 | [diff] [blame] | 961 | bitmap_copy_and_clear_atomic(snap->dirty + dest, |
Philippe Mathieu-Daudé | 6ba9b60 | 2023-09-04 18:12:34 +0200 | [diff] [blame] | 962 | blocks->blocks[idx] + ofs, |
Dr. David Alan Gilbert | 694ea27 | 2019-10-07 15:36:41 +0100 | [diff] [blame] | 963 | num); |
| 964 | page += num; |
| 965 | dest += num >> BITS_PER_LEVEL; |
| 966 | } |
Gerd Hoffmann | 8deaf12 | 2017-04-21 11:16:25 +0200 | [diff] [blame] | 967 | } |
| 968 | |
Nicholas Piggin | 86a9ae8 | 2024-03-12 21:14:57 +0100 | [diff] [blame] | 969 | cpu_physical_memory_dirty_bits_cleared(start, length); |
Gerd Hoffmann | 8deaf12 | 2017-04-21 11:16:25 +0200 | [diff] [blame] | 970 | |
Peter Xu | 077874e | 2019-06-03 14:50:51 +0800 | [diff] [blame] | 971 | memory_region_clear_dirty_bitmap(mr, offset, length); |
| 972 | |
Gerd Hoffmann | 8deaf12 | 2017-04-21 11:16:25 +0200 | [diff] [blame] | 973 | return snap; |
| 974 | } |
| 975 | |
| 976 | bool cpu_physical_memory_snapshot_get_dirty(DirtyBitmapSnapshot *snap, |
| 977 | ram_addr_t start, |
| 978 | ram_addr_t length) |
| 979 | { |
| 980 | unsigned long page, end; |
| 981 | |
| 982 | assert(start >= snap->start); |
| 983 | assert(start + length <= snap->end); |
| 984 | |
| 985 | end = TARGET_PAGE_ALIGN(start + length - snap->start) >> TARGET_PAGE_BITS; |
| 986 | page = (start - snap->start) >> TARGET_PAGE_BITS; |
| 987 | |
| 988 | while (page < end) { |
| 989 | if (test_bit(page, snap->dirty)) { |
| 990 | return true; |
| 991 | } |
| 992 | page++; |
| 993 | } |
| 994 | return false; |
| 995 | } |
| 996 | |
Paolo Bonzini | 79e2b9a | 2015-01-21 12:09:14 +0100 | [diff] [blame] | 997 | /* Called from RCU critical section */ |
Andreas Färber | bb0e627 | 2013-09-03 13:32:01 +0200 | [diff] [blame] | 998 | hwaddr memory_region_section_get_iotlb(CPUState *cpu, |
Richard Henderson | 8f5db64 | 2019-09-19 21:09:58 -0700 | [diff] [blame] | 999 | MemoryRegionSection *section) |
Blue Swirl | e554861 | 2012-04-21 13:08:33 +0000 | [diff] [blame] | 1000 | { |
Richard Henderson | 8f5db64 | 2019-09-19 21:09:58 -0700 | [diff] [blame] | 1001 | AddressSpaceDispatch *d = flatview_to_dispatch(section->fv); |
| 1002 | return section - d->map.sections; |
Blue Swirl | e554861 | 2012-04-21 13:08:33 +0000 | [diff] [blame] | 1003 | } |
pbrook | 8da3ff1 | 2008-12-01 18:59:50 +0000 | [diff] [blame] | 1004 | |
Wei Yang | b797ab1 | 2019-03-21 16:25:53 +0800 | [diff] [blame] | 1005 | static int subpage_register(subpage_t *mmio, uint32_t start, uint32_t end, |
| 1006 | uint16_t section); |
Alexey Kardashevskiy | 1662068 | 2017-09-21 18:50:58 +1000 | [diff] [blame] | 1007 | static subpage_t *subpage_init(FlatView *fv, hwaddr base); |
Avi Kivity | 54688b1 | 2012-02-09 17:34:32 +0200 | [diff] [blame] | 1008 | |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 1009 | static uint16_t phys_section_add(PhysPageMap *map, |
| 1010 | MemoryRegionSection *section) |
Avi Kivity | 5312bd8 | 2012-02-12 18:32:55 +0200 | [diff] [blame] | 1011 | { |
Paolo Bonzini | 68f3f65 | 2013-05-07 11:30:23 +0200 | [diff] [blame] | 1012 | /* The physical section number is ORed with a page-aligned |
| 1013 | * pointer to produce the iotlb entries. Thus it should |
| 1014 | * never overflow into the page-aligned value. |
| 1015 | */ |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 1016 | assert(map->sections_nb < TARGET_PAGE_SIZE); |
Paolo Bonzini | 68f3f65 | 2013-05-07 11:30:23 +0200 | [diff] [blame] | 1017 | |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 1018 | if (map->sections_nb == map->sections_nb_alloc) { |
| 1019 | map->sections_nb_alloc = MAX(map->sections_nb_alloc * 2, 16); |
| 1020 | map->sections = g_renew(MemoryRegionSection, map->sections, |
| 1021 | map->sections_nb_alloc); |
Avi Kivity | 5312bd8 | 2012-02-12 18:32:55 +0200 | [diff] [blame] | 1022 | } |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 1023 | map->sections[map->sections_nb] = *section; |
Paolo Bonzini | dfde4e6 | 2013-05-06 10:46:11 +0200 | [diff] [blame] | 1024 | memory_region_ref(section->mr); |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 1025 | return map->sections_nb++; |
Avi Kivity | 5312bd8 | 2012-02-12 18:32:55 +0200 | [diff] [blame] | 1026 | } |
| 1027 | |
Paolo Bonzini | 058bc4b | 2013-06-25 09:30:48 +0200 | [diff] [blame] | 1028 | static void phys_section_destroy(MemoryRegion *mr) |
| 1029 | { |
Don Slutz | 55b4e80 | 2015-11-30 17:11:04 -0500 | [diff] [blame] | 1030 | bool have_sub_page = mr->subpage; |
| 1031 | |
Paolo Bonzini | dfde4e6 | 2013-05-06 10:46:11 +0200 | [diff] [blame] | 1032 | memory_region_unref(mr); |
| 1033 | |
Don Slutz | 55b4e80 | 2015-11-30 17:11:04 -0500 | [diff] [blame] | 1034 | if (have_sub_page) { |
Paolo Bonzini | 058bc4b | 2013-06-25 09:30:48 +0200 | [diff] [blame] | 1035 | subpage_t *subpage = container_of(mr, subpage_t, iomem); |
Peter Crosthwaite | b4fefef | 2014-06-05 23:15:52 -0700 | [diff] [blame] | 1036 | object_unref(OBJECT(&subpage->iomem)); |
Paolo Bonzini | 058bc4b | 2013-06-25 09:30:48 +0200 | [diff] [blame] | 1037 | g_free(subpage); |
| 1038 | } |
| 1039 | } |
| 1040 | |
Paolo Bonzini | 6092666 | 2013-05-29 12:30:26 +0200 | [diff] [blame] | 1041 | static void phys_sections_free(PhysPageMap *map) |
Avi Kivity | 5312bd8 | 2012-02-12 18:32:55 +0200 | [diff] [blame] | 1042 | { |
Paolo Bonzini | 9affd6f | 2013-05-29 12:09:47 +0200 | [diff] [blame] | 1043 | while (map->sections_nb > 0) { |
| 1044 | MemoryRegionSection *section = &map->sections[--map->sections_nb]; |
Paolo Bonzini | 058bc4b | 2013-06-25 09:30:48 +0200 | [diff] [blame] | 1045 | phys_section_destroy(section->mr); |
| 1046 | } |
Paolo Bonzini | 9affd6f | 2013-05-29 12:09:47 +0200 | [diff] [blame] | 1047 | g_free(map->sections); |
| 1048 | g_free(map->nodes); |
Avi Kivity | 5312bd8 | 2012-02-12 18:32:55 +0200 | [diff] [blame] | 1049 | } |
| 1050 | |
Alexey Kardashevskiy | 9950322 | 2017-09-21 18:50:59 +1000 | [diff] [blame] | 1051 | static void register_subpage(FlatView *fv, MemoryRegionSection *section) |
Avi Kivity | 0f0cb16 | 2012-02-13 17:14:32 +0200 | [diff] [blame] | 1052 | { |
Alexey Kardashevskiy | 9950322 | 2017-09-21 18:50:59 +1000 | [diff] [blame] | 1053 | AddressSpaceDispatch *d = flatview_to_dispatch(fv); |
Avi Kivity | 0f0cb16 | 2012-02-13 17:14:32 +0200 | [diff] [blame] | 1054 | subpage_t *subpage; |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 1055 | hwaddr base = section->offset_within_address_space |
Avi Kivity | 0f0cb16 | 2012-02-13 17:14:32 +0200 | [diff] [blame] | 1056 | & TARGET_PAGE_MASK; |
Peter Xu | 003a0cf | 2017-05-15 16:50:57 +0800 | [diff] [blame] | 1057 | MemoryRegionSection *existing = phys_page_find(d, base); |
Avi Kivity | 0f0cb16 | 2012-02-13 17:14:32 +0200 | [diff] [blame] | 1058 | MemoryRegionSection subsection = { |
| 1059 | .offset_within_address_space = base, |
Paolo Bonzini | 052e87b | 2013-05-27 10:08:27 +0200 | [diff] [blame] | 1060 | .size = int128_make64(TARGET_PAGE_SIZE), |
Avi Kivity | 0f0cb16 | 2012-02-13 17:14:32 +0200 | [diff] [blame] | 1061 | }; |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 1062 | hwaddr start, end; |
Avi Kivity | 0f0cb16 | 2012-02-13 17:14:32 +0200 | [diff] [blame] | 1063 | |
Avi Kivity | f3705d5 | 2012-03-08 16:16:34 +0200 | [diff] [blame] | 1064 | assert(existing->mr->subpage || existing->mr == &io_mem_unassigned); |
Avi Kivity | 0f0cb16 | 2012-02-13 17:14:32 +0200 | [diff] [blame] | 1065 | |
Avi Kivity | f3705d5 | 2012-03-08 16:16:34 +0200 | [diff] [blame] | 1066 | if (!(existing->mr->subpage)) { |
Alexey Kardashevskiy | 1662068 | 2017-09-21 18:50:58 +1000 | [diff] [blame] | 1067 | subpage = subpage_init(fv, base); |
| 1068 | subsection.fv = fv; |
Avi Kivity | 0f0cb16 | 2012-02-13 17:14:32 +0200 | [diff] [blame] | 1069 | subsection.mr = &subpage->iomem; |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 1070 | phys_page_set(d, base >> TARGET_PAGE_BITS, 1, |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 1071 | phys_section_add(&d->map, &subsection)); |
Avi Kivity | 0f0cb16 | 2012-02-13 17:14:32 +0200 | [diff] [blame] | 1072 | } else { |
Avi Kivity | f3705d5 | 2012-03-08 16:16:34 +0200 | [diff] [blame] | 1073 | subpage = container_of(existing->mr, subpage_t, iomem); |
Avi Kivity | 0f0cb16 | 2012-02-13 17:14:32 +0200 | [diff] [blame] | 1074 | } |
| 1075 | start = section->offset_within_address_space & ~TARGET_PAGE_MASK; |
Paolo Bonzini | 052e87b | 2013-05-27 10:08:27 +0200 | [diff] [blame] | 1076 | end = start + int128_get64(section->size) - 1; |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 1077 | subpage_register(subpage, start, end, |
| 1078 | phys_section_add(&d->map, section)); |
Avi Kivity | 0f0cb16 | 2012-02-13 17:14:32 +0200 | [diff] [blame] | 1079 | } |
| 1080 | |
| 1081 | |
Alexey Kardashevskiy | 9950322 | 2017-09-21 18:50:59 +1000 | [diff] [blame] | 1082 | static void register_multipage(FlatView *fv, |
Paolo Bonzini | 052e87b | 2013-05-27 10:08:27 +0200 | [diff] [blame] | 1083 | MemoryRegionSection *section) |
bellard | 33417e7 | 2003-08-10 21:47:01 +0000 | [diff] [blame] | 1084 | { |
Alexey Kardashevskiy | 9950322 | 2017-09-21 18:50:59 +1000 | [diff] [blame] | 1085 | AddressSpaceDispatch *d = flatview_to_dispatch(fv); |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 1086 | hwaddr start_addr = section->offset_within_address_space; |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 1087 | uint16_t section_index = phys_section_add(&d->map, section); |
Paolo Bonzini | 052e87b | 2013-05-27 10:08:27 +0200 | [diff] [blame] | 1088 | uint64_t num_pages = int128_get64(int128_rshift(section->size, |
| 1089 | TARGET_PAGE_BITS)); |
Avi Kivity | dd81124 | 2012-01-02 12:17:03 +0200 | [diff] [blame] | 1090 | |
Paolo Bonzini | 733d5ef | 2013-05-27 10:47:10 +0200 | [diff] [blame] | 1091 | assert(num_pages); |
| 1092 | phys_page_set(d, start_addr >> TARGET_PAGE_BITS, num_pages, section_index); |
bellard | 33417e7 | 2003-08-10 21:47:01 +0000 | [diff] [blame] | 1093 | } |
| 1094 | |
Wei Yang | 494d199 | 2019-03-11 13:42:52 +0800 | [diff] [blame] | 1095 | /* |
| 1096 | * The range in *section* may look like this: |
| 1097 | * |
| 1098 | * |s|PPPPPPP|s| |
| 1099 | * |
| 1100 | * where s stands for subpage and P for page. |
| 1101 | */ |
Alexey Kardashevskiy | 8629d3f | 2017-09-21 18:51:00 +1000 | [diff] [blame] | 1102 | void flatview_add_to_dispatch(FlatView *fv, MemoryRegionSection *section) |
Avi Kivity | 0f0cb16 | 2012-02-13 17:14:32 +0200 | [diff] [blame] | 1103 | { |
Wei Yang | 494d199 | 2019-03-11 13:42:52 +0800 | [diff] [blame] | 1104 | MemoryRegionSection remain = *section; |
Paolo Bonzini | 052e87b | 2013-05-27 10:08:27 +0200 | [diff] [blame] | 1105 | Int128 page_size = int128_make64(TARGET_PAGE_SIZE); |
Avi Kivity | 0f0cb16 | 2012-02-13 17:14:32 +0200 | [diff] [blame] | 1106 | |
Wei Yang | 494d199 | 2019-03-11 13:42:52 +0800 | [diff] [blame] | 1107 | /* register first subpage */ |
| 1108 | if (remain.offset_within_address_space & ~TARGET_PAGE_MASK) { |
| 1109 | uint64_t left = TARGET_PAGE_ALIGN(remain.offset_within_address_space) |
| 1110 | - remain.offset_within_address_space; |
Paolo Bonzini | 733d5ef | 2013-05-27 10:47:10 +0200 | [diff] [blame] | 1111 | |
Wei Yang | 494d199 | 2019-03-11 13:42:52 +0800 | [diff] [blame] | 1112 | MemoryRegionSection now = remain; |
Paolo Bonzini | 052e87b | 2013-05-27 10:08:27 +0200 | [diff] [blame] | 1113 | now.size = int128_min(int128_make64(left), now.size); |
Alexey Kardashevskiy | 9950322 | 2017-09-21 18:50:59 +1000 | [diff] [blame] | 1114 | register_subpage(fv, &now); |
Wei Yang | 494d199 | 2019-03-11 13:42:52 +0800 | [diff] [blame] | 1115 | if (int128_eq(remain.size, now.size)) { |
| 1116 | return; |
| 1117 | } |
Paolo Bonzini | 052e87b | 2013-05-27 10:08:27 +0200 | [diff] [blame] | 1118 | remain.size = int128_sub(remain.size, now.size); |
| 1119 | remain.offset_within_address_space += int128_get64(now.size); |
| 1120 | remain.offset_within_region += int128_get64(now.size); |
Avi Kivity | 0f0cb16 | 2012-02-13 17:14:32 +0200 | [diff] [blame] | 1121 | } |
Wei Yang | 494d199 | 2019-03-11 13:42:52 +0800 | [diff] [blame] | 1122 | |
| 1123 | /* register whole pages */ |
| 1124 | if (int128_ge(remain.size, page_size)) { |
| 1125 | MemoryRegionSection now = remain; |
| 1126 | now.size = int128_and(now.size, int128_neg(page_size)); |
| 1127 | register_multipage(fv, &now); |
| 1128 | if (int128_eq(remain.size, now.size)) { |
| 1129 | return; |
| 1130 | } |
| 1131 | remain.size = int128_sub(remain.size, now.size); |
| 1132 | remain.offset_within_address_space += int128_get64(now.size); |
| 1133 | remain.offset_within_region += int128_get64(now.size); |
| 1134 | } |
| 1135 | |
| 1136 | /* register last subpage */ |
| 1137 | register_subpage(fv, &remain); |
Avi Kivity | 0f0cb16 | 2012-02-13 17:14:32 +0200 | [diff] [blame] | 1138 | } |
| 1139 | |
Sheng Yang | 62a2744 | 2010-01-26 19:21:16 +0800 | [diff] [blame] | 1140 | void qemu_flush_coalesced_mmio_buffer(void) |
| 1141 | { |
| 1142 | if (kvm_enabled()) |
| 1143 | kvm_flush_coalesced_mmio_buffer(); |
| 1144 | } |
| 1145 | |
Umesh Deshpande | b2a8658 | 2011-08-17 00:01:33 -0700 | [diff] [blame] | 1146 | void qemu_mutex_lock_ramlist(void) |
| 1147 | { |
| 1148 | qemu_mutex_lock(&ram_list.mutex); |
| 1149 | } |
| 1150 | |
| 1151 | void qemu_mutex_unlock_ramlist(void) |
| 1152 | { |
| 1153 | qemu_mutex_unlock(&ram_list.mutex); |
| 1154 | } |
| 1155 | |
Daniel P. Berrangé | ca411b7 | 2021-09-08 10:35:43 +0100 | [diff] [blame] | 1156 | GString *ram_block_format(void) |
Peter Xu | be9b23c | 2017-05-12 12:17:41 +0800 | [diff] [blame] | 1157 | { |
| 1158 | RAMBlock *block; |
| 1159 | char *psize; |
Daniel P. Berrangé | ca411b7 | 2021-09-08 10:35:43 +0100 | [diff] [blame] | 1160 | GString *buf = g_string_new(""); |
Peter Xu | be9b23c | 2017-05-12 12:17:41 +0800 | [diff] [blame] | 1161 | |
Dr. David Alan Gilbert | 694ea27 | 2019-10-07 15:36:41 +0100 | [diff] [blame] | 1162 | RCU_READ_LOCK_GUARD(); |
Ted Chen | dbc6ae9 | 2022-12-05 20:07:12 +0800 | [diff] [blame] | 1163 | g_string_append_printf(buf, "%24s %8s %18s %18s %18s %18s %3s\n", |
| 1164 | "Block Name", "PSize", "Offset", "Used", "Total", |
| 1165 | "HVA", "RO"); |
| 1166 | |
Peter Xu | be9b23c | 2017-05-12 12:17:41 +0800 | [diff] [blame] | 1167 | RAMBLOCK_FOREACH(block) { |
| 1168 | psize = size_to_str(block->page_size); |
Daniel P. Berrangé | ca411b7 | 2021-09-08 10:35:43 +0100 | [diff] [blame] | 1169 | g_string_append_printf(buf, "%24s %8s 0x%016" PRIx64 " 0x%016" PRIx64 |
Ted Chen | dbc6ae9 | 2022-12-05 20:07:12 +0800 | [diff] [blame] | 1170 | " 0x%016" PRIx64 " 0x%016" PRIx64 " %3s\n", |
| 1171 | block->idstr, psize, |
Daniel P. Berrangé | ca411b7 | 2021-09-08 10:35:43 +0100 | [diff] [blame] | 1172 | (uint64_t)block->offset, |
| 1173 | (uint64_t)block->used_length, |
Ted Chen | dbc6ae9 | 2022-12-05 20:07:12 +0800 | [diff] [blame] | 1174 | (uint64_t)block->max_length, |
| 1175 | (uint64_t)(uintptr_t)block->host, |
| 1176 | block->mr->readonly ? "ro" : "rw"); |
| 1177 | |
Peter Xu | be9b23c | 2017-05-12 12:17:41 +0800 | [diff] [blame] | 1178 | g_free(psize); |
| 1179 | } |
Daniel P. Berrangé | ca411b7 | 2021-09-08 10:35:43 +0100 | [diff] [blame] | 1180 | |
| 1181 | return buf; |
Peter Xu | be9b23c | 2017-05-12 12:17:41 +0800 | [diff] [blame] | 1182 | } |
| 1183 | |
David Hildenbrand | 905b7ee | 2019-04-17 13:31:43 +0200 | [diff] [blame] | 1184 | static int find_min_backend_pagesize(Object *obj, void *opaque) |
Alexey Kardashevskiy | 9c60766 | 2017-03-02 13:36:11 +1100 | [diff] [blame] | 1185 | { |
Alexey Kardashevskiy | 9c60766 | 2017-03-02 13:36:11 +1100 | [diff] [blame] | 1186 | long *hpsize_min = opaque; |
| 1187 | |
| 1188 | if (object_dynamic_cast(obj, TYPE_MEMORY_BACKEND)) { |
David Gibson | 7d5489e | 2019-03-26 14:33:33 +1100 | [diff] [blame] | 1189 | HostMemoryBackend *backend = MEMORY_BACKEND(obj); |
| 1190 | long hpsize = host_memory_backend_pagesize(backend); |
David Gibson | 2b10808 | 2018-04-03 15:05:45 +1000 | [diff] [blame] | 1191 | |
David Gibson | 7d5489e | 2019-03-26 14:33:33 +1100 | [diff] [blame] | 1192 | if (host_memory_backend_is_mapped(backend) && (hpsize < *hpsize_min)) { |
David Gibson | 0de6e2a | 2018-04-03 14:55:11 +1000 | [diff] [blame] | 1193 | *hpsize_min = hpsize; |
Alexey Kardashevskiy | 9c60766 | 2017-03-02 13:36:11 +1100 | [diff] [blame] | 1194 | } |
| 1195 | } |
| 1196 | |
| 1197 | return 0; |
| 1198 | } |
| 1199 | |
David Hildenbrand | 905b7ee | 2019-04-17 13:31:43 +0200 | [diff] [blame] | 1200 | static int find_max_backend_pagesize(Object *obj, void *opaque) |
| 1201 | { |
| 1202 | long *hpsize_max = opaque; |
| 1203 | |
| 1204 | if (object_dynamic_cast(obj, TYPE_MEMORY_BACKEND)) { |
| 1205 | HostMemoryBackend *backend = MEMORY_BACKEND(obj); |
| 1206 | long hpsize = host_memory_backend_pagesize(backend); |
| 1207 | |
| 1208 | if (host_memory_backend_is_mapped(backend) && (hpsize > *hpsize_max)) { |
| 1209 | *hpsize_max = hpsize; |
| 1210 | } |
| 1211 | } |
| 1212 | |
| 1213 | return 0; |
| 1214 | } |
| 1215 | |
| 1216 | /* |
| 1217 | * TODO: We assume right now that all mapped host memory backends are |
| 1218 | * used as RAM, however some might be used for different purposes. |
| 1219 | */ |
| 1220 | long qemu_minrampagesize(void) |
Alexey Kardashevskiy | 9c60766 | 2017-03-02 13:36:11 +1100 | [diff] [blame] | 1221 | { |
| 1222 | long hpsize = LONG_MAX; |
Igor Mammedov | ad1172d | 2020-02-19 11:09:47 -0500 | [diff] [blame] | 1223 | Object *memdev_root = object_resolve_path("/objects", NULL); |
Alexey Kardashevskiy | 9c60766 | 2017-03-02 13:36:11 +1100 | [diff] [blame] | 1224 | |
Igor Mammedov | ad1172d | 2020-02-19 11:09:47 -0500 | [diff] [blame] | 1225 | object_child_foreach(memdev_root, find_min_backend_pagesize, &hpsize); |
Alexey Kardashevskiy | 9c60766 | 2017-03-02 13:36:11 +1100 | [diff] [blame] | 1226 | return hpsize; |
| 1227 | } |
David Hildenbrand | 905b7ee | 2019-04-17 13:31:43 +0200 | [diff] [blame] | 1228 | |
| 1229 | long qemu_maxrampagesize(void) |
| 1230 | { |
Igor Mammedov | ad1172d | 2020-02-19 11:09:47 -0500 | [diff] [blame] | 1231 | long pagesize = 0; |
David Hildenbrand | 905b7ee | 2019-04-17 13:31:43 +0200 | [diff] [blame] | 1232 | Object *memdev_root = object_resolve_path("/objects", NULL); |
| 1233 | |
Igor Mammedov | ad1172d | 2020-02-19 11:09:47 -0500 | [diff] [blame] | 1234 | object_child_foreach(memdev_root, find_max_backend_pagesize, &pagesize); |
David Hildenbrand | 905b7ee | 2019-04-17 13:31:43 +0200 | [diff] [blame] | 1235 | return pagesize; |
| 1236 | } |
Alexey Kardashevskiy | 9c60766 | 2017-03-02 13:36:11 +1100 | [diff] [blame] | 1237 | |
Hikaru Nishida | d5dbde4 | 2018-09-24 21:32:05 +0900 | [diff] [blame] | 1238 | #ifdef CONFIG_POSIX |
Haozhong Zhang | d6af99c | 2016-10-27 12:22:58 +0800 | [diff] [blame] | 1239 | static int64_t get_file_size(int fd) |
| 1240 | { |
Stefan Hajnoczi | 72d41eb | 2019-08-30 10:30:56 +0100 | [diff] [blame] | 1241 | int64_t size; |
| 1242 | #if defined(__linux__) |
| 1243 | struct stat st; |
| 1244 | |
| 1245 | if (fstat(fd, &st) < 0) { |
| 1246 | return -errno; |
| 1247 | } |
| 1248 | |
| 1249 | /* Special handling for devdax character devices */ |
| 1250 | if (S_ISCHR(st.st_mode)) { |
| 1251 | g_autofree char *subsystem_path = NULL; |
| 1252 | g_autofree char *subsystem = NULL; |
| 1253 | |
| 1254 | subsystem_path = g_strdup_printf("/sys/dev/char/%d:%d/subsystem", |
| 1255 | major(st.st_rdev), minor(st.st_rdev)); |
| 1256 | subsystem = g_file_read_link(subsystem_path, NULL); |
| 1257 | |
| 1258 | if (subsystem && g_str_has_suffix(subsystem, "/dax")) { |
| 1259 | g_autofree char *size_path = NULL; |
| 1260 | g_autofree char *size_str = NULL; |
| 1261 | |
| 1262 | size_path = g_strdup_printf("/sys/dev/char/%d:%d/size", |
| 1263 | major(st.st_rdev), minor(st.st_rdev)); |
| 1264 | |
| 1265 | if (g_file_get_contents(size_path, &size_str, NULL, NULL)) { |
| 1266 | return g_ascii_strtoll(size_str, NULL, 0); |
| 1267 | } |
| 1268 | } |
| 1269 | } |
| 1270 | #endif /* defined(__linux__) */ |
| 1271 | |
| 1272 | /* st.st_size may be zero for special files yet lseek(2) works */ |
| 1273 | size = lseek(fd, 0, SEEK_END); |
Haozhong Zhang | d6af99c | 2016-10-27 12:22:58 +0800 | [diff] [blame] | 1274 | if (size < 0) { |
| 1275 | return -errno; |
| 1276 | } |
| 1277 | return size; |
| 1278 | } |
| 1279 | |
Jingqi Liu | ce317be | 2020-04-29 16:50:09 +0800 | [diff] [blame] | 1280 | static int64_t get_file_align(int fd) |
| 1281 | { |
| 1282 | int64_t align = -1; |
| 1283 | #if defined(__linux__) && defined(CONFIG_LIBDAXCTL) |
| 1284 | struct stat st; |
| 1285 | |
| 1286 | if (fstat(fd, &st) < 0) { |
| 1287 | return -errno; |
| 1288 | } |
| 1289 | |
| 1290 | /* Special handling for devdax character devices */ |
| 1291 | if (S_ISCHR(st.st_mode)) { |
| 1292 | g_autofree char *path = NULL; |
| 1293 | g_autofree char *rpath = NULL; |
| 1294 | struct daxctl_ctx *ctx; |
| 1295 | struct daxctl_region *region; |
| 1296 | int rc = 0; |
| 1297 | |
| 1298 | path = g_strdup_printf("/sys/dev/char/%d:%d", |
| 1299 | major(st.st_rdev), minor(st.st_rdev)); |
| 1300 | rpath = realpath(path, NULL); |
Peter Maydell | 8efdb7b | 2021-08-12 16:15:25 +0100 | [diff] [blame] | 1301 | if (!rpath) { |
| 1302 | return -errno; |
| 1303 | } |
Jingqi Liu | ce317be | 2020-04-29 16:50:09 +0800 | [diff] [blame] | 1304 | |
| 1305 | rc = daxctl_new(&ctx); |
| 1306 | if (rc) { |
| 1307 | return -1; |
| 1308 | } |
| 1309 | |
| 1310 | daxctl_region_foreach(ctx, region) { |
| 1311 | if (strstr(rpath, daxctl_region_get_path(region))) { |
| 1312 | align = daxctl_region_get_align(region); |
| 1313 | break; |
| 1314 | } |
| 1315 | } |
| 1316 | daxctl_unref(ctx); |
| 1317 | } |
| 1318 | #endif /* defined(__linux__) && defined(CONFIG_LIBDAXCTL) */ |
| 1319 | |
| 1320 | return align; |
| 1321 | } |
| 1322 | |
Marc-André Lureau | 8d37b03 | 2017-06-02 18:12:22 +0400 | [diff] [blame] | 1323 | static int file_ram_open(const char *path, |
| 1324 | const char *region_name, |
Stefan Hajnoczi | 369d6dc | 2021-01-04 17:13:18 +0000 | [diff] [blame] | 1325 | bool readonly, |
David Hildenbrand | 4d6b23f | 2023-09-06 14:04:58 +0200 | [diff] [blame] | 1326 | bool *created) |
Marcelo Tosatti | c902760 | 2010-03-01 20:25:08 -0300 | [diff] [blame] | 1327 | { |
| 1328 | char *filename; |
Peter Feiner | 8ca761f | 2013-03-04 13:54:25 -0500 | [diff] [blame] | 1329 | char *sanitized_name; |
| 1330 | char *c; |
Paolo Bonzini | 5c3ece7 | 2016-03-17 15:53:13 +0100 | [diff] [blame] | 1331 | int fd = -1; |
Marcelo Tosatti | c902760 | 2010-03-01 20:25:08 -0300 | [diff] [blame] | 1332 | |
Marc-André Lureau | 8d37b03 | 2017-06-02 18:12:22 +0400 | [diff] [blame] | 1333 | *created = false; |
Markus Armbruster | fd97fd4 | 2016-03-07 20:25:13 +0100 | [diff] [blame] | 1334 | for (;;) { |
Stefan Hajnoczi | 369d6dc | 2021-01-04 17:13:18 +0000 | [diff] [blame] | 1335 | fd = open(path, readonly ? O_RDONLY : O_RDWR); |
Markus Armbruster | fd97fd4 | 2016-03-07 20:25:13 +0100 | [diff] [blame] | 1336 | if (fd >= 0) { |
David Hildenbrand | ca01f1b | 2023-09-06 14:04:59 +0200 | [diff] [blame] | 1337 | /* |
| 1338 | * open(O_RDONLY) won't fail with EISDIR. Check manually if we |
| 1339 | * opened a directory and fail similarly to how we fail ENOENT |
| 1340 | * in readonly mode. Note that mkstemp() would imply O_RDWR. |
| 1341 | */ |
| 1342 | if (readonly) { |
| 1343 | struct stat file_stat; |
| 1344 | |
| 1345 | if (fstat(fd, &file_stat)) { |
| 1346 | close(fd); |
| 1347 | if (errno == EINTR) { |
| 1348 | continue; |
| 1349 | } |
| 1350 | return -errno; |
| 1351 | } else if (S_ISDIR(file_stat.st_mode)) { |
| 1352 | close(fd); |
| 1353 | return -EISDIR; |
| 1354 | } |
| 1355 | } |
Markus Armbruster | fd97fd4 | 2016-03-07 20:25:13 +0100 | [diff] [blame] | 1356 | /* @path names an existing file, use it */ |
| 1357 | break; |
| 1358 | } |
| 1359 | if (errno == ENOENT) { |
David Hildenbrand | 4d6b23f | 2023-09-06 14:04:58 +0200 | [diff] [blame] | 1360 | if (readonly) { |
| 1361 | /* Refuse to create new, readonly files. */ |
| 1362 | return -ENOENT; |
| 1363 | } |
Markus Armbruster | fd97fd4 | 2016-03-07 20:25:13 +0100 | [diff] [blame] | 1364 | /* @path names a file that doesn't exist, create it */ |
| 1365 | fd = open(path, O_RDWR | O_CREAT | O_EXCL, 0644); |
| 1366 | if (fd >= 0) { |
Marc-André Lureau | 8d37b03 | 2017-06-02 18:12:22 +0400 | [diff] [blame] | 1367 | *created = true; |
Markus Armbruster | fd97fd4 | 2016-03-07 20:25:13 +0100 | [diff] [blame] | 1368 | break; |
| 1369 | } |
| 1370 | } else if (errno == EISDIR) { |
| 1371 | /* @path names a directory, create a file there */ |
| 1372 | /* Make name safe to use with mkstemp by replacing '/' with '_'. */ |
Marc-André Lureau | 8d37b03 | 2017-06-02 18:12:22 +0400 | [diff] [blame] | 1373 | sanitized_name = g_strdup(region_name); |
Markus Armbruster | fd97fd4 | 2016-03-07 20:25:13 +0100 | [diff] [blame] | 1374 | for (c = sanitized_name; *c != '\0'; c++) { |
| 1375 | if (*c == '/') { |
| 1376 | *c = '_'; |
| 1377 | } |
| 1378 | } |
| 1379 | |
| 1380 | filename = g_strdup_printf("%s/qemu_back_mem.%s.XXXXXX", path, |
| 1381 | sanitized_name); |
| 1382 | g_free(sanitized_name); |
| 1383 | |
| 1384 | fd = mkstemp(filename); |
| 1385 | if (fd >= 0) { |
| 1386 | unlink(filename); |
| 1387 | g_free(filename); |
| 1388 | break; |
| 1389 | } |
| 1390 | g_free(filename); |
| 1391 | } |
| 1392 | if (errno != EEXIST && errno != EINTR) { |
David Hildenbrand | 4d6b23f | 2023-09-06 14:04:58 +0200 | [diff] [blame] | 1393 | return -errno; |
Markus Armbruster | fd97fd4 | 2016-03-07 20:25:13 +0100 | [diff] [blame] | 1394 | } |
| 1395 | /* |
| 1396 | * Try again on EINTR and EEXIST. The latter happens when |
| 1397 | * something else creates the file between our two open(). |
| 1398 | */ |
| 1399 | } |
| 1400 | |
Marc-André Lureau | 8d37b03 | 2017-06-02 18:12:22 +0400 | [diff] [blame] | 1401 | return fd; |
| 1402 | } |
| 1403 | |
| 1404 | static void *file_ram_alloc(RAMBlock *block, |
| 1405 | ram_addr_t memory, |
| 1406 | int fd, |
| 1407 | bool truncate, |
Jagannathan Raman | 44a4ff3 | 2021-01-29 11:46:04 -0500 | [diff] [blame] | 1408 | off_t offset, |
Marc-André Lureau | 8d37b03 | 2017-06-02 18:12:22 +0400 | [diff] [blame] | 1409 | Error **errp) |
| 1410 | { |
David Hildenbrand | b444f5c | 2021-05-10 13:43:20 +0200 | [diff] [blame] | 1411 | uint32_t qemu_map_flags; |
Marc-André Lureau | 8d37b03 | 2017-06-02 18:12:22 +0400 | [diff] [blame] | 1412 | void *area; |
| 1413 | |
Dr. David Alan Gilbert | 863e962 | 2016-09-29 20:09:37 +0100 | [diff] [blame] | 1414 | block->page_size = qemu_fd_getpagesize(fd); |
Haozhong Zhang | 9837684 | 2017-12-11 15:28:04 +0800 | [diff] [blame] | 1415 | if (block->mr->align % block->page_size) { |
| 1416 | error_setg(errp, "alignment 0x%" PRIx64 |
| 1417 | " must be multiples of page size 0x%zx", |
| 1418 | block->mr->align, block->page_size); |
| 1419 | return NULL; |
David Hildenbrand | 61362b7 | 2018-06-07 17:47:05 +0200 | [diff] [blame] | 1420 | } else if (block->mr->align && !is_power_of_2(block->mr->align)) { |
| 1421 | error_setg(errp, "alignment 0x%" PRIx64 |
| 1422 | " must be a power of two", block->mr->align); |
| 1423 | return NULL; |
Alexander Graf | 4b870dc | 2023-04-03 22:14:21 +0000 | [diff] [blame] | 1424 | } else if (offset % block->page_size) { |
| 1425 | error_setg(errp, "offset 0x%" PRIx64 |
| 1426 | " must be multiples of page size 0x%zx", |
| 1427 | offset, block->page_size); |
| 1428 | return NULL; |
Haozhong Zhang | 9837684 | 2017-12-11 15:28:04 +0800 | [diff] [blame] | 1429 | } |
| 1430 | block->mr->align = MAX(block->page_size, block->mr->align); |
Haozhong Zhang | 8360668 | 2016-10-24 20:49:37 +0800 | [diff] [blame] | 1431 | #if defined(__s390x__) |
| 1432 | if (kvm_enabled()) { |
| 1433 | block->mr->align = MAX(block->mr->align, QEMU_VMALLOC_ALIGN); |
| 1434 | } |
| 1435 | #endif |
Marcelo Tosatti | c902760 | 2010-03-01 20:25:08 -0300 | [diff] [blame] | 1436 | |
Dr. David Alan Gilbert | 863e962 | 2016-09-29 20:09:37 +0100 | [diff] [blame] | 1437 | if (memory < block->page_size) { |
Hu Tao | 557529d | 2014-09-09 13:28:00 +0800 | [diff] [blame] | 1438 | error_setg(errp, "memory size 0x" RAM_ADDR_FMT " must be equal to " |
Dr. David Alan Gilbert | 863e962 | 2016-09-29 20:09:37 +0100 | [diff] [blame] | 1439 | "or larger than page size 0x%zx", |
| 1440 | memory, block->page_size); |
Marc-André Lureau | 8d37b03 | 2017-06-02 18:12:22 +0400 | [diff] [blame] | 1441 | return NULL; |
Haozhong Zhang | 1775f11 | 2016-11-02 09:05:51 +0800 | [diff] [blame] | 1442 | } |
| 1443 | |
Dr. David Alan Gilbert | 863e962 | 2016-09-29 20:09:37 +0100 | [diff] [blame] | 1444 | memory = ROUND_UP(memory, block->page_size); |
Marcelo Tosatti | c902760 | 2010-03-01 20:25:08 -0300 | [diff] [blame] | 1445 | |
| 1446 | /* |
| 1447 | * ftruncate is not supported by hugetlbfs in older |
| 1448 | * hosts, so don't bother bailing out on errors. |
| 1449 | * If anything goes wrong with it under other filesystems, |
| 1450 | * mmap will fail. |
Haozhong Zhang | d6af99c | 2016-10-27 12:22:58 +0800 | [diff] [blame] | 1451 | * |
| 1452 | * Do not truncate the non-empty backend file to avoid corrupting |
| 1453 | * the existing data in the file. Disabling shrinking is not |
| 1454 | * enough. For example, the current vNVDIMM implementation stores |
| 1455 | * the guest NVDIMM labels at the end of the backend file. If the |
| 1456 | * backend file is later extended, QEMU will not be able to find |
| 1457 | * those labels. Therefore, extending the non-empty backend file |
| 1458 | * is disabled as well. |
Marcelo Tosatti | c902760 | 2010-03-01 20:25:08 -0300 | [diff] [blame] | 1459 | */ |
Alexander Graf | 4b870dc | 2023-04-03 22:14:21 +0000 | [diff] [blame] | 1460 | if (truncate && ftruncate(fd, offset + memory)) { |
Yoshiaki Tamura | 9742bf2 | 2010-08-18 13:30:13 +0900 | [diff] [blame] | 1461 | perror("ftruncate"); |
Paolo Bonzini | 7f56e74 | 2014-05-14 17:43:20 +0800 | [diff] [blame] | 1462 | } |
Marcelo Tosatti | c902760 | 2010-03-01 20:25:08 -0300 | [diff] [blame] | 1463 | |
David Hildenbrand | 5c52a21 | 2023-09-06 14:04:54 +0200 | [diff] [blame] | 1464 | qemu_map_flags = (block->flags & RAM_READONLY) ? QEMU_MAP_READONLY : 0; |
David Hildenbrand | b444f5c | 2021-05-10 13:43:20 +0200 | [diff] [blame] | 1465 | qemu_map_flags |= (block->flags & RAM_SHARED) ? QEMU_MAP_SHARED : 0; |
| 1466 | qemu_map_flags |= (block->flags & RAM_PMEM) ? QEMU_MAP_SYNC : 0; |
David Hildenbrand | 8dbe22c | 2021-05-10 13:43:21 +0200 | [diff] [blame] | 1467 | qemu_map_flags |= (block->flags & RAM_NORESERVE) ? QEMU_MAP_NORESERVE : 0; |
David Hildenbrand | b444f5c | 2021-05-10 13:43:20 +0200 | [diff] [blame] | 1468 | area = qemu_ram_mmap(fd, memory, block->mr->align, qemu_map_flags, offset); |
Marcelo Tosatti | c902760 | 2010-03-01 20:25:08 -0300 | [diff] [blame] | 1469 | if (area == MAP_FAILED) { |
Paolo Bonzini | 7f56e74 | 2014-05-14 17:43:20 +0800 | [diff] [blame] | 1470 | error_setg_errno(errp, errno, |
Markus Armbruster | fd97fd4 | 2016-03-07 20:25:13 +0100 | [diff] [blame] | 1471 | "unable to map backing store for guest RAM"); |
Marc-André Lureau | 8d37b03 | 2017-06-02 18:12:22 +0400 | [diff] [blame] | 1472 | return NULL; |
Marcelo Tosatti | c902760 | 2010-03-01 20:25:08 -0300 | [diff] [blame] | 1473 | } |
Marcelo Tosatti | ef36fa1 | 2013-10-28 18:51:46 -0200 | [diff] [blame] | 1474 | |
Alex Williamson | 04b1665 | 2010-07-02 11:13:17 -0600 | [diff] [blame] | 1475 | block->fd = fd; |
Alexander Graf | 4b870dc | 2023-04-03 22:14:21 +0000 | [diff] [blame] | 1476 | block->fd_offset = offset; |
Marcelo Tosatti | c902760 | 2010-03-01 20:25:08 -0300 | [diff] [blame] | 1477 | return area; |
| 1478 | } |
| 1479 | #endif |
| 1480 | |
Dr. David Alan Gilbert | 154cc9e | 2018-01-05 17:01:37 +0000 | [diff] [blame] | 1481 | /* Allocate space within the ram_addr_t space that governs the |
| 1482 | * dirty bitmaps. |
| 1483 | * Called with the ramlist lock held. |
| 1484 | */ |
Alex Williamson | d17b528 | 2010-06-25 11:08:38 -0600 | [diff] [blame] | 1485 | static ram_addr_t find_ram_offset(ram_addr_t size) |
| 1486 | { |
Alex Williamson | 04b1665 | 2010-07-02 11:13:17 -0600 | [diff] [blame] | 1487 | RAMBlock *block, *next_block; |
Alex Williamson | 3e837b2 | 2011-10-31 08:54:09 -0600 | [diff] [blame] | 1488 | ram_addr_t offset = RAM_ADDR_MAX, mingap = RAM_ADDR_MAX; |
Alex Williamson | 04b1665 | 2010-07-02 11:13:17 -0600 | [diff] [blame] | 1489 | |
Stefan Hajnoczi | 49cd9ac | 2013-03-11 10:20:21 +0100 | [diff] [blame] | 1490 | assert(size != 0); /* it would hand out same offset multiple times */ |
| 1491 | |
Mike Day | 0dc3f44 | 2013-09-05 14:41:35 -0400 | [diff] [blame] | 1492 | if (QLIST_EMPTY_RCU(&ram_list.blocks)) { |
Alex Williamson | 04b1665 | 2010-07-02 11:13:17 -0600 | [diff] [blame] | 1493 | return 0; |
Mike Day | 0d53d9f | 2015-01-21 13:45:24 +0100 | [diff] [blame] | 1494 | } |
Alex Williamson | 04b1665 | 2010-07-02 11:13:17 -0600 | [diff] [blame] | 1495 | |
Peter Xu | 99e1558 | 2017-05-12 12:17:39 +0800 | [diff] [blame] | 1496 | RAMBLOCK_FOREACH(block) { |
Dr. David Alan Gilbert | 154cc9e | 2018-01-05 17:01:37 +0000 | [diff] [blame] | 1497 | ram_addr_t candidate, next = RAM_ADDR_MAX; |
Alex Williamson | 04b1665 | 2010-07-02 11:13:17 -0600 | [diff] [blame] | 1498 | |
Dr. David Alan Gilbert | 801110a | 2018-01-05 17:01:38 +0000 | [diff] [blame] | 1499 | /* Align blocks to start on a 'long' in the bitmap |
| 1500 | * which makes the bitmap sync'ing take the fast path. |
| 1501 | */ |
Dr. David Alan Gilbert | 154cc9e | 2018-01-05 17:01:37 +0000 | [diff] [blame] | 1502 | candidate = block->offset + block->max_length; |
Dr. David Alan Gilbert | 801110a | 2018-01-05 17:01:38 +0000 | [diff] [blame] | 1503 | candidate = ROUND_UP(candidate, BITS_PER_LONG << TARGET_PAGE_BITS); |
Alex Williamson | 04b1665 | 2010-07-02 11:13:17 -0600 | [diff] [blame] | 1504 | |
Dr. David Alan Gilbert | 154cc9e | 2018-01-05 17:01:37 +0000 | [diff] [blame] | 1505 | /* Search for the closest following block |
| 1506 | * and find the gap. |
| 1507 | */ |
Peter Xu | 99e1558 | 2017-05-12 12:17:39 +0800 | [diff] [blame] | 1508 | RAMBLOCK_FOREACH(next_block) { |
Dr. David Alan Gilbert | 154cc9e | 2018-01-05 17:01:37 +0000 | [diff] [blame] | 1509 | if (next_block->offset >= candidate) { |
Alex Williamson | 04b1665 | 2010-07-02 11:13:17 -0600 | [diff] [blame] | 1510 | next = MIN(next, next_block->offset); |
| 1511 | } |
| 1512 | } |
Dr. David Alan Gilbert | 154cc9e | 2018-01-05 17:01:37 +0000 | [diff] [blame] | 1513 | |
| 1514 | /* If it fits remember our place and remember the size |
| 1515 | * of gap, but keep going so that we might find a smaller |
| 1516 | * gap to fill so avoiding fragmentation. |
| 1517 | */ |
| 1518 | if (next - candidate >= size && next - candidate < mingap) { |
| 1519 | offset = candidate; |
| 1520 | mingap = next - candidate; |
Alex Williamson | 04b1665 | 2010-07-02 11:13:17 -0600 | [diff] [blame] | 1521 | } |
Dr. David Alan Gilbert | 154cc9e | 2018-01-05 17:01:37 +0000 | [diff] [blame] | 1522 | |
| 1523 | trace_find_ram_offset_loop(size, candidate, offset, next, mingap); |
Alex Williamson | 04b1665 | 2010-07-02 11:13:17 -0600 | [diff] [blame] | 1524 | } |
Alex Williamson | 3e837b2 | 2011-10-31 08:54:09 -0600 | [diff] [blame] | 1525 | |
| 1526 | if (offset == RAM_ADDR_MAX) { |
| 1527 | fprintf(stderr, "Failed to find gap of requested size: %" PRIu64 "\n", |
| 1528 | (uint64_t)size); |
| 1529 | abort(); |
| 1530 | } |
| 1531 | |
Dr. David Alan Gilbert | 154cc9e | 2018-01-05 17:01:37 +0000 | [diff] [blame] | 1532 | trace_find_ram_offset(size, offset); |
| 1533 | |
Alex Williamson | 04b1665 | 2010-07-02 11:13:17 -0600 | [diff] [blame] | 1534 | return offset; |
| 1535 | } |
| 1536 | |
Jason Baron | ddb97f1 | 2012-08-02 15:44:16 -0400 | [diff] [blame] | 1537 | static void qemu_ram_setup_dump(void *addr, ram_addr_t size) |
| 1538 | { |
| 1539 | int ret; |
Jason Baron | ddb97f1 | 2012-08-02 15:44:16 -0400 | [diff] [blame] | 1540 | |
| 1541 | /* Use MADV_DONTDUMP, if user doesn't want the guest memory in the core */ |
Marcel Apfelbaum | 47c8ca5 | 2015-02-04 17:43:54 +0200 | [diff] [blame] | 1542 | if (!machine_dump_guest_core(current_machine)) { |
Jason Baron | ddb97f1 | 2012-08-02 15:44:16 -0400 | [diff] [blame] | 1543 | ret = qemu_madvise(addr, size, QEMU_MADV_DONTDUMP); |
| 1544 | if (ret) { |
| 1545 | perror("qemu_madvise"); |
| 1546 | fprintf(stderr, "madvise doesn't support MADV_DONTDUMP, " |
Akihiko Odaki | 0ff3243 | 2024-06-28 13:05:52 +0900 | [diff] [blame] | 1547 | "but dump-guest-core=off specified\n"); |
Jason Baron | ddb97f1 | 2012-08-02 15:44:16 -0400 | [diff] [blame] | 1548 | } |
| 1549 | } |
| 1550 | } |
| 1551 | |
Dr. David Alan Gilbert | 422148d | 2015-11-05 18:10:32 +0000 | [diff] [blame] | 1552 | const char *qemu_ram_get_idstr(RAMBlock *rb) |
| 1553 | { |
| 1554 | return rb->idstr; |
| 1555 | } |
| 1556 | |
Yury Kotov | 754cb9c | 2019-02-15 20:45:44 +0300 | [diff] [blame] | 1557 | void *qemu_ram_get_host_addr(RAMBlock *rb) |
| 1558 | { |
| 1559 | return rb->host; |
| 1560 | } |
| 1561 | |
| 1562 | ram_addr_t qemu_ram_get_offset(RAMBlock *rb) |
| 1563 | { |
| 1564 | return rb->offset; |
| 1565 | } |
| 1566 | |
| 1567 | ram_addr_t qemu_ram_get_used_length(RAMBlock *rb) |
| 1568 | { |
| 1569 | return rb->used_length; |
| 1570 | } |
| 1571 | |
David Hildenbrand | 082851a | 2021-04-29 13:26:59 +0200 | [diff] [blame] | 1572 | ram_addr_t qemu_ram_get_max_length(RAMBlock *rb) |
| 1573 | { |
| 1574 | return rb->max_length; |
| 1575 | } |
| 1576 | |
Dr. David Alan Gilbert | 463a4ac | 2017-03-07 18:36:36 +0000 | [diff] [blame] | 1577 | bool qemu_ram_is_shared(RAMBlock *rb) |
| 1578 | { |
| 1579 | return rb->flags & RAM_SHARED; |
| 1580 | } |
| 1581 | |
David Hildenbrand | 8dbe22c | 2021-05-10 13:43:21 +0200 | [diff] [blame] | 1582 | bool qemu_ram_is_noreserve(RAMBlock *rb) |
| 1583 | { |
| 1584 | return rb->flags & RAM_NORESERVE; |
| 1585 | } |
| 1586 | |
Dr. David Alan Gilbert | 2ce1664 | 2018-03-12 17:20:58 +0000 | [diff] [blame] | 1587 | /* Note: Only set at the start of postcopy */ |
| 1588 | bool qemu_ram_is_uf_zeroable(RAMBlock *rb) |
| 1589 | { |
| 1590 | return rb->flags & RAM_UF_ZEROPAGE; |
| 1591 | } |
| 1592 | |
| 1593 | void qemu_ram_set_uf_zeroable(RAMBlock *rb) |
| 1594 | { |
| 1595 | rb->flags |= RAM_UF_ZEROPAGE; |
| 1596 | } |
| 1597 | |
Cédric Le Goater | b895de5 | 2018-05-14 08:57:00 +0200 | [diff] [blame] | 1598 | bool qemu_ram_is_migratable(RAMBlock *rb) |
| 1599 | { |
| 1600 | return rb->flags & RAM_MIGRATABLE; |
| 1601 | } |
| 1602 | |
| 1603 | void qemu_ram_set_migratable(RAMBlock *rb) |
| 1604 | { |
| 1605 | rb->flags |= RAM_MIGRATABLE; |
| 1606 | } |
| 1607 | |
| 1608 | void qemu_ram_unset_migratable(RAMBlock *rb) |
| 1609 | { |
| 1610 | rb->flags &= ~RAM_MIGRATABLE; |
| 1611 | } |
| 1612 | |
Steve Sistare | b0182e5 | 2023-06-07 08:18:36 -0700 | [diff] [blame] | 1613 | bool qemu_ram_is_named_file(RAMBlock *rb) |
| 1614 | { |
| 1615 | return rb->flags & RAM_NAMED_FILE; |
| 1616 | } |
| 1617 | |
Stefan Hajnoczi | 6d998f3 | 2022-10-13 14:59:05 -0400 | [diff] [blame] | 1618 | int qemu_ram_get_fd(RAMBlock *rb) |
| 1619 | { |
| 1620 | return rb->fd; |
| 1621 | } |
| 1622 | |
Stefan Hajnoczi | a4a411f | 2024-01-02 10:35:28 -0500 | [diff] [blame] | 1623 | /* Called with the BQL held. */ |
Gonglei | fa53a0e | 2016-05-10 10:04:59 +0800 | [diff] [blame] | 1624 | void qemu_ram_set_idstr(RAMBlock *new_block, const char *name, DeviceState *dev) |
Hu Tao | 20cfe88 | 2014-04-02 15:13:26 +0800 | [diff] [blame] | 1625 | { |
Gonglei | fa53a0e | 2016-05-10 10:04:59 +0800 | [diff] [blame] | 1626 | RAMBlock *block; |
Hu Tao | 20cfe88 | 2014-04-02 15:13:26 +0800 | [diff] [blame] | 1627 | |
Avi Kivity | c5705a7 | 2011-12-20 15:59:12 +0200 | [diff] [blame] | 1628 | assert(new_block); |
| 1629 | assert(!new_block->idstr[0]); |
Cam Macdonell | 84b89d7 | 2010-07-26 18:10:57 -0600 | [diff] [blame] | 1630 | |
Anthony Liguori | 09e5ab6 | 2012-02-03 12:28:43 -0600 | [diff] [blame] | 1631 | if (dev) { |
| 1632 | char *id = qdev_get_dev_path(dev); |
Cam Macdonell | 84b89d7 | 2010-07-26 18:10:57 -0600 | [diff] [blame] | 1633 | if (id) { |
| 1634 | snprintf(new_block->idstr, sizeof(new_block->idstr), "%s/", id); |
Anthony Liguori | 7267c09 | 2011-08-20 22:09:37 -0500 | [diff] [blame] | 1635 | g_free(id); |
Cam Macdonell | 84b89d7 | 2010-07-26 18:10:57 -0600 | [diff] [blame] | 1636 | } |
| 1637 | } |
| 1638 | pstrcat(new_block->idstr, sizeof(new_block->idstr), name); |
| 1639 | |
Dr. David Alan Gilbert | 694ea27 | 2019-10-07 15:36:41 +0100 | [diff] [blame] | 1640 | RCU_READ_LOCK_GUARD(); |
Peter Xu | 99e1558 | 2017-05-12 12:17:39 +0800 | [diff] [blame] | 1641 | RAMBLOCK_FOREACH(block) { |
Gonglei | fa53a0e | 2016-05-10 10:04:59 +0800 | [diff] [blame] | 1642 | if (block != new_block && |
| 1643 | !strcmp(block->idstr, new_block->idstr)) { |
Cam Macdonell | 84b89d7 | 2010-07-26 18:10:57 -0600 | [diff] [blame] | 1644 | fprintf(stderr, "RAMBlock \"%s\" already registered, abort!\n", |
| 1645 | new_block->idstr); |
| 1646 | abort(); |
| 1647 | } |
| 1648 | } |
Avi Kivity | c5705a7 | 2011-12-20 15:59:12 +0200 | [diff] [blame] | 1649 | } |
| 1650 | |
Stefan Hajnoczi | a4a411f | 2024-01-02 10:35:28 -0500 | [diff] [blame] | 1651 | /* Called with the BQL held. */ |
Gonglei | fa53a0e | 2016-05-10 10:04:59 +0800 | [diff] [blame] | 1652 | void qemu_ram_unset_idstr(RAMBlock *block) |
Hu Tao | 20cfe88 | 2014-04-02 15:13:26 +0800 | [diff] [blame] | 1653 | { |
Mike Day | ae3a704 | 2013-09-05 14:41:35 -0400 | [diff] [blame] | 1654 | /* FIXME: arch_init.c assumes that this is not called throughout |
| 1655 | * migration. Ignore the problem since hot-unplug during migration |
| 1656 | * does not work anyway. |
| 1657 | */ |
Hu Tao | 20cfe88 | 2014-04-02 15:13:26 +0800 | [diff] [blame] | 1658 | if (block) { |
| 1659 | memset(block->idstr, 0, sizeof(block->idstr)); |
| 1660 | } |
| 1661 | } |
| 1662 | |
Dr. David Alan Gilbert | 863e962 | 2016-09-29 20:09:37 +0100 | [diff] [blame] | 1663 | size_t qemu_ram_pagesize(RAMBlock *rb) |
| 1664 | { |
| 1665 | return rb->page_size; |
| 1666 | } |
| 1667 | |
Dr. David Alan Gilbert | 67f11b5 | 2017-02-24 18:28:34 +0000 | [diff] [blame] | 1668 | /* Returns the largest size of page in use */ |
| 1669 | size_t qemu_ram_pagesize_largest(void) |
| 1670 | { |
| 1671 | RAMBlock *block; |
| 1672 | size_t largest = 0; |
| 1673 | |
Peter Xu | 99e1558 | 2017-05-12 12:17:39 +0800 | [diff] [blame] | 1674 | RAMBLOCK_FOREACH(block) { |
Dr. David Alan Gilbert | 67f11b5 | 2017-02-24 18:28:34 +0000 | [diff] [blame] | 1675 | largest = MAX(largest, qemu_ram_pagesize(block)); |
| 1676 | } |
| 1677 | |
| 1678 | return largest; |
| 1679 | } |
| 1680 | |
Luiz Capitulino | 8490fc7 | 2012-09-05 16:50:16 -0300 | [diff] [blame] | 1681 | static int memory_try_enable_merging(void *addr, size_t len) |
| 1682 | { |
Marcel Apfelbaum | 75cc7f0 | 2015-02-04 17:43:55 +0200 | [diff] [blame] | 1683 | if (!machine_mem_merge(current_machine)) { |
Luiz Capitulino | 8490fc7 | 2012-09-05 16:50:16 -0300 | [diff] [blame] | 1684 | /* disabled by the user */ |
| 1685 | return 0; |
| 1686 | } |
| 1687 | |
| 1688 | return qemu_madvise(addr, len, QEMU_MADV_MERGEABLE); |
| 1689 | } |
| 1690 | |
David Hildenbrand | c7c0e72 | 2021-04-29 13:27:02 +0200 | [diff] [blame] | 1691 | /* |
| 1692 | * Resizing RAM while migrating can result in the migration being canceled. |
| 1693 | * Care has to be taken if the guest might have already detected the memory. |
Michael S. Tsirkin | 62be4e3 | 2014-11-12 14:27:41 +0200 | [diff] [blame] | 1694 | * |
| 1695 | * As memory core doesn't know how is memory accessed, it is up to |
| 1696 | * resize callback to update device state and/or add assertions to detect |
| 1697 | * misuse, if necessary. |
| 1698 | */ |
Gonglei | fa53a0e | 2016-05-10 10:04:59 +0800 | [diff] [blame] | 1699 | int qemu_ram_resize(RAMBlock *block, ram_addr_t newsize, Error **errp) |
Michael S. Tsirkin | 62be4e3 | 2014-11-12 14:27:41 +0200 | [diff] [blame] | 1700 | { |
David Hildenbrand | 8f44304 | 2021-04-29 13:27:00 +0200 | [diff] [blame] | 1701 | const ram_addr_t oldsize = block->used_length; |
David Hildenbrand | ce4adc0 | 2020-04-03 11:18:27 +0100 | [diff] [blame] | 1702 | const ram_addr_t unaligned_size = newsize; |
| 1703 | |
Michael S. Tsirkin | 62be4e3 | 2014-11-12 14:27:41 +0200 | [diff] [blame] | 1704 | assert(block); |
| 1705 | |
Richard Henderson | 9260bd4 | 2024-01-02 12:57:49 +1100 | [diff] [blame] | 1706 | newsize = TARGET_PAGE_ALIGN(newsize); |
| 1707 | newsize = REAL_HOST_PAGE_ALIGN(newsize); |
Michael S. Tsirkin | 129ddaf | 2015-02-17 10:15:30 +0100 | [diff] [blame] | 1708 | |
Michael S. Tsirkin | 62be4e3 | 2014-11-12 14:27:41 +0200 | [diff] [blame] | 1709 | if (block->used_length == newsize) { |
David Hildenbrand | ce4adc0 | 2020-04-03 11:18:27 +0100 | [diff] [blame] | 1710 | /* |
| 1711 | * We don't have to resize the ram block (which only knows aligned |
| 1712 | * sizes), however, we have to notify if the unaligned size changed. |
| 1713 | */ |
| 1714 | if (unaligned_size != memory_region_size(block->mr)) { |
| 1715 | memory_region_set_size(block->mr, unaligned_size); |
| 1716 | if (block->resized) { |
| 1717 | block->resized(block->idstr, unaligned_size, block->host); |
| 1718 | } |
| 1719 | } |
Michael S. Tsirkin | 62be4e3 | 2014-11-12 14:27:41 +0200 | [diff] [blame] | 1720 | return 0; |
| 1721 | } |
| 1722 | |
| 1723 | if (!(block->flags & RAM_RESIZEABLE)) { |
| 1724 | error_setg_errno(errp, EINVAL, |
Pankaj Gupta | a3a9290 | 2020-10-22 13:13:02 +0200 | [diff] [blame] | 1725 | "Size mismatch: %s: 0x" RAM_ADDR_FMT |
| 1726 | " != 0x" RAM_ADDR_FMT, block->idstr, |
Michael S. Tsirkin | 62be4e3 | 2014-11-12 14:27:41 +0200 | [diff] [blame] | 1727 | newsize, block->used_length); |
| 1728 | return -EINVAL; |
| 1729 | } |
| 1730 | |
| 1731 | if (block->max_length < newsize) { |
| 1732 | error_setg_errno(errp, EINVAL, |
Pankaj Gupta | a3a9290 | 2020-10-22 13:13:02 +0200 | [diff] [blame] | 1733 | "Size too large: %s: 0x" RAM_ADDR_FMT |
Michael S. Tsirkin | 62be4e3 | 2014-11-12 14:27:41 +0200 | [diff] [blame] | 1734 | " > 0x" RAM_ADDR_FMT, block->idstr, |
| 1735 | newsize, block->max_length); |
| 1736 | return -EINVAL; |
| 1737 | } |
| 1738 | |
David Hildenbrand | 8f44304 | 2021-04-29 13:27:00 +0200 | [diff] [blame] | 1739 | /* Notify before modifying the ram block and touching the bitmaps. */ |
| 1740 | if (block->host) { |
| 1741 | ram_block_notify_resize(block->host, oldsize, newsize); |
| 1742 | } |
| 1743 | |
Michael S. Tsirkin | 62be4e3 | 2014-11-12 14:27:41 +0200 | [diff] [blame] | 1744 | cpu_physical_memory_clear_dirty_range(block->offset, block->used_length); |
| 1745 | block->used_length = newsize; |
Paolo Bonzini | 58d2707 | 2015-03-23 11:56:01 +0100 | [diff] [blame] | 1746 | cpu_physical_memory_set_dirty_range(block->offset, block->used_length, |
| 1747 | DIRTY_CLIENTS_ALL); |
David Hildenbrand | ce4adc0 | 2020-04-03 11:18:27 +0100 | [diff] [blame] | 1748 | memory_region_set_size(block->mr, unaligned_size); |
Michael S. Tsirkin | 62be4e3 | 2014-11-12 14:27:41 +0200 | [diff] [blame] | 1749 | if (block->resized) { |
David Hildenbrand | ce4adc0 | 2020-04-03 11:18:27 +0100 | [diff] [blame] | 1750 | block->resized(block->idstr, unaligned_size, block->host); |
Michael S. Tsirkin | 62be4e3 | 2014-11-12 14:27:41 +0200 | [diff] [blame] | 1751 | } |
| 1752 | return 0; |
| 1753 | } |
| 1754 | |
Beata Michalska | 61c490e | 2019-11-21 00:08:41 +0000 | [diff] [blame] | 1755 | /* |
| 1756 | * Trigger sync on the given ram block for range [start, start + length] |
| 1757 | * with the backing store if one is available. |
| 1758 | * Otherwise no-op. |
| 1759 | * @Note: this is supposed to be a synchronous op. |
| 1760 | */ |
Philippe Mathieu-Daudé | ab7e41e | 2020-05-08 08:24:56 +0200 | [diff] [blame] | 1761 | void qemu_ram_msync(RAMBlock *block, ram_addr_t start, ram_addr_t length) |
Beata Michalska | 61c490e | 2019-11-21 00:08:41 +0000 | [diff] [blame] | 1762 | { |
Beata Michalska | 61c490e | 2019-11-21 00:08:41 +0000 | [diff] [blame] | 1763 | /* The requested range should fit in within the block range */ |
| 1764 | g_assert((start + length) <= block->used_length); |
| 1765 | |
| 1766 | #ifdef CONFIG_LIBPMEM |
| 1767 | /* The lack of support for pmem should not block the sync */ |
| 1768 | if (ramblock_is_pmem(block)) { |
Anthony PERARD | 5d4c954 | 2019-12-19 15:43:22 +0000 | [diff] [blame] | 1769 | void *addr = ramblock_ptr(block, start); |
Beata Michalska | 61c490e | 2019-11-21 00:08:41 +0000 | [diff] [blame] | 1770 | pmem_persist(addr, length); |
| 1771 | return; |
| 1772 | } |
| 1773 | #endif |
| 1774 | if (block->fd >= 0) { |
| 1775 | /** |
| 1776 | * Case there is no support for PMEM or the memory has not been |
| 1777 | * specified as persistent (or is not one) - use the msync. |
| 1778 | * Less optimal but still achieves the same goal |
| 1779 | */ |
Anthony PERARD | 5d4c954 | 2019-12-19 15:43:22 +0000 | [diff] [blame] | 1780 | void *addr = ramblock_ptr(block, start); |
Beata Michalska | 61c490e | 2019-11-21 00:08:41 +0000 | [diff] [blame] | 1781 | if (qemu_msync(addr, length, block->fd)) { |
| 1782 | warn_report("%s: failed to sync memory range: start: " |
| 1783 | RAM_ADDR_FMT " length: " RAM_ADDR_FMT, |
| 1784 | __func__, start, length); |
| 1785 | } |
| 1786 | } |
| 1787 | } |
| 1788 | |
Stefan Hajnoczi | 5b82b70 | 2016-01-25 13:33:20 +0000 | [diff] [blame] | 1789 | /* Called with ram_list.mutex held */ |
David Hildenbrand | b84f06c | 2024-08-28 11:07:43 +0200 | [diff] [blame] | 1790 | static void dirty_memory_extend(ram_addr_t new_ram_size) |
Stefan Hajnoczi | 5b82b70 | 2016-01-25 13:33:20 +0000 | [diff] [blame] | 1791 | { |
David Hildenbrand | b84f06c | 2024-08-28 11:07:43 +0200 | [diff] [blame] | 1792 | unsigned int old_num_blocks = ram_list.num_dirty_blocks; |
| 1793 | unsigned int new_num_blocks = DIV_ROUND_UP(new_ram_size, |
| 1794 | DIRTY_MEMORY_BLOCK_SIZE); |
Stefan Hajnoczi | 5b82b70 | 2016-01-25 13:33:20 +0000 | [diff] [blame] | 1795 | int i; |
| 1796 | |
| 1797 | /* Only need to extend if block count increased */ |
| 1798 | if (new_num_blocks <= old_num_blocks) { |
| 1799 | return; |
| 1800 | } |
| 1801 | |
| 1802 | for (i = 0; i < DIRTY_MEMORY_NUM; i++) { |
| 1803 | DirtyMemoryBlocks *old_blocks; |
| 1804 | DirtyMemoryBlocks *new_blocks; |
| 1805 | int j; |
| 1806 | |
Stefan Hajnoczi | d73415a | 2020-09-23 11:56:46 +0100 | [diff] [blame] | 1807 | old_blocks = qatomic_rcu_read(&ram_list.dirty_memory[i]); |
Stefan Hajnoczi | 5b82b70 | 2016-01-25 13:33:20 +0000 | [diff] [blame] | 1808 | new_blocks = g_malloc(sizeof(*new_blocks) + |
| 1809 | sizeof(new_blocks->blocks[0]) * new_num_blocks); |
| 1810 | |
| 1811 | if (old_num_blocks) { |
| 1812 | memcpy(new_blocks->blocks, old_blocks->blocks, |
| 1813 | old_num_blocks * sizeof(old_blocks->blocks[0])); |
| 1814 | } |
| 1815 | |
| 1816 | for (j = old_num_blocks; j < new_num_blocks; j++) { |
| 1817 | new_blocks->blocks[j] = bitmap_new(DIRTY_MEMORY_BLOCK_SIZE); |
| 1818 | } |
| 1819 | |
Stefan Hajnoczi | d73415a | 2020-09-23 11:56:46 +0100 | [diff] [blame] | 1820 | qatomic_rcu_set(&ram_list.dirty_memory[i], new_blocks); |
Stefan Hajnoczi | 5b82b70 | 2016-01-25 13:33:20 +0000 | [diff] [blame] | 1821 | |
| 1822 | if (old_blocks) { |
| 1823 | g_free_rcu(old_blocks, rcu); |
| 1824 | } |
| 1825 | } |
David Hildenbrand | b84f06c | 2024-08-28 11:07:43 +0200 | [diff] [blame] | 1826 | |
| 1827 | ram_list.num_dirty_blocks = new_num_blocks; |
Stefan Hajnoczi | 5b82b70 | 2016-01-25 13:33:20 +0000 | [diff] [blame] | 1828 | } |
| 1829 | |
David Hildenbrand | 7ce18ca | 2021-04-06 10:01:24 +0200 | [diff] [blame] | 1830 | static void ram_block_add(RAMBlock *new_block, Error **errp) |
Avi Kivity | c5705a7 | 2011-12-20 15:59:12 +0200 | [diff] [blame] | 1831 | { |
David Hildenbrand | 8dbe22c | 2021-05-10 13:43:21 +0200 | [diff] [blame] | 1832 | const bool noreserve = qemu_ram_is_noreserve(new_block); |
David Hildenbrand | 7ce18ca | 2021-04-06 10:01:24 +0200 | [diff] [blame] | 1833 | const bool shared = qemu_ram_is_shared(new_block); |
Paolo Bonzini | e1c57ab | 2014-05-14 17:43:18 +0800 | [diff] [blame] | 1834 | RAMBlock *block; |
Mike Day | 0d53d9f | 2015-01-21 13:45:24 +0100 | [diff] [blame] | 1835 | RAMBlock *last_block = NULL; |
Xiaoyao Li | 15f7a80 | 2024-03-20 03:39:02 -0500 | [diff] [blame] | 1836 | bool free_on_error = false; |
David Hildenbrand | b84f06c | 2024-08-28 11:07:43 +0200 | [diff] [blame] | 1837 | ram_addr_t ram_size; |
Markus Armbruster | 37aa7a0 | 2016-01-14 16:09:39 +0100 | [diff] [blame] | 1838 | Error *err = NULL; |
Juan Quintela | 2152f5c | 2013-10-08 13:52:02 +0200 | [diff] [blame] | 1839 | |
Umesh Deshpande | b2a8658 | 2011-08-17 00:01:33 -0700 | [diff] [blame] | 1840 | qemu_mutex_lock_ramlist(); |
Michael S. Tsirkin | 9b8424d | 2014-12-15 22:55:32 +0200 | [diff] [blame] | 1841 | new_block->offset = find_ram_offset(new_block->max_length); |
Paolo Bonzini | e1c57ab | 2014-05-14 17:43:18 +0800 | [diff] [blame] | 1842 | |
| 1843 | if (!new_block->host) { |
| 1844 | if (xen_enabled()) { |
Michael S. Tsirkin | 9b8424d | 2014-12-15 22:55:32 +0200 | [diff] [blame] | 1845 | xen_ram_alloc(new_block->offset, new_block->max_length, |
Markus Armbruster | 37aa7a0 | 2016-01-14 16:09:39 +0100 | [diff] [blame] | 1846 | new_block->mr, &err); |
| 1847 | if (err) { |
| 1848 | error_propagate(errp, err); |
| 1849 | qemu_mutex_unlock_ramlist(); |
Paolo Bonzini | 39c350e | 2016-03-09 18:14:01 +0100 | [diff] [blame] | 1850 | return; |
Markus Armbruster | 37aa7a0 | 2016-01-14 16:09:39 +0100 | [diff] [blame] | 1851 | } |
Paolo Bonzini | e1c57ab | 2014-05-14 17:43:18 +0800 | [diff] [blame] | 1852 | } else { |
David Hildenbrand | 25459eb | 2021-03-03 14:09:16 +0100 | [diff] [blame] | 1853 | new_block->host = qemu_anon_ram_alloc(new_block->max_length, |
| 1854 | &new_block->mr->align, |
David Hildenbrand | 8dbe22c | 2021-05-10 13:43:21 +0200 | [diff] [blame] | 1855 | shared, noreserve); |
Markus Armbruster | 3922825 | 2013-07-31 15:11:11 +0200 | [diff] [blame] | 1856 | if (!new_block->host) { |
Hu Tao | ef701d7 | 2014-09-09 13:27:54 +0800 | [diff] [blame] | 1857 | error_setg_errno(errp, errno, |
| 1858 | "cannot set up guest memory '%s'", |
| 1859 | memory_region_name(new_block->mr)); |
| 1860 | qemu_mutex_unlock_ramlist(); |
Paolo Bonzini | 39c350e | 2016-03-09 18:14:01 +0100 | [diff] [blame] | 1861 | return; |
Markus Armbruster | 3922825 | 2013-07-31 15:11:11 +0200 | [diff] [blame] | 1862 | } |
Michael S. Tsirkin | 9b8424d | 2014-12-15 22:55:32 +0200 | [diff] [blame] | 1863 | memory_try_enable_merging(new_block->host, new_block->max_length); |
Xiaoyao Li | 15f7a80 | 2024-03-20 03:39:02 -0500 | [diff] [blame] | 1864 | free_on_error = true; |
| 1865 | } |
| 1866 | } |
| 1867 | |
| 1868 | if (new_block->flags & RAM_GUEST_MEMFD) { |
Zhenzhong Duan | 644a527 | 2024-07-16 14:42:12 +0800 | [diff] [blame] | 1869 | int ret; |
| 1870 | |
Xiaoyao Li | 15f7a80 | 2024-03-20 03:39:02 -0500 | [diff] [blame] | 1871 | assert(kvm_enabled()); |
| 1872 | assert(new_block->guest_memfd < 0); |
| 1873 | |
Zhenzhong Duan | 644a527 | 2024-07-16 14:42:12 +0800 | [diff] [blame] | 1874 | ret = ram_block_discard_require(true); |
| 1875 | if (ret < 0) { |
| 1876 | error_setg_errno(errp, -ret, |
Paolo Bonzini | 852f004 | 2024-03-20 17:45:29 +0100 | [diff] [blame] | 1877 | "cannot set up private guest memory: discard currently blocked"); |
| 1878 | error_append_hint(errp, "Are you using assigned devices?\n"); |
| 1879 | goto out_free; |
| 1880 | } |
| 1881 | |
Xiaoyao Li | 15f7a80 | 2024-03-20 03:39:02 -0500 | [diff] [blame] | 1882 | new_block->guest_memfd = kvm_create_guest_memfd(new_block->max_length, |
| 1883 | 0, errp); |
| 1884 | if (new_block->guest_memfd < 0) { |
| 1885 | qemu_mutex_unlock_ramlist(); |
| 1886 | goto out_free; |
Yoshiaki Tamura | 6977dfe | 2010-08-18 15:41:49 +0900 | [diff] [blame] | 1887 | } |
| 1888 | } |
Cam Macdonell | 84b89d7 | 2010-07-26 18:10:57 -0600 | [diff] [blame] | 1889 | |
David Hildenbrand | b84f06c | 2024-08-28 11:07:43 +0200 | [diff] [blame] | 1890 | ram_size = (new_block->offset + new_block->max_length) >> TARGET_PAGE_BITS; |
| 1891 | dirty_memory_extend(ram_size); |
Mike Day | 0d53d9f | 2015-01-21 13:45:24 +0100 | [diff] [blame] | 1892 | /* Keep the list sorted from biggest to smallest block. Unlike QTAILQ, |
| 1893 | * QLIST (which has an RCU-friendly variant) does not have insertion at |
| 1894 | * tail, so save the last element in last_block. |
| 1895 | */ |
Peter Xu | 99e1558 | 2017-05-12 12:17:39 +0800 | [diff] [blame] | 1896 | RAMBLOCK_FOREACH(block) { |
Mike Day | 0d53d9f | 2015-01-21 13:45:24 +0100 | [diff] [blame] | 1897 | last_block = block; |
Michael S. Tsirkin | 9b8424d | 2014-12-15 22:55:32 +0200 | [diff] [blame] | 1898 | if (block->max_length < new_block->max_length) { |
Paolo Bonzini | abb26d6 | 2012-11-14 16:00:51 +0100 | [diff] [blame] | 1899 | break; |
| 1900 | } |
| 1901 | } |
| 1902 | if (block) { |
Mike Day | 0dc3f44 | 2013-09-05 14:41:35 -0400 | [diff] [blame] | 1903 | QLIST_INSERT_BEFORE_RCU(block, new_block, next); |
Mike Day | 0d53d9f | 2015-01-21 13:45:24 +0100 | [diff] [blame] | 1904 | } else if (last_block) { |
Mike Day | 0dc3f44 | 2013-09-05 14:41:35 -0400 | [diff] [blame] | 1905 | QLIST_INSERT_AFTER_RCU(last_block, new_block, next); |
Mike Day | 0d53d9f | 2015-01-21 13:45:24 +0100 | [diff] [blame] | 1906 | } else { /* list is empty */ |
Mike Day | 0dc3f44 | 2013-09-05 14:41:35 -0400 | [diff] [blame] | 1907 | QLIST_INSERT_HEAD_RCU(&ram_list.blocks, new_block, next); |
Paolo Bonzini | abb26d6 | 2012-11-14 16:00:51 +0100 | [diff] [blame] | 1908 | } |
Paolo Bonzini | 0d6d3c8 | 2012-11-14 15:45:02 +0100 | [diff] [blame] | 1909 | ram_list.mru_block = NULL; |
Cam Macdonell | 84b89d7 | 2010-07-26 18:10:57 -0600 | [diff] [blame] | 1910 | |
Mike Day | 0dc3f44 | 2013-09-05 14:41:35 -0400 | [diff] [blame] | 1911 | /* Write list before version */ |
| 1912 | smp_wmb(); |
Umesh Deshpande | f798b07 | 2011-08-18 11:41:17 -0700 | [diff] [blame] | 1913 | ram_list.version++; |
Umesh Deshpande | b2a8658 | 2011-08-17 00:01:33 -0700 | [diff] [blame] | 1914 | qemu_mutex_unlock_ramlist(); |
Umesh Deshpande | f798b07 | 2011-08-18 11:41:17 -0700 | [diff] [blame] | 1915 | |
Michael S. Tsirkin | 9b8424d | 2014-12-15 22:55:32 +0200 | [diff] [blame] | 1916 | cpu_physical_memory_set_dirty_range(new_block->offset, |
Paolo Bonzini | 58d2707 | 2015-03-23 11:56:01 +0100 | [diff] [blame] | 1917 | new_block->used_length, |
| 1918 | DIRTY_CLIENTS_ALL); |
Cam Macdonell | 84b89d7 | 2010-07-26 18:10:57 -0600 | [diff] [blame] | 1919 | |
Paolo Bonzini | a904c91 | 2015-01-21 16:18:35 +0100 | [diff] [blame] | 1920 | if (new_block->host) { |
| 1921 | qemu_ram_setup_dump(new_block->host, new_block->max_length); |
| 1922 | qemu_madvise(new_block->host, new_block->max_length, QEMU_MADV_HUGEPAGE); |
Alexander Bulekov | a028ede | 2020-02-19 23:11:09 -0500 | [diff] [blame] | 1923 | /* |
| 1924 | * MADV_DONTFORK is also needed by KVM in absence of synchronous MMU |
| 1925 | * Configure it unless the machine is a qtest server, in which case |
| 1926 | * KVM is not used and it may be forked (eg for fuzzing purposes). |
| 1927 | */ |
| 1928 | if (!qtest_enabled()) { |
| 1929 | qemu_madvise(new_block->host, new_block->max_length, |
| 1930 | QEMU_MADV_DONTFORK); |
| 1931 | } |
David Hildenbrand | 8f44304 | 2021-04-29 13:27:00 +0200 | [diff] [blame] | 1932 | ram_block_notify_add(new_block->host, new_block->used_length, |
| 1933 | new_block->max_length); |
Paolo Bonzini | e1c57ab | 2014-05-14 17:43:18 +0800 | [diff] [blame] | 1934 | } |
Xiaoyao Li | 15f7a80 | 2024-03-20 03:39:02 -0500 | [diff] [blame] | 1935 | return; |
| 1936 | |
| 1937 | out_free: |
| 1938 | if (free_on_error) { |
| 1939 | qemu_anon_ram_free(new_block->host, new_block->max_length); |
| 1940 | new_block->host = NULL; |
| 1941 | } |
Cam Macdonell | 84b89d7 | 2010-07-26 18:10:57 -0600 | [diff] [blame] | 1942 | } |
| 1943 | |
Hikaru Nishida | d5dbde4 | 2018-09-24 21:32:05 +0900 | [diff] [blame] | 1944 | #ifdef CONFIG_POSIX |
Marc-André Lureau | 38b3362 | 2017-06-02 18:12:23 +0400 | [diff] [blame] | 1945 | RAMBlock *qemu_ram_alloc_from_fd(ram_addr_t size, MemoryRegion *mr, |
Jagannathan Raman | 44a4ff3 | 2021-01-29 11:46:04 -0500 | [diff] [blame] | 1946 | uint32_t ram_flags, int fd, off_t offset, |
David Hildenbrand | 5c52a21 | 2023-09-06 14:04:54 +0200 | [diff] [blame] | 1947 | Error **errp) |
Paolo Bonzini | e1c57ab | 2014-05-14 17:43:18 +0800 | [diff] [blame] | 1948 | { |
| 1949 | RAMBlock *new_block; |
Hu Tao | ef701d7 | 2014-09-09 13:27:54 +0800 | [diff] [blame] | 1950 | Error *local_err = NULL; |
Jingqi Liu | ce317be | 2020-04-29 16:50:09 +0800 | [diff] [blame] | 1951 | int64_t file_size, file_align; |
Paolo Bonzini | e1c57ab | 2014-05-14 17:43:18 +0800 | [diff] [blame] | 1952 | |
Junyan He | a4de855 | 2018-07-18 15:48:00 +0800 | [diff] [blame] | 1953 | /* Just support these ram flags by now. */ |
Sean Christopherson | 56918a1 | 2021-07-19 19:21:04 +0800 | [diff] [blame] | 1954 | assert((ram_flags & ~(RAM_SHARED | RAM_PMEM | RAM_NORESERVE | |
David Hildenbrand | 5c52a21 | 2023-09-06 14:04:54 +0200 | [diff] [blame] | 1955 | RAM_PROTECTED | RAM_NAMED_FILE | RAM_READONLY | |
Xiaoyao Li | 15f7a80 | 2024-03-20 03:39:02 -0500 | [diff] [blame] | 1956 | RAM_READONLY_FD | RAM_GUEST_MEMFD)) == 0); |
Junyan He | a4de855 | 2018-07-18 15:48:00 +0800 | [diff] [blame] | 1957 | |
Paolo Bonzini | e1c57ab | 2014-05-14 17:43:18 +0800 | [diff] [blame] | 1958 | if (xen_enabled()) { |
Paolo Bonzini | 7f56e74 | 2014-05-14 17:43:20 +0800 | [diff] [blame] | 1959 | error_setg(errp, "-mem-path not supported with Xen"); |
Fam Zheng | 528f46a | 2016-03-01 14:18:18 +0800 | [diff] [blame] | 1960 | return NULL; |
Paolo Bonzini | e1c57ab | 2014-05-14 17:43:18 +0800 | [diff] [blame] | 1961 | } |
| 1962 | |
Marc-André Lureau | e45e7ae | 2017-06-02 18:12:21 +0400 | [diff] [blame] | 1963 | if (kvm_enabled() && !kvm_has_sync_mmu()) { |
| 1964 | error_setg(errp, |
| 1965 | "host lacks kvm mmu notifiers, -mem-path unsupported"); |
| 1966 | return NULL; |
| 1967 | } |
| 1968 | |
Richard Henderson | 9260bd4 | 2024-01-02 12:57:49 +1100 | [diff] [blame] | 1969 | size = TARGET_PAGE_ALIGN(size); |
| 1970 | size = REAL_HOST_PAGE_ALIGN(size); |
| 1971 | |
Marc-André Lureau | 8d37b03 | 2017-06-02 18:12:22 +0400 | [diff] [blame] | 1972 | file_size = get_file_size(fd); |
Alexander Graf | 4b870dc | 2023-04-03 22:14:21 +0000 | [diff] [blame] | 1973 | if (file_size > offset && file_size < (offset + size)) { |
Igor Mammedov | c001c3b | 2020-02-19 11:09:48 -0500 | [diff] [blame] | 1974 | error_setg(errp, "backing store size 0x%" PRIx64 |
Marc-André Lureau | 8d37b03 | 2017-06-02 18:12:22 +0400 | [diff] [blame] | 1975 | " does not match 'size' option 0x" RAM_ADDR_FMT, |
Igor Mammedov | c001c3b | 2020-02-19 11:09:48 -0500 | [diff] [blame] | 1976 | file_size, size); |
Marc-André Lureau | 8d37b03 | 2017-06-02 18:12:22 +0400 | [diff] [blame] | 1977 | return NULL; |
| 1978 | } |
| 1979 | |
Jingqi Liu | ce317be | 2020-04-29 16:50:09 +0800 | [diff] [blame] | 1980 | file_align = get_file_align(fd); |
Peter Maydell | 8f1bdb0 | 2021-08-12 16:06:24 +0100 | [diff] [blame] | 1981 | if (file_align > 0 && file_align > mr->align) { |
Jingqi Liu | ce317be | 2020-04-29 16:50:09 +0800 | [diff] [blame] | 1982 | error_setg(errp, "backing store align 0x%" PRIx64 |
Jingqi Liu | 5f50975 | 2020-04-29 16:50:10 +0800 | [diff] [blame] | 1983 | " is larger than 'align' option 0x%" PRIx64, |
Jingqi Liu | ce317be | 2020-04-29 16:50:09 +0800 | [diff] [blame] | 1984 | file_align, mr->align); |
| 1985 | return NULL; |
| 1986 | } |
| 1987 | |
Paolo Bonzini | e1c57ab | 2014-05-14 17:43:18 +0800 | [diff] [blame] | 1988 | new_block = g_malloc0(sizeof(*new_block)); |
| 1989 | new_block->mr = mr; |
Michael S. Tsirkin | 9b8424d | 2014-12-15 22:55:32 +0200 | [diff] [blame] | 1990 | new_block->used_length = size; |
| 1991 | new_block->max_length = size; |
Junyan He | cbfc017 | 2018-07-18 15:47:58 +0800 | [diff] [blame] | 1992 | new_block->flags = ram_flags; |
Xiaoyao Li | 15f7a80 | 2024-03-20 03:39:02 -0500 | [diff] [blame] | 1993 | new_block->guest_memfd = -1; |
David Hildenbrand | 5c52a21 | 2023-09-06 14:04:54 +0200 | [diff] [blame] | 1994 | new_block->host = file_ram_alloc(new_block, size, fd, !file_size, offset, |
| 1995 | errp); |
Paolo Bonzini | 7f56e74 | 2014-05-14 17:43:20 +0800 | [diff] [blame] | 1996 | if (!new_block->host) { |
| 1997 | g_free(new_block); |
Fam Zheng | 528f46a | 2016-03-01 14:18:18 +0800 | [diff] [blame] | 1998 | return NULL; |
Paolo Bonzini | 7f56e74 | 2014-05-14 17:43:20 +0800 | [diff] [blame] | 1999 | } |
| 2000 | |
David Hildenbrand | 7ce18ca | 2021-04-06 10:01:24 +0200 | [diff] [blame] | 2001 | ram_block_add(new_block, &local_err); |
Hu Tao | ef701d7 | 2014-09-09 13:27:54 +0800 | [diff] [blame] | 2002 | if (local_err) { |
| 2003 | g_free(new_block); |
| 2004 | error_propagate(errp, local_err); |
Fam Zheng | 528f46a | 2016-03-01 14:18:18 +0800 | [diff] [blame] | 2005 | return NULL; |
Hu Tao | ef701d7 | 2014-09-09 13:27:54 +0800 | [diff] [blame] | 2006 | } |
Fam Zheng | 528f46a | 2016-03-01 14:18:18 +0800 | [diff] [blame] | 2007 | return new_block; |
Marc-André Lureau | 38b3362 | 2017-06-02 18:12:23 +0400 | [diff] [blame] | 2008 | |
| 2009 | } |
| 2010 | |
| 2011 | |
| 2012 | RAMBlock *qemu_ram_alloc_from_file(ram_addr_t size, MemoryRegion *mr, |
Junyan He | cbfc017 | 2018-07-18 15:47:58 +0800 | [diff] [blame] | 2013 | uint32_t ram_flags, const char *mem_path, |
David Hildenbrand | 5c52a21 | 2023-09-06 14:04:54 +0200 | [diff] [blame] | 2014 | off_t offset, Error **errp) |
Marc-André Lureau | 38b3362 | 2017-06-02 18:12:23 +0400 | [diff] [blame] | 2015 | { |
| 2016 | int fd; |
| 2017 | bool created; |
| 2018 | RAMBlock *block; |
| 2019 | |
David Hildenbrand | 5c52a21 | 2023-09-06 14:04:54 +0200 | [diff] [blame] | 2020 | fd = file_ram_open(mem_path, memory_region_name(mr), |
David Hildenbrand | 4d6b23f | 2023-09-06 14:04:58 +0200 | [diff] [blame] | 2021 | !!(ram_flags & RAM_READONLY_FD), &created); |
Marc-André Lureau | 38b3362 | 2017-06-02 18:12:23 +0400 | [diff] [blame] | 2022 | if (fd < 0) { |
David Hildenbrand | 4d6b23f | 2023-09-06 14:04:58 +0200 | [diff] [blame] | 2023 | error_setg_errno(errp, -fd, "can't open backing store %s for guest RAM", |
| 2024 | mem_path); |
David Hildenbrand | 6da4b1c | 2023-09-06 14:05:02 +0200 | [diff] [blame] | 2025 | if (!(ram_flags & RAM_READONLY_FD) && !(ram_flags & RAM_SHARED) && |
| 2026 | fd == -EACCES) { |
| 2027 | /* |
| 2028 | * If we can open the file R/O (note: will never create a new file) |
| 2029 | * and we are dealing with a private mapping, there are still ways |
| 2030 | * to consume such files and get RAM instead of ROM. |
| 2031 | */ |
| 2032 | fd = file_ram_open(mem_path, memory_region_name(mr), true, |
| 2033 | &created); |
| 2034 | if (fd < 0) { |
| 2035 | return NULL; |
| 2036 | } |
| 2037 | assert(!created); |
| 2038 | close(fd); |
| 2039 | error_append_hint(errp, "Consider opening the backing store" |
| 2040 | " read-only but still creating writable RAM using" |
| 2041 | " '-object memory-backend-file,readonly=on,rom=off...'" |
| 2042 | " (see \"VM templating\" documentation)\n"); |
| 2043 | } |
Marc-André Lureau | 38b3362 | 2017-06-02 18:12:23 +0400 | [diff] [blame] | 2044 | return NULL; |
| 2045 | } |
| 2046 | |
David Hildenbrand | 5c52a21 | 2023-09-06 14:04:54 +0200 | [diff] [blame] | 2047 | block = qemu_ram_alloc_from_fd(size, mr, ram_flags, fd, offset, errp); |
Marc-André Lureau | 38b3362 | 2017-06-02 18:12:23 +0400 | [diff] [blame] | 2048 | if (!block) { |
| 2049 | if (created) { |
| 2050 | unlink(mem_path); |
| 2051 | } |
| 2052 | close(fd); |
| 2053 | return NULL; |
| 2054 | } |
| 2055 | |
| 2056 | return block; |
Paolo Bonzini | e1c57ab | 2014-05-14 17:43:18 +0800 | [diff] [blame] | 2057 | } |
Paolo Bonzini | 0b183fc | 2014-05-14 17:43:19 +0800 | [diff] [blame] | 2058 | #endif |
Paolo Bonzini | e1c57ab | 2014-05-14 17:43:18 +0800 | [diff] [blame] | 2059 | |
Michael S. Tsirkin | 62be4e3 | 2014-11-12 14:27:41 +0200 | [diff] [blame] | 2060 | static |
Fam Zheng | 528f46a | 2016-03-01 14:18:18 +0800 | [diff] [blame] | 2061 | RAMBlock *qemu_ram_alloc_internal(ram_addr_t size, ram_addr_t max_size, |
| 2062 | void (*resized)(const char*, |
| 2063 | uint64_t length, |
| 2064 | void *host), |
David Hildenbrand | ebef62d | 2021-05-10 13:43:19 +0200 | [diff] [blame] | 2065 | void *host, uint32_t ram_flags, |
Fam Zheng | 528f46a | 2016-03-01 14:18:18 +0800 | [diff] [blame] | 2066 | MemoryRegion *mr, Error **errp) |
Paolo Bonzini | e1c57ab | 2014-05-14 17:43:18 +0800 | [diff] [blame] | 2067 | { |
| 2068 | RAMBlock *new_block; |
Hu Tao | ef701d7 | 2014-09-09 13:27:54 +0800 | [diff] [blame] | 2069 | Error *local_err = NULL; |
Richard Henderson | 9260bd4 | 2024-01-02 12:57:49 +1100 | [diff] [blame] | 2070 | int align; |
Paolo Bonzini | e1c57ab | 2014-05-14 17:43:18 +0800 | [diff] [blame] | 2071 | |
David Hildenbrand | 8dbe22c | 2021-05-10 13:43:21 +0200 | [diff] [blame] | 2072 | assert((ram_flags & ~(RAM_SHARED | RAM_RESIZEABLE | RAM_PREALLOC | |
Xiaoyao Li | 15f7a80 | 2024-03-20 03:39:02 -0500 | [diff] [blame] | 2073 | RAM_NORESERVE | RAM_GUEST_MEMFD)) == 0); |
David Hildenbrand | ebef62d | 2021-05-10 13:43:19 +0200 | [diff] [blame] | 2074 | assert(!host ^ (ram_flags & RAM_PREALLOC)); |
| 2075 | |
Richard Henderson | 9260bd4 | 2024-01-02 12:57:49 +1100 | [diff] [blame] | 2076 | align = qemu_real_host_page_size(); |
| 2077 | align = MAX(align, TARGET_PAGE_SIZE); |
| 2078 | size = ROUND_UP(size, align); |
| 2079 | max_size = ROUND_UP(max_size, align); |
| 2080 | |
Paolo Bonzini | e1c57ab | 2014-05-14 17:43:18 +0800 | [diff] [blame] | 2081 | new_block = g_malloc0(sizeof(*new_block)); |
| 2082 | new_block->mr = mr; |
Michael S. Tsirkin | 62be4e3 | 2014-11-12 14:27:41 +0200 | [diff] [blame] | 2083 | new_block->resized = resized; |
Michael S. Tsirkin | 9b8424d | 2014-12-15 22:55:32 +0200 | [diff] [blame] | 2084 | new_block->used_length = size; |
| 2085 | new_block->max_length = max_size; |
Michael S. Tsirkin | 62be4e3 | 2014-11-12 14:27:41 +0200 | [diff] [blame] | 2086 | assert(max_size >= size); |
Paolo Bonzini | e1c57ab | 2014-05-14 17:43:18 +0800 | [diff] [blame] | 2087 | new_block->fd = -1; |
Xiaoyao Li | 15f7a80 | 2024-03-20 03:39:02 -0500 | [diff] [blame] | 2088 | new_block->guest_memfd = -1; |
Marc-André Lureau | 8e3b0cb | 2022-03-23 19:57:22 +0400 | [diff] [blame] | 2089 | new_block->page_size = qemu_real_host_page_size(); |
Paolo Bonzini | e1c57ab | 2014-05-14 17:43:18 +0800 | [diff] [blame] | 2090 | new_block->host = host; |
David Hildenbrand | ebef62d | 2021-05-10 13:43:19 +0200 | [diff] [blame] | 2091 | new_block->flags = ram_flags; |
David Hildenbrand | 7ce18ca | 2021-04-06 10:01:24 +0200 | [diff] [blame] | 2092 | ram_block_add(new_block, &local_err); |
Hu Tao | ef701d7 | 2014-09-09 13:27:54 +0800 | [diff] [blame] | 2093 | if (local_err) { |
| 2094 | g_free(new_block); |
| 2095 | error_propagate(errp, local_err); |
Fam Zheng | 528f46a | 2016-03-01 14:18:18 +0800 | [diff] [blame] | 2096 | return NULL; |
Hu Tao | ef701d7 | 2014-09-09 13:27:54 +0800 | [diff] [blame] | 2097 | } |
Fam Zheng | 528f46a | 2016-03-01 14:18:18 +0800 | [diff] [blame] | 2098 | return new_block; |
Paolo Bonzini | e1c57ab | 2014-05-14 17:43:18 +0800 | [diff] [blame] | 2099 | } |
| 2100 | |
Fam Zheng | 528f46a | 2016-03-01 14:18:18 +0800 | [diff] [blame] | 2101 | RAMBlock *qemu_ram_alloc_from_ptr(ram_addr_t size, void *host, |
Michael S. Tsirkin | 62be4e3 | 2014-11-12 14:27:41 +0200 | [diff] [blame] | 2102 | MemoryRegion *mr, Error **errp) |
| 2103 | { |
David Hildenbrand | ebef62d | 2021-05-10 13:43:19 +0200 | [diff] [blame] | 2104 | return qemu_ram_alloc_internal(size, size, NULL, host, RAM_PREALLOC, mr, |
| 2105 | errp); |
Michael S. Tsirkin | 62be4e3 | 2014-11-12 14:27:41 +0200 | [diff] [blame] | 2106 | } |
| 2107 | |
David Hildenbrand | ebef62d | 2021-05-10 13:43:19 +0200 | [diff] [blame] | 2108 | RAMBlock *qemu_ram_alloc(ram_addr_t size, uint32_t ram_flags, |
Marcel Apfelbaum | 06329cc | 2017-12-13 16:37:37 +0200 | [diff] [blame] | 2109 | MemoryRegion *mr, Error **errp) |
pbrook | 94a6b54 | 2009-04-11 17:15:54 +0000 | [diff] [blame] | 2110 | { |
Xiaoyao Li | 15f7a80 | 2024-03-20 03:39:02 -0500 | [diff] [blame] | 2111 | assert((ram_flags & ~(RAM_SHARED | RAM_NORESERVE | RAM_GUEST_MEMFD)) == 0); |
David Hildenbrand | ebef62d | 2021-05-10 13:43:19 +0200 | [diff] [blame] | 2112 | return qemu_ram_alloc_internal(size, size, NULL, NULL, ram_flags, mr, errp); |
Michael S. Tsirkin | 62be4e3 | 2014-11-12 14:27:41 +0200 | [diff] [blame] | 2113 | } |
| 2114 | |
Fam Zheng | 528f46a | 2016-03-01 14:18:18 +0800 | [diff] [blame] | 2115 | RAMBlock *qemu_ram_alloc_resizeable(ram_addr_t size, ram_addr_t maxsz, |
Michael S. Tsirkin | 62be4e3 | 2014-11-12 14:27:41 +0200 | [diff] [blame] | 2116 | void (*resized)(const char*, |
| 2117 | uint64_t length, |
| 2118 | void *host), |
| 2119 | MemoryRegion *mr, Error **errp) |
| 2120 | { |
David Hildenbrand | ebef62d | 2021-05-10 13:43:19 +0200 | [diff] [blame] | 2121 | return qemu_ram_alloc_internal(size, maxsz, resized, NULL, |
| 2122 | RAM_RESIZEABLE, mr, errp); |
pbrook | 94a6b54 | 2009-04-11 17:15:54 +0000 | [diff] [blame] | 2123 | } |
bellard | e9a1ab1 | 2007-02-08 23:08:38 +0000 | [diff] [blame] | 2124 | |
Paolo Bonzini | 4377153 | 2013-09-09 17:58:40 +0200 | [diff] [blame] | 2125 | static void reclaim_ramblock(RAMBlock *block) |
| 2126 | { |
| 2127 | if (block->flags & RAM_PREALLOC) { |
| 2128 | ; |
| 2129 | } else if (xen_enabled()) { |
| 2130 | xen_invalidate_map_cache_entry(block->host); |
| 2131 | #ifndef _WIN32 |
| 2132 | } else if (block->fd >= 0) { |
Murilo Opsfelder Araujo | 53adb9d | 2019-01-30 21:36:05 -0200 | [diff] [blame] | 2133 | qemu_ram_munmap(block->fd, block->host, block->max_length); |
Paolo Bonzini | 4377153 | 2013-09-09 17:58:40 +0200 | [diff] [blame] | 2134 | close(block->fd); |
| 2135 | #endif |
| 2136 | } else { |
| 2137 | qemu_anon_ram_free(block->host, block->max_length); |
| 2138 | } |
Xiaoyao Li | 15f7a80 | 2024-03-20 03:39:02 -0500 | [diff] [blame] | 2139 | |
| 2140 | if (block->guest_memfd >= 0) { |
| 2141 | close(block->guest_memfd); |
Paolo Bonzini | 852f004 | 2024-03-20 17:45:29 +0100 | [diff] [blame] | 2142 | ram_block_discard_require(false); |
Xiaoyao Li | 15f7a80 | 2024-03-20 03:39:02 -0500 | [diff] [blame] | 2143 | } |
| 2144 | |
Paolo Bonzini | 4377153 | 2013-09-09 17:58:40 +0200 | [diff] [blame] | 2145 | g_free(block); |
| 2146 | } |
| 2147 | |
Fam Zheng | f1060c5 | 2016-03-01 14:18:22 +0800 | [diff] [blame] | 2148 | void qemu_ram_free(RAMBlock *block) |
bellard | e9a1ab1 | 2007-02-08 23:08:38 +0000 | [diff] [blame] | 2149 | { |
Marc-André Lureau | 85bc2a1 | 2016-03-29 13:20:51 +0200 | [diff] [blame] | 2150 | if (!block) { |
| 2151 | return; |
| 2152 | } |
| 2153 | |
Paolo Bonzini | 0987d73 | 2016-12-21 00:31:36 +0800 | [diff] [blame] | 2154 | if (block->host) { |
David Hildenbrand | 8f44304 | 2021-04-29 13:27:00 +0200 | [diff] [blame] | 2155 | ram_block_notify_remove(block->host, block->used_length, |
| 2156 | block->max_length); |
Paolo Bonzini | 0987d73 | 2016-12-21 00:31:36 +0800 | [diff] [blame] | 2157 | } |
| 2158 | |
Umesh Deshpande | b2a8658 | 2011-08-17 00:01:33 -0700 | [diff] [blame] | 2159 | qemu_mutex_lock_ramlist(); |
Fam Zheng | f1060c5 | 2016-03-01 14:18:22 +0800 | [diff] [blame] | 2160 | QLIST_REMOVE_RCU(block, next); |
| 2161 | ram_list.mru_block = NULL; |
| 2162 | /* Write list before version */ |
| 2163 | smp_wmb(); |
| 2164 | ram_list.version++; |
| 2165 | call_rcu(block, reclaim_ramblock, rcu); |
Umesh Deshpande | b2a8658 | 2011-08-17 00:01:33 -0700 | [diff] [blame] | 2166 | qemu_mutex_unlock_ramlist(); |
bellard | e9a1ab1 | 2007-02-08 23:08:38 +0000 | [diff] [blame] | 2167 | } |
| 2168 | |
Huang Ying | cd19cfa | 2011-03-02 08:56:19 +0100 | [diff] [blame] | 2169 | #ifndef _WIN32 |
| 2170 | void qemu_ram_remap(ram_addr_t addr, ram_addr_t length) |
| 2171 | { |
| 2172 | RAMBlock *block; |
| 2173 | ram_addr_t offset; |
| 2174 | int flags; |
| 2175 | void *area, *vaddr; |
David Hildenbrand | 9e6b9f3 | 2023-09-06 14:04:56 +0200 | [diff] [blame] | 2176 | int prot; |
Huang Ying | cd19cfa | 2011-03-02 08:56:19 +0100 | [diff] [blame] | 2177 | |
Peter Xu | 99e1558 | 2017-05-12 12:17:39 +0800 | [diff] [blame] | 2178 | RAMBLOCK_FOREACH(block) { |
Huang Ying | cd19cfa | 2011-03-02 08:56:19 +0100 | [diff] [blame] | 2179 | offset = addr - block->offset; |
Michael S. Tsirkin | 9b8424d | 2014-12-15 22:55:32 +0200 | [diff] [blame] | 2180 | if (offset < block->max_length) { |
Michael S. Tsirkin | 1240be2 | 2014-11-12 11:44:41 +0200 | [diff] [blame] | 2181 | vaddr = ramblock_ptr(block, offset); |
Paolo Bonzini | 7bd4f43 | 2014-05-14 17:43:22 +0800 | [diff] [blame] | 2182 | if (block->flags & RAM_PREALLOC) { |
Huang Ying | cd19cfa | 2011-03-02 08:56:19 +0100 | [diff] [blame] | 2183 | ; |
Markus Armbruster | dfeaf2a | 2013-07-31 15:11:05 +0200 | [diff] [blame] | 2184 | } else if (xen_enabled()) { |
| 2185 | abort(); |
Huang Ying | cd19cfa | 2011-03-02 08:56:19 +0100 | [diff] [blame] | 2186 | } else { |
| 2187 | flags = MAP_FIXED; |
David Hildenbrand | dbb92ee | 2021-04-06 10:01:26 +0200 | [diff] [blame] | 2188 | flags |= block->flags & RAM_SHARED ? |
| 2189 | MAP_SHARED : MAP_PRIVATE; |
David Hildenbrand | d94e0bc | 2021-05-10 13:43:22 +0200 | [diff] [blame] | 2190 | flags |= block->flags & RAM_NORESERVE ? MAP_NORESERVE : 0; |
David Hildenbrand | 9e6b9f3 | 2023-09-06 14:04:56 +0200 | [diff] [blame] | 2191 | prot = PROT_READ; |
| 2192 | prot |= block->flags & RAM_READONLY ? 0 : PROT_WRITE; |
Markus Armbruster | 3435f39 | 2013-07-31 15:11:07 +0200 | [diff] [blame] | 2193 | if (block->fd >= 0) { |
David Hildenbrand | 9e6b9f3 | 2023-09-06 14:04:56 +0200 | [diff] [blame] | 2194 | area = mmap(vaddr, length, prot, flags, block->fd, |
| 2195 | offset + block->fd_offset); |
Huang Ying | cd19cfa | 2011-03-02 08:56:19 +0100 | [diff] [blame] | 2196 | } else { |
David Hildenbrand | dbb92ee | 2021-04-06 10:01:26 +0200 | [diff] [blame] | 2197 | flags |= MAP_ANONYMOUS; |
David Hildenbrand | 9e6b9f3 | 2023-09-06 14:04:56 +0200 | [diff] [blame] | 2198 | area = mmap(vaddr, length, prot, flags, -1, 0); |
Huang Ying | cd19cfa | 2011-03-02 08:56:19 +0100 | [diff] [blame] | 2199 | } |
| 2200 | if (area != vaddr) { |
Alistair Francis | 493d89b | 2018-02-03 09:43:14 +0100 | [diff] [blame] | 2201 | error_report("Could not remap addr: " |
| 2202 | RAM_ADDR_FMT "@" RAM_ADDR_FMT "", |
| 2203 | length, addr); |
Huang Ying | cd19cfa | 2011-03-02 08:56:19 +0100 | [diff] [blame] | 2204 | exit(1); |
| 2205 | } |
Luiz Capitulino | 8490fc7 | 2012-09-05 16:50:16 -0300 | [diff] [blame] | 2206 | memory_try_enable_merging(vaddr, length); |
Jason Baron | ddb97f1 | 2012-08-02 15:44:16 -0400 | [diff] [blame] | 2207 | qemu_ram_setup_dump(vaddr, length); |
Huang Ying | cd19cfa | 2011-03-02 08:56:19 +0100 | [diff] [blame] | 2208 | } |
Huang Ying | cd19cfa | 2011-03-02 08:56:19 +0100 | [diff] [blame] | 2209 | } |
| 2210 | } |
| 2211 | } |
| 2212 | #endif /* !_WIN32 */ |
| 2213 | |
Juergen Gross | a99dd33 | 2023-10-05 11:17:13 -0700 | [diff] [blame] | 2214 | /* |
| 2215 | * Return a host pointer to guest's ram. |
Edgar E. Iglesias | 5a5585f | 2024-04-30 18:49:35 +0200 | [diff] [blame] | 2216 | * For Xen, foreign mappings get created if they don't already exist. |
Mike Day | 0dc3f44 | 2013-09-05 14:41:35 -0400 | [diff] [blame] | 2217 | * |
Edgar E. Iglesias | 5a5585f | 2024-04-30 18:49:35 +0200 | [diff] [blame] | 2218 | * @block: block for the RAM to lookup (optional and may be NULL). |
| 2219 | * @addr: address within the memory region. |
| 2220 | * @size: pointer to requested size (optional and may be NULL). |
| 2221 | * size may get modified and return a value smaller than |
| 2222 | * what was requested. |
| 2223 | * @lock: wether to lock the mapping in xen-mapcache until invalidated. |
| 2224 | * @is_write: hint wether to map RW or RO in the xen-mapcache. |
| 2225 | * (optional and may always be set to true). |
Mike Day | 0dc3f44 | 2013-09-05 14:41:35 -0400 | [diff] [blame] | 2226 | * |
Paolo Bonzini | e81bcda | 2015-12-16 10:31:26 +0100 | [diff] [blame] | 2227 | * Called within RCU critical section. |
Mike Day | ae3a704 | 2013-09-05 14:41:35 -0400 | [diff] [blame] | 2228 | */ |
Manos Pitsidianakis | aab4631 | 2024-02-15 11:15:06 +0200 | [diff] [blame] | 2229 | static void *qemu_ram_ptr_length(RAMBlock *block, ram_addr_t addr, |
Edgar E. Iglesias | 5a5585f | 2024-04-30 18:49:35 +0200 | [diff] [blame] | 2230 | hwaddr *size, bool lock, |
| 2231 | bool is_write) |
Stefano Stabellini | 38bee5d | 2011-05-19 18:35:45 +0100 | [diff] [blame] | 2232 | { |
Juergen Gross | a99dd33 | 2023-10-05 11:17:13 -0700 | [diff] [blame] | 2233 | hwaddr len = 0; |
| 2234 | |
| 2235 | if (size && *size == 0) { |
Stefano Stabellini | 8ab934f | 2011-06-27 18:26:06 +0100 | [diff] [blame] | 2236 | return NULL; |
| 2237 | } |
Paolo Bonzini | e81bcda | 2015-12-16 10:31:26 +0100 | [diff] [blame] | 2238 | |
Gonglei | 3655cb9 | 2016-02-20 10:35:20 +0800 | [diff] [blame] | 2239 | if (block == NULL) { |
| 2240 | block = qemu_get_ram_block(addr); |
Paolo Bonzini | 0878d0e | 2016-02-22 11:02:12 +0100 | [diff] [blame] | 2241 | addr -= block->offset; |
Gonglei | 3655cb9 | 2016-02-20 10:35:20 +0800 | [diff] [blame] | 2242 | } |
Juergen Gross | a99dd33 | 2023-10-05 11:17:13 -0700 | [diff] [blame] | 2243 | if (size) { |
| 2244 | *size = MIN(*size, block->max_length - addr); |
| 2245 | len = *size; |
| 2246 | } |
Paolo Bonzini | e81bcda | 2015-12-16 10:31:26 +0100 | [diff] [blame] | 2247 | |
| 2248 | if (xen_enabled() && block->host == NULL) { |
| 2249 | /* We need to check if the requested address is in the RAM |
| 2250 | * because we don't want to map the entire memory in QEMU. |
| 2251 | * In that case just map the requested area. |
| 2252 | */ |
Edgar E. Iglesias | a5bdc45 | 2024-05-03 03:44:46 +0200 | [diff] [blame] | 2253 | if (xen_mr_is_memory(block->mr)) { |
Edgar E. Iglesias | 5d1c260 | 2024-05-03 03:44:45 +0200 | [diff] [blame] | 2254 | return xen_map_cache(block->mr, block->offset + addr, |
Edgar E. Iglesias | 49a7202 | 2024-04-30 10:14:01 +0200 | [diff] [blame] | 2255 | len, block->offset, |
| 2256 | lock, lock, is_write); |
Stefano Stabellini | 38bee5d | 2011-05-19 18:35:45 +0100 | [diff] [blame] | 2257 | } |
| 2258 | |
Edgar E. Iglesias | 5a5585f | 2024-04-30 18:49:35 +0200 | [diff] [blame] | 2259 | block->host = xen_map_cache(block->mr, block->offset, |
Edgar E. Iglesias | 49a7202 | 2024-04-30 10:14:01 +0200 | [diff] [blame] | 2260 | block->max_length, |
| 2261 | block->offset, |
| 2262 | 1, lock, is_write); |
Stefano Stabellini | 38bee5d | 2011-05-19 18:35:45 +0100 | [diff] [blame] | 2263 | } |
Paolo Bonzini | e81bcda | 2015-12-16 10:31:26 +0100 | [diff] [blame] | 2264 | |
Paolo Bonzini | 0878d0e | 2016-02-22 11:02:12 +0100 | [diff] [blame] | 2265 | return ramblock_ptr(block, addr); |
Stefano Stabellini | 38bee5d | 2011-05-19 18:35:45 +0100 | [diff] [blame] | 2266 | } |
| 2267 | |
Juergen Gross | a99dd33 | 2023-10-05 11:17:13 -0700 | [diff] [blame] | 2268 | /* |
| 2269 | * Return a host pointer to ram allocated with qemu_ram_alloc. |
| 2270 | * This should not be used for general purpose DMA. Use address_space_map |
| 2271 | * or address_space_rw instead. For local memory (e.g. video ram) that the |
| 2272 | * device owns, use memory_region_get_ram_ptr. |
| 2273 | * |
| 2274 | * Called within RCU critical section. |
| 2275 | */ |
| 2276 | void *qemu_map_ram_ptr(RAMBlock *ram_block, ram_addr_t addr) |
| 2277 | { |
Edgar E. Iglesias | 5a5585f | 2024-04-30 18:49:35 +0200 | [diff] [blame] | 2278 | return qemu_ram_ptr_length(ram_block, addr, NULL, false, true); |
Juergen Gross | a99dd33 | 2023-10-05 11:17:13 -0700 | [diff] [blame] | 2279 | } |
| 2280 | |
Dr. David Alan Gilbert | f90bb71 | 2018-03-12 17:20:57 +0000 | [diff] [blame] | 2281 | /* Return the offset of a hostpointer within a ramblock */ |
| 2282 | ram_addr_t qemu_ram_block_host_offset(RAMBlock *rb, void *host) |
| 2283 | { |
| 2284 | ram_addr_t res = (uint8_t *)host - (uint8_t *)rb->host; |
| 2285 | assert((uintptr_t)host >= (uintptr_t)rb->host); |
| 2286 | assert(res < rb->max_length); |
| 2287 | |
| 2288 | return res; |
| 2289 | } |
| 2290 | |
Dr. David Alan Gilbert | 422148d | 2015-11-05 18:10:32 +0000 | [diff] [blame] | 2291 | RAMBlock *qemu_ram_block_from_host(void *ptr, bool round_offset, |
Dr. David Alan Gilbert | 422148d | 2015-11-05 18:10:32 +0000 | [diff] [blame] | 2292 | ram_addr_t *offset) |
pbrook | 5579c7f | 2009-04-11 14:47:08 +0000 | [diff] [blame] | 2293 | { |
pbrook | 94a6b54 | 2009-04-11 17:15:54 +0000 | [diff] [blame] | 2294 | RAMBlock *block; |
| 2295 | uint8_t *host = ptr; |
| 2296 | |
Jan Kiszka | 868bb33 | 2011-06-21 22:59:09 +0200 | [diff] [blame] | 2297 | if (xen_enabled()) { |
Paolo Bonzini | f615f39 | 2016-05-26 10:07:50 +0200 | [diff] [blame] | 2298 | ram_addr_t ram_addr; |
Dr. David Alan Gilbert | 694ea27 | 2019-10-07 15:36:41 +0100 | [diff] [blame] | 2299 | RCU_READ_LOCK_GUARD(); |
Paolo Bonzini | f615f39 | 2016-05-26 10:07:50 +0200 | [diff] [blame] | 2300 | ram_addr = xen_ram_addr_from_mapcache(ptr); |
Edgar E. Iglesias | 596cccc | 2024-07-02 00:44:20 +0200 | [diff] [blame] | 2301 | if (ram_addr == RAM_ADDR_INVALID) { |
| 2302 | return NULL; |
| 2303 | } |
| 2304 | |
Paolo Bonzini | f615f39 | 2016-05-26 10:07:50 +0200 | [diff] [blame] | 2305 | block = qemu_get_ram_block(ram_addr); |
Dr. David Alan Gilbert | 422148d | 2015-11-05 18:10:32 +0000 | [diff] [blame] | 2306 | if (block) { |
Anthony PERARD | d6b6aec | 2016-06-09 16:56:17 +0100 | [diff] [blame] | 2307 | *offset = ram_addr - block->offset; |
Dr. David Alan Gilbert | 422148d | 2015-11-05 18:10:32 +0000 | [diff] [blame] | 2308 | } |
Dr. David Alan Gilbert | 422148d | 2015-11-05 18:10:32 +0000 | [diff] [blame] | 2309 | return block; |
Stefano Stabellini | 712c2b4 | 2011-05-19 18:35:46 +0100 | [diff] [blame] | 2310 | } |
| 2311 | |
Dr. David Alan Gilbert | 694ea27 | 2019-10-07 15:36:41 +0100 | [diff] [blame] | 2312 | RCU_READ_LOCK_GUARD(); |
Stefan Hajnoczi | d73415a | 2020-09-23 11:56:46 +0100 | [diff] [blame] | 2313 | block = qatomic_rcu_read(&ram_list.mru_block); |
Michael S. Tsirkin | 9b8424d | 2014-12-15 22:55:32 +0200 | [diff] [blame] | 2314 | if (block && block->host && host - block->host < block->max_length) { |
Paolo Bonzini | 23887b7 | 2013-05-06 14:28:39 +0200 | [diff] [blame] | 2315 | goto found; |
| 2316 | } |
| 2317 | |
Peter Xu | 99e1558 | 2017-05-12 12:17:39 +0800 | [diff] [blame] | 2318 | RAMBLOCK_FOREACH(block) { |
Jun Nakajima | 432d268 | 2010-08-31 16:41:25 +0100 | [diff] [blame] | 2319 | /* This case append when the block is not mapped. */ |
| 2320 | if (block->host == NULL) { |
| 2321 | continue; |
| 2322 | } |
Michael S. Tsirkin | 9b8424d | 2014-12-15 22:55:32 +0200 | [diff] [blame] | 2323 | if (host - block->host < block->max_length) { |
Paolo Bonzini | 23887b7 | 2013-05-06 14:28:39 +0200 | [diff] [blame] | 2324 | goto found; |
Alex Williamson | f471a17 | 2010-06-11 11:11:42 -0600 | [diff] [blame] | 2325 | } |
pbrook | 94a6b54 | 2009-04-11 17:15:54 +0000 | [diff] [blame] | 2326 | } |
Jun Nakajima | 432d268 | 2010-08-31 16:41:25 +0100 | [diff] [blame] | 2327 | |
Paolo Bonzini | 1b5ec23 | 2013-05-06 14:36:15 +0200 | [diff] [blame] | 2328 | return NULL; |
Paolo Bonzini | 23887b7 | 2013-05-06 14:28:39 +0200 | [diff] [blame] | 2329 | |
| 2330 | found: |
Dr. David Alan Gilbert | 422148d | 2015-11-05 18:10:32 +0000 | [diff] [blame] | 2331 | *offset = (host - block->host); |
| 2332 | if (round_offset) { |
| 2333 | *offset &= TARGET_PAGE_MASK; |
| 2334 | } |
Dr. David Alan Gilbert | 422148d | 2015-11-05 18:10:32 +0000 | [diff] [blame] | 2335 | return block; |
| 2336 | } |
| 2337 | |
Dr. David Alan Gilbert | e3dd749 | 2015-11-05 18:10:33 +0000 | [diff] [blame] | 2338 | /* |
| 2339 | * Finds the named RAMBlock |
| 2340 | * |
| 2341 | * name: The name of RAMBlock to find |
| 2342 | * |
| 2343 | * Returns: RAMBlock (or NULL if not found) |
| 2344 | */ |
| 2345 | RAMBlock *qemu_ram_block_by_name(const char *name) |
| 2346 | { |
| 2347 | RAMBlock *block; |
| 2348 | |
Peter Xu | 99e1558 | 2017-05-12 12:17:39 +0800 | [diff] [blame] | 2349 | RAMBLOCK_FOREACH(block) { |
Dr. David Alan Gilbert | e3dd749 | 2015-11-05 18:10:33 +0000 | [diff] [blame] | 2350 | if (!strcmp(name, block->idstr)) { |
| 2351 | return block; |
| 2352 | } |
| 2353 | } |
| 2354 | |
| 2355 | return NULL; |
| 2356 | } |
| 2357 | |
Philippe Mathieu-Daudé | 8d7f2e7 | 2023-10-04 11:06:28 +0200 | [diff] [blame] | 2358 | /* |
| 2359 | * Some of the system routines need to translate from a host pointer |
| 2360 | * (typically a TLB entry) back to a ram offset. |
| 2361 | */ |
Paolo Bonzini | 07bdaa4 | 2016-03-25 12:55:08 +0100 | [diff] [blame] | 2362 | ram_addr_t qemu_ram_addr_from_host(void *ptr) |
Dr. David Alan Gilbert | 422148d | 2015-11-05 18:10:32 +0000 | [diff] [blame] | 2363 | { |
| 2364 | RAMBlock *block; |
Paolo Bonzini | f615f39 | 2016-05-26 10:07:50 +0200 | [diff] [blame] | 2365 | ram_addr_t offset; |
Dr. David Alan Gilbert | 422148d | 2015-11-05 18:10:32 +0000 | [diff] [blame] | 2366 | |
Paolo Bonzini | f615f39 | 2016-05-26 10:07:50 +0200 | [diff] [blame] | 2367 | block = qemu_ram_block_from_host(ptr, false, &offset); |
Dr. David Alan Gilbert | 422148d | 2015-11-05 18:10:32 +0000 | [diff] [blame] | 2368 | if (!block) { |
Paolo Bonzini | 07bdaa4 | 2016-03-25 12:55:08 +0100 | [diff] [blame] | 2369 | return RAM_ADDR_INVALID; |
Dr. David Alan Gilbert | 422148d | 2015-11-05 18:10:32 +0000 | [diff] [blame] | 2370 | } |
| 2371 | |
Paolo Bonzini | 07bdaa4 | 2016-03-25 12:55:08 +0100 | [diff] [blame] | 2372 | return block->offset + offset; |
Marcelo Tosatti | e890261 | 2010-10-11 15:31:19 -0300 | [diff] [blame] | 2373 | } |
Alex Williamson | f471a17 | 2010-06-11 11:11:42 -0600 | [diff] [blame] | 2374 | |
Richard Henderson | 97e0346 | 2022-08-10 12:04:15 -0700 | [diff] [blame] | 2375 | ram_addr_t qemu_ram_addr_from_host_nofail(void *ptr) |
| 2376 | { |
| 2377 | ram_addr_t ram_addr; |
| 2378 | |
| 2379 | ram_addr = qemu_ram_addr_from_host(ptr); |
| 2380 | if (ram_addr == RAM_ADDR_INVALID) { |
| 2381 | error_report("Bad ram pointer %p", ptr); |
| 2382 | abort(); |
| 2383 | } |
| 2384 | return ram_addr; |
| 2385 | } |
| 2386 | |
Paolo Bonzini | b2a44fc | 2018-03-05 00:19:49 +0100 | [diff] [blame] | 2387 | static MemTxResult flatview_read(FlatView *fv, hwaddr addr, |
Philippe Mathieu-Daudé | a152be4 | 2020-02-19 19:52:44 +0100 | [diff] [blame] | 2388 | MemTxAttrs attrs, void *buf, hwaddr len); |
Alexey Kardashevskiy | 1662068 | 2017-09-21 18:50:58 +1000 | [diff] [blame] | 2389 | static MemTxResult flatview_write(FlatView *fv, hwaddr addr, MemTxAttrs attrs, |
Philippe Mathieu-Daudé | a152be4 | 2020-02-19 19:52:44 +0100 | [diff] [blame] | 2390 | const void *buf, hwaddr len); |
Li Zhijian | 0c249ff | 2019-01-17 20:49:01 +0800 | [diff] [blame] | 2391 | static bool flatview_access_valid(FlatView *fv, hwaddr addr, hwaddr len, |
Peter Maydell | eace72b | 2018-05-31 14:50:52 +0100 | [diff] [blame] | 2392 | bool is_write, MemTxAttrs attrs); |
Alexey Kardashevskiy | 1662068 | 2017-09-21 18:50:58 +1000 | [diff] [blame] | 2393 | |
Peter Maydell | f25a49e | 2015-04-26 16:49:24 +0100 | [diff] [blame] | 2394 | static MemTxResult subpage_read(void *opaque, hwaddr addr, uint64_t *data, |
| 2395 | unsigned len, MemTxAttrs attrs) |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 2396 | { |
Jan Kiszka | acc9d80 | 2013-05-26 21:55:37 +0200 | [diff] [blame] | 2397 | subpage_t *subpage = opaque; |
Paolo Bonzini | ff6cff7 | 2014-12-22 13:11:39 +0100 | [diff] [blame] | 2398 | uint8_t buf[8]; |
Peter Maydell | 5c9eb02 | 2015-04-26 16:49:24 +0100 | [diff] [blame] | 2399 | MemTxResult res; |
Paolo Bonzini | 791af8c | 2013-05-24 16:10:39 +0200 | [diff] [blame] | 2400 | |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 2401 | #if defined(DEBUG_SUBPAGE) |
Philippe Mathieu-Daudé | 883f2c5 | 2023-01-10 22:29:47 +0100 | [diff] [blame] | 2402 | printf("%s: subpage %p len %u addr " HWADDR_FMT_plx "\n", __func__, |
Jan Kiszka | acc9d80 | 2013-05-26 21:55:37 +0200 | [diff] [blame] | 2403 | subpage, len, addr); |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 2404 | #endif |
Alexey Kardashevskiy | 1662068 | 2017-09-21 18:50:58 +1000 | [diff] [blame] | 2405 | res = flatview_read(subpage->fv, addr + subpage->base, attrs, buf, len); |
Peter Maydell | 5c9eb02 | 2015-04-26 16:49:24 +0100 | [diff] [blame] | 2406 | if (res) { |
| 2407 | return res; |
Peter Maydell | f25a49e | 2015-04-26 16:49:24 +0100 | [diff] [blame] | 2408 | } |
Peter Maydell | 6d3ede5 | 2018-06-15 14:57:14 +0100 | [diff] [blame] | 2409 | *data = ldn_p(buf, len); |
| 2410 | return MEMTX_OK; |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 2411 | } |
| 2412 | |
Peter Maydell | f25a49e | 2015-04-26 16:49:24 +0100 | [diff] [blame] | 2413 | static MemTxResult subpage_write(void *opaque, hwaddr addr, |
| 2414 | uint64_t value, unsigned len, MemTxAttrs attrs) |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 2415 | { |
Jan Kiszka | acc9d80 | 2013-05-26 21:55:37 +0200 | [diff] [blame] | 2416 | subpage_t *subpage = opaque; |
Paolo Bonzini | ff6cff7 | 2014-12-22 13:11:39 +0100 | [diff] [blame] | 2417 | uint8_t buf[8]; |
Jan Kiszka | acc9d80 | 2013-05-26 21:55:37 +0200 | [diff] [blame] | 2418 | |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 2419 | #if defined(DEBUG_SUBPAGE) |
Philippe Mathieu-Daudé | 883f2c5 | 2023-01-10 22:29:47 +0100 | [diff] [blame] | 2420 | printf("%s: subpage %p len %u addr " HWADDR_FMT_plx |
Jan Kiszka | acc9d80 | 2013-05-26 21:55:37 +0200 | [diff] [blame] | 2421 | " value %"PRIx64"\n", |
| 2422 | __func__, subpage, len, addr, value); |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 2423 | #endif |
Peter Maydell | 6d3ede5 | 2018-06-15 14:57:14 +0100 | [diff] [blame] | 2424 | stn_p(buf, len, value); |
Alexey Kardashevskiy | 1662068 | 2017-09-21 18:50:58 +1000 | [diff] [blame] | 2425 | return flatview_write(subpage->fv, addr + subpage->base, attrs, buf, len); |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 2426 | } |
| 2427 | |
Paolo Bonzini | c353e4c | 2013-05-24 14:02:39 +0200 | [diff] [blame] | 2428 | static bool subpage_accepts(void *opaque, hwaddr addr, |
Peter Maydell | 8372d38 | 2018-05-31 14:50:52 +0100 | [diff] [blame] | 2429 | unsigned len, bool is_write, |
| 2430 | MemTxAttrs attrs) |
Paolo Bonzini | c353e4c | 2013-05-24 14:02:39 +0200 | [diff] [blame] | 2431 | { |
Jan Kiszka | acc9d80 | 2013-05-26 21:55:37 +0200 | [diff] [blame] | 2432 | subpage_t *subpage = opaque; |
Paolo Bonzini | c353e4c | 2013-05-24 14:02:39 +0200 | [diff] [blame] | 2433 | #if defined(DEBUG_SUBPAGE) |
Philippe Mathieu-Daudé | 883f2c5 | 2023-01-10 22:29:47 +0100 | [diff] [blame] | 2434 | printf("%s: subpage %p %c len %u addr " HWADDR_FMT_plx "\n", |
Jan Kiszka | acc9d80 | 2013-05-26 21:55:37 +0200 | [diff] [blame] | 2435 | __func__, subpage, is_write ? 'w' : 'r', len, addr); |
Paolo Bonzini | c353e4c | 2013-05-24 14:02:39 +0200 | [diff] [blame] | 2436 | #endif |
| 2437 | |
Alexey Kardashevskiy | 1662068 | 2017-09-21 18:50:58 +1000 | [diff] [blame] | 2438 | return flatview_access_valid(subpage->fv, addr + subpage->base, |
Peter Maydell | eace72b | 2018-05-31 14:50:52 +0100 | [diff] [blame] | 2439 | len, is_write, attrs); |
Paolo Bonzini | c353e4c | 2013-05-24 14:02:39 +0200 | [diff] [blame] | 2440 | } |
| 2441 | |
Avi Kivity | 70c68e4 | 2012-01-02 12:32:48 +0200 | [diff] [blame] | 2442 | static const MemoryRegionOps subpage_ops = { |
Peter Maydell | f25a49e | 2015-04-26 16:49:24 +0100 | [diff] [blame] | 2443 | .read_with_attrs = subpage_read, |
| 2444 | .write_with_attrs = subpage_write, |
Paolo Bonzini | ff6cff7 | 2014-12-22 13:11:39 +0100 | [diff] [blame] | 2445 | .impl.min_access_size = 1, |
| 2446 | .impl.max_access_size = 8, |
| 2447 | .valid.min_access_size = 1, |
| 2448 | .valid.max_access_size = 8, |
Paolo Bonzini | c353e4c | 2013-05-24 14:02:39 +0200 | [diff] [blame] | 2449 | .valid.accepts = subpage_accepts, |
Avi Kivity | 70c68e4 | 2012-01-02 12:32:48 +0200 | [diff] [blame] | 2450 | .endianness = DEVICE_NATIVE_ENDIAN, |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 2451 | }; |
| 2452 | |
Wei Yang | b797ab1 | 2019-03-21 16:25:53 +0800 | [diff] [blame] | 2453 | static int subpage_register(subpage_t *mmio, uint32_t start, uint32_t end, |
| 2454 | uint16_t section) |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 2455 | { |
| 2456 | int idx, eidx; |
| 2457 | |
| 2458 | if (start >= TARGET_PAGE_SIZE || end >= TARGET_PAGE_SIZE) |
| 2459 | return -1; |
| 2460 | idx = SUBPAGE_IDX(start); |
| 2461 | eidx = SUBPAGE_IDX(end); |
| 2462 | #if defined(DEBUG_SUBPAGE) |
Amos Kong | 016e9d6 | 2013-09-27 09:25:38 +0800 | [diff] [blame] | 2463 | printf("%s: %p start %08x end %08x idx %08x eidx %08x section %d\n", |
| 2464 | __func__, mmio, start, end, idx, eidx, section); |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 2465 | #endif |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 2466 | for (; idx <= eidx; idx++) { |
Avi Kivity | 5312bd8 | 2012-02-12 18:32:55 +0200 | [diff] [blame] | 2467 | mmio->sub_section[idx] = section; |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 2468 | } |
| 2469 | |
| 2470 | return 0; |
| 2471 | } |
| 2472 | |
Alexey Kardashevskiy | 1662068 | 2017-09-21 18:50:58 +1000 | [diff] [blame] | 2473 | static subpage_t *subpage_init(FlatView *fv, hwaddr base) |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 2474 | { |
Anthony Liguori | c227f09 | 2009-10-01 16:12:16 -0500 | [diff] [blame] | 2475 | subpage_t *mmio; |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 2476 | |
Wei Yang | b797ab1 | 2019-03-21 16:25:53 +0800 | [diff] [blame] | 2477 | /* mmio->sub_section is set to PHYS_SECTION_UNASSIGNED with g_malloc0 */ |
Vijaya Kumar K | 2615fab | 2016-10-24 16:26:49 +0100 | [diff] [blame] | 2478 | mmio = g_malloc0(sizeof(subpage_t) + TARGET_PAGE_SIZE * sizeof(uint16_t)); |
Alexey Kardashevskiy | 1662068 | 2017-09-21 18:50:58 +1000 | [diff] [blame] | 2479 | mmio->fv = fv; |
aliguori | 1eec614 | 2009-02-05 22:06:18 +0000 | [diff] [blame] | 2480 | mmio->base = base; |
Paolo Bonzini | 2c9b15c | 2013-06-06 05:41:28 -0400 | [diff] [blame] | 2481 | memory_region_init_io(&mmio->iomem, NULL, &subpage_ops, mmio, |
Peter Crosthwaite | b4fefef | 2014-06-05 23:15:52 -0700 | [diff] [blame] | 2482 | NULL, TARGET_PAGE_SIZE); |
Avi Kivity | b3b00c7 | 2012-01-02 13:20:11 +0200 | [diff] [blame] | 2483 | mmio->iomem.subpage = true; |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 2484 | #if defined(DEBUG_SUBPAGE) |
Philippe Mathieu-Daudé | 883f2c5 | 2023-01-10 22:29:47 +0100 | [diff] [blame] | 2485 | printf("%s: %p base " HWADDR_FMT_plx " len %08x\n", __func__, |
Amos Kong | 016e9d6 | 2013-09-27 09:25:38 +0800 | [diff] [blame] | 2486 | mmio, base, TARGET_PAGE_SIZE); |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 2487 | #endif |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 2488 | |
| 2489 | return mmio; |
| 2490 | } |
| 2491 | |
Alexey Kardashevskiy | 1662068 | 2017-09-21 18:50:58 +1000 | [diff] [blame] | 2492 | static uint16_t dummy_section(PhysPageMap *map, FlatView *fv, MemoryRegion *mr) |
Avi Kivity | 5312bd8 | 2012-02-12 18:32:55 +0200 | [diff] [blame] | 2493 | { |
Alexey Kardashevskiy | 1662068 | 2017-09-21 18:50:58 +1000 | [diff] [blame] | 2494 | assert(fv); |
Avi Kivity | 5312bd8 | 2012-02-12 18:32:55 +0200 | [diff] [blame] | 2495 | MemoryRegionSection section = { |
Alexey Kardashevskiy | 1662068 | 2017-09-21 18:50:58 +1000 | [diff] [blame] | 2496 | .fv = fv, |
Avi Kivity | 5312bd8 | 2012-02-12 18:32:55 +0200 | [diff] [blame] | 2497 | .mr = mr, |
| 2498 | .offset_within_address_space = 0, |
| 2499 | .offset_within_region = 0, |
Paolo Bonzini | 052e87b | 2013-05-27 10:08:27 +0200 | [diff] [blame] | 2500 | .size = int128_2_64(), |
Avi Kivity | 5312bd8 | 2012-02-12 18:32:55 +0200 | [diff] [blame] | 2501 | }; |
| 2502 | |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 2503 | return phys_section_add(map, §ion); |
Avi Kivity | 5312bd8 | 2012-02-12 18:32:55 +0200 | [diff] [blame] | 2504 | } |
| 2505 | |
Peter Maydell | 2d54f19 | 2018-06-15 14:57:14 +0100 | [diff] [blame] | 2506 | MemoryRegionSection *iotlb_to_section(CPUState *cpu, |
| 2507 | hwaddr index, MemTxAttrs attrs) |
Avi Kivity | aa10223 | 2012-03-08 17:06:55 +0200 | [diff] [blame] | 2508 | { |
Peter Maydell | a54c87b | 2016-01-21 14:15:05 +0000 | [diff] [blame] | 2509 | int asidx = cpu_asidx_from_attrs(cpu, attrs); |
| 2510 | CPUAddressSpace *cpuas = &cpu->cpu_ases[asidx]; |
Richard Henderson | 0d58c66 | 2023-08-25 16:13:17 -0700 | [diff] [blame] | 2511 | AddressSpaceDispatch *d = cpuas->memory_dispatch; |
Richard Henderson | 86e4f93 | 2023-08-25 14:06:58 -0700 | [diff] [blame] | 2512 | int section_index = index & ~TARGET_PAGE_MASK; |
| 2513 | MemoryRegionSection *ret; |
Paolo Bonzini | 9d82b5a | 2013-08-16 08:26:30 +0200 | [diff] [blame] | 2514 | |
Richard Henderson | 86e4f93 | 2023-08-25 14:06:58 -0700 | [diff] [blame] | 2515 | assert(section_index < d->map.sections_nb); |
| 2516 | ret = d->map.sections + section_index; |
| 2517 | assert(ret->mr); |
| 2518 | assert(ret->mr->ops); |
| 2519 | |
| 2520 | return ret; |
Avi Kivity | aa10223 | 2012-03-08 17:06:55 +0200 | [diff] [blame] | 2521 | } |
| 2522 | |
Avi Kivity | e9179ce | 2009-06-14 11:38:52 +0300 | [diff] [blame] | 2523 | static void io_mem_init(void) |
| 2524 | { |
Paolo Bonzini | 2c9b15c | 2013-06-06 05:41:28 -0400 | [diff] [blame] | 2525 | memory_region_init_io(&io_mem_unassigned, NULL, &unassigned_mem_ops, NULL, |
Paolo Bonzini | 1f6245e | 2014-06-13 10:48:06 +0200 | [diff] [blame] | 2526 | NULL, UINT64_MAX); |
Avi Kivity | e9179ce | 2009-06-14 11:38:52 +0300 | [diff] [blame] | 2527 | } |
| 2528 | |
Alexey Kardashevskiy | 8629d3f | 2017-09-21 18:51:00 +1000 | [diff] [blame] | 2529 | AddressSpaceDispatch *address_space_dispatch_new(FlatView *fv) |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 2530 | { |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 2531 | AddressSpaceDispatch *d = g_new0(AddressSpaceDispatch, 1); |
| 2532 | uint16_t n; |
| 2533 | |
Alexey Kardashevskiy | 1662068 | 2017-09-21 18:50:58 +1000 | [diff] [blame] | 2534 | n = dummy_section(&d->map, fv, &io_mem_unassigned); |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 2535 | assert(n == PHYS_SECTION_UNASSIGNED); |
Paolo Bonzini | 0075270 | 2013-05-29 12:13:54 +0200 | [diff] [blame] | 2536 | |
Michael S. Tsirkin | 9736e55 | 2013-11-11 14:42:43 +0200 | [diff] [blame] | 2537 | d->phys_map = (PhysPageEntry) { .ptr = PHYS_MAP_NODE_NIL, .skip = 1 }; |
Alexey Kardashevskiy | 66a6df1 | 2017-09-21 18:50:56 +1000 | [diff] [blame] | 2538 | |
| 2539 | return d; |
Paolo Bonzini | 0075270 | 2013-05-29 12:13:54 +0200 | [diff] [blame] | 2540 | } |
| 2541 | |
Alexey Kardashevskiy | 66a6df1 | 2017-09-21 18:50:56 +1000 | [diff] [blame] | 2542 | void address_space_dispatch_free(AddressSpaceDispatch *d) |
Paolo Bonzini | 79e2b9a | 2015-01-21 12:09:14 +0100 | [diff] [blame] | 2543 | { |
| 2544 | phys_sections_free(&d->map); |
| 2545 | g_free(d); |
| 2546 | } |
| 2547 | |
Paolo Bonzini | 9458a9a | 2018-02-06 18:37:39 +0100 | [diff] [blame] | 2548 | static void do_nothing(CPUState *cpu, run_on_cpu_data d) |
| 2549 | { |
| 2550 | } |
| 2551 | |
| 2552 | static void tcg_log_global_after_sync(MemoryListener *listener) |
| 2553 | { |
| 2554 | CPUAddressSpace *cpuas; |
| 2555 | |
| 2556 | /* Wait for the CPU to end the current TB. This avoids the following |
| 2557 | * incorrect race: |
| 2558 | * |
| 2559 | * vCPU migration |
| 2560 | * ---------------------- ------------------------- |
| 2561 | * TLB check -> slow path |
| 2562 | * notdirty_mem_write |
| 2563 | * write to RAM |
| 2564 | * mark dirty |
| 2565 | * clear dirty flag |
| 2566 | * TLB check -> fast path |
| 2567 | * read memory |
| 2568 | * write to RAM |
| 2569 | * |
| 2570 | * by pushing the migration thread's memory read after the vCPU thread has |
| 2571 | * written the memory. |
| 2572 | */ |
Pavel Dovgalyuk | 86cf9e1 | 2019-09-17 12:54:06 +0300 | [diff] [blame] | 2573 | if (replay_mode == REPLAY_MODE_NONE) { |
| 2574 | /* |
| 2575 | * VGA can make calls to this function while updating the screen. |
| 2576 | * In record/replay mode this causes a deadlock, because |
| 2577 | * run_on_cpu waits for rr mutex. Therefore no races are possible |
| 2578 | * in this case and no need for making run_on_cpu when |
Greg Kurz | f18d403 | 2021-10-15 11:29:44 +0200 | [diff] [blame] | 2579 | * record/replay is enabled. |
Pavel Dovgalyuk | 86cf9e1 | 2019-09-17 12:54:06 +0300 | [diff] [blame] | 2580 | */ |
| 2581 | cpuas = container_of(listener, CPUAddressSpace, tcg_as_listener); |
| 2582 | run_on_cpu(cpuas->cpu, do_nothing, RUN_ON_CPU_NULL); |
| 2583 | } |
Paolo Bonzini | 9458a9a | 2018-02-06 18:37:39 +0100 | [diff] [blame] | 2584 | } |
| 2585 | |
Richard Henderson | 0d58c66 | 2023-08-25 16:13:17 -0700 | [diff] [blame] | 2586 | static void tcg_commit_cpu(CPUState *cpu, run_on_cpu_data data) |
| 2587 | { |
| 2588 | CPUAddressSpace *cpuas = data.host_ptr; |
| 2589 | |
| 2590 | cpuas->memory_dispatch = address_space_to_dispatch(cpuas->as); |
| 2591 | tlb_flush(cpu); |
| 2592 | } |
| 2593 | |
Avi Kivity | 1d71148 | 2012-10-02 18:54:45 +0200 | [diff] [blame] | 2594 | static void tcg_commit(MemoryListener *listener) |
Avi Kivity | 50c1e14 | 2012-02-08 21:36:02 +0200 | [diff] [blame] | 2595 | { |
Peter Maydell | 32857f4 | 2015-10-01 15:29:50 +0100 | [diff] [blame] | 2596 | CPUAddressSpace *cpuas; |
Richard Henderson | 0d58c66 | 2023-08-25 16:13:17 -0700 | [diff] [blame] | 2597 | CPUState *cpu; |
Avi Kivity | 117712c | 2012-02-12 21:23:17 +0200 | [diff] [blame] | 2598 | |
Emilio G. Cota | f28d0df | 2018-06-22 13:45:31 -0400 | [diff] [blame] | 2599 | assert(tcg_enabled()); |
Avi Kivity | 117712c | 2012-02-12 21:23:17 +0200 | [diff] [blame] | 2600 | /* since each CPU stores ram addresses in its TLB cache, we must |
| 2601 | reset the modified entries */ |
Peter Maydell | 32857f4 | 2015-10-01 15:29:50 +0100 | [diff] [blame] | 2602 | cpuas = container_of(listener, CPUAddressSpace, tcg_as_listener); |
Richard Henderson | 0d58c66 | 2023-08-25 16:13:17 -0700 | [diff] [blame] | 2603 | cpu = cpuas->cpu; |
| 2604 | |
| 2605 | /* |
| 2606 | * Defer changes to as->memory_dispatch until the cpu is quiescent. |
| 2607 | * Otherwise we race between (1) other cpu threads and (2) ongoing |
| 2608 | * i/o for the current cpu thread, with data cached by mmu_lookup(). |
| 2609 | * |
| 2610 | * In addition, queueing the work function will kick the cpu back to |
| 2611 | * the main loop, which will end the RCU critical section and reclaim |
| 2612 | * the memory data structures. |
| 2613 | * |
| 2614 | * That said, the listener is also called during realize, before |
| 2615 | * all of the tcg machinery for run-on is initialized: thus halt_cond. |
Peter Maydell | 32857f4 | 2015-10-01 15:29:50 +0100 | [diff] [blame] | 2616 | */ |
Richard Henderson | 0d58c66 | 2023-08-25 16:13:17 -0700 | [diff] [blame] | 2617 | if (cpu->halt_cond) { |
| 2618 | async_run_on_cpu(cpu, tcg_commit_cpu, RUN_ON_CPU_HOST_PTR(cpuas)); |
| 2619 | } else { |
| 2620 | tcg_commit_cpu(cpu, RUN_ON_CPU_HOST_PTR(cpuas)); |
| 2621 | } |
Avi Kivity | 50c1e14 | 2012-02-08 21:36:02 +0200 | [diff] [blame] | 2622 | } |
| 2623 | |
Avi Kivity | 62152b8 | 2011-07-26 14:26:14 +0300 | [diff] [blame] | 2624 | static void memory_map_init(void) |
| 2625 | { |
Anthony Liguori | 7267c09 | 2011-08-20 22:09:37 -0500 | [diff] [blame] | 2626 | system_memory = g_malloc(sizeof(*system_memory)); |
Paolo Bonzini | 03f4995 | 2013-11-07 17:14:36 +0100 | [diff] [blame] | 2627 | |
Paolo Bonzini | 57271d6 | 2013-11-07 17:14:37 +0100 | [diff] [blame] | 2628 | memory_region_init(system_memory, NULL, "system", UINT64_MAX); |
Alexey Kardashevskiy | 7dca804 | 2013-04-29 16:25:51 +0000 | [diff] [blame] | 2629 | address_space_init(&address_space_memory, system_memory, "memory"); |
Avi Kivity | 309cb47 | 2011-08-08 16:09:03 +0300 | [diff] [blame] | 2630 | |
Anthony Liguori | 7267c09 | 2011-08-20 22:09:37 -0500 | [diff] [blame] | 2631 | system_io = g_malloc(sizeof(*system_io)); |
Jan Kiszka | 3bb28b7 | 2013-09-02 18:43:30 +0200 | [diff] [blame] | 2632 | memory_region_init_io(system_io, NULL, &unassigned_io_ops, NULL, "io", |
| 2633 | 65536); |
Alexey Kardashevskiy | 7dca804 | 2013-04-29 16:25:51 +0000 | [diff] [blame] | 2634 | address_space_init(&address_space_io, system_io, "I/O"); |
Avi Kivity | 62152b8 | 2011-07-26 14:26:14 +0300 | [diff] [blame] | 2635 | } |
| 2636 | |
| 2637 | MemoryRegion *get_system_memory(void) |
| 2638 | { |
| 2639 | return system_memory; |
| 2640 | } |
| 2641 | |
Avi Kivity | 309cb47 | 2011-08-08 16:09:03 +0300 | [diff] [blame] | 2642 | MemoryRegion *get_system_io(void) |
| 2643 | { |
| 2644 | return system_io; |
| 2645 | } |
| 2646 | |
Paolo Bonzini | 845b621 | 2015-03-23 11:45:53 +0100 | [diff] [blame] | 2647 | static void invalidate_and_set_dirty(MemoryRegion *mr, hwaddr addr, |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 2648 | hwaddr length) |
Anthony PERARD | 51d7a9e | 2012-10-03 13:49:05 +0000 | [diff] [blame] | 2649 | { |
Paolo Bonzini | e87f777 | 2015-03-25 15:21:39 +0100 | [diff] [blame] | 2650 | uint8_t dirty_log_mask = memory_region_get_dirty_log_mask(mr); |
Peter Maydell | 7318806 | 2024-07-23 18:05:13 +0100 | [diff] [blame] | 2651 | ram_addr_t ramaddr = memory_region_get_ram_addr(mr); |
| 2652 | |
| 2653 | /* We know we're only called for RAM MemoryRegions */ |
| 2654 | assert(ramaddr != RAM_ADDR_INVALID); |
| 2655 | addr += ramaddr; |
Paolo Bonzini | 0878d0e | 2016-02-22 11:02:12 +0100 | [diff] [blame] | 2656 | |
Paolo Bonzini | e87f777 | 2015-03-25 15:21:39 +0100 | [diff] [blame] | 2657 | /* No early return if dirty_log_mask is or becomes 0, because |
| 2658 | * cpu_physical_memory_set_dirty_range will still call |
| 2659 | * xen_modified_memory. |
| 2660 | */ |
| 2661 | if (dirty_log_mask) { |
| 2662 | dirty_log_mask = |
| 2663 | cpu_physical_memory_range_includes_clean(addr, length, dirty_log_mask); |
Anthony PERARD | 51d7a9e | 2012-10-03 13:49:05 +0000 | [diff] [blame] | 2664 | } |
Paolo Bonzini | e87f777 | 2015-03-25 15:21:39 +0100 | [diff] [blame] | 2665 | if (dirty_log_mask & (1 << DIRTY_MEMORY_CODE)) { |
Paolo Bonzini | 5aa1ef7 | 2017-07-03 17:50:40 +0200 | [diff] [blame] | 2666 | assert(tcg_enabled()); |
Richard Henderson | e506ad6 | 2023-03-06 04:30:11 +0300 | [diff] [blame] | 2667 | tb_invalidate_phys_range(addr, addr + length - 1); |
Paolo Bonzini | e87f777 | 2015-03-25 15:21:39 +0100 | [diff] [blame] | 2668 | dirty_log_mask &= ~(1 << DIRTY_MEMORY_CODE); |
| 2669 | } |
| 2670 | cpu_physical_memory_set_dirty_range(addr, length, dirty_log_mask); |
Anthony PERARD | 51d7a9e | 2012-10-03 13:49:05 +0000 | [diff] [blame] | 2671 | } |
| 2672 | |
Stefan Hajnoczi | 047be4e | 2019-01-29 11:46:04 +0000 | [diff] [blame] | 2673 | void memory_region_flush_rom_device(MemoryRegion *mr, hwaddr addr, hwaddr size) |
| 2674 | { |
| 2675 | /* |
| 2676 | * In principle this function would work on other memory region types too, |
| 2677 | * but the ROM device use case is the only one where this operation is |
| 2678 | * necessary. Other memory regions should use the |
| 2679 | * address_space_read/write() APIs. |
| 2680 | */ |
| 2681 | assert(memory_region_is_romd(mr)); |
| 2682 | |
| 2683 | invalidate_and_set_dirty(mr, addr, size); |
| 2684 | } |
| 2685 | |
Jagannathan Raman | 3123f93 | 2022-06-13 16:26:32 -0400 | [diff] [blame] | 2686 | int memory_access_size(MemoryRegion *mr, unsigned l, hwaddr addr) |
Paolo Bonzini | 82f2563 | 2013-05-24 11:59:43 +0200 | [diff] [blame] | 2687 | { |
Paolo Bonzini | e1622f4 | 2013-07-17 13:17:41 +0200 | [diff] [blame] | 2688 | unsigned access_size_max = mr->ops->valid.max_access_size; |
Richard Henderson | 2332616 | 2013-07-08 14:55:59 -0700 | [diff] [blame] | 2689 | |
| 2690 | /* Regions are assumed to support 1-4 byte accesses unless |
| 2691 | otherwise specified. */ |
Richard Henderson | 2332616 | 2013-07-08 14:55:59 -0700 | [diff] [blame] | 2692 | if (access_size_max == 0) { |
| 2693 | access_size_max = 4; |
Paolo Bonzini | 82f2563 | 2013-05-24 11:59:43 +0200 | [diff] [blame] | 2694 | } |
Richard Henderson | 2332616 | 2013-07-08 14:55:59 -0700 | [diff] [blame] | 2695 | |
| 2696 | /* Bound the maximum access by the alignment of the address. */ |
| 2697 | if (!mr->ops->impl.unaligned) { |
| 2698 | unsigned align_size_max = addr & -addr; |
| 2699 | if (align_size_max != 0 && align_size_max < access_size_max) { |
| 2700 | access_size_max = align_size_max; |
| 2701 | } |
| 2702 | } |
| 2703 | |
| 2704 | /* Don't attempt accesses larger than the maximum. */ |
| 2705 | if (l > access_size_max) { |
| 2706 | l = access_size_max; |
| 2707 | } |
Peter Maydell | 6554f5c | 2015-07-24 13:33:10 +0100 | [diff] [blame] | 2708 | l = pow2floor(l); |
Richard Henderson | 2332616 | 2013-07-08 14:55:59 -0700 | [diff] [blame] | 2709 | |
| 2710 | return l; |
Paolo Bonzini | 82f2563 | 2013-05-24 11:59:43 +0200 | [diff] [blame] | 2711 | } |
| 2712 | |
Jagannathan Raman | 3123f93 | 2022-06-13 16:26:32 -0400 | [diff] [blame] | 2713 | bool prepare_mmio_access(MemoryRegion *mr) |
Paolo Bonzini | 125b380 | 2015-06-18 18:47:21 +0200 | [diff] [blame] | 2714 | { |
Jan Kiszka | 4840f10 | 2015-06-18 18:47:22 +0200 | [diff] [blame] | 2715 | bool release_lock = false; |
| 2716 | |
Stefan Hajnoczi | 195801d | 2024-01-02 10:35:25 -0500 | [diff] [blame] | 2717 | if (!bql_locked()) { |
| 2718 | bql_lock(); |
Jan Kiszka | 4840f10 | 2015-06-18 18:47:22 +0200 | [diff] [blame] | 2719 | release_lock = true; |
Paolo Bonzini | 125b380 | 2015-06-18 18:47:21 +0200 | [diff] [blame] | 2720 | } |
Jan Kiszka | 4840f10 | 2015-06-18 18:47:22 +0200 | [diff] [blame] | 2721 | if (mr->flush_coalesced_mmio) { |
Jan Kiszka | 4840f10 | 2015-06-18 18:47:22 +0200 | [diff] [blame] | 2722 | qemu_flush_coalesced_mmio_buffer(); |
Jan Kiszka | 4840f10 | 2015-06-18 18:47:22 +0200 | [diff] [blame] | 2723 | } |
| 2724 | |
| 2725 | return release_lock; |
Paolo Bonzini | 125b380 | 2015-06-18 18:47:21 +0200 | [diff] [blame] | 2726 | } |
| 2727 | |
Philippe Mathieu-Daudé | 3ab6fdc | 2021-12-15 19:24:21 +0100 | [diff] [blame] | 2728 | /** |
| 2729 | * flatview_access_allowed |
| 2730 | * @mr: #MemoryRegion to be accessed |
| 2731 | * @attrs: memory transaction attributes |
| 2732 | * @addr: address within that memory region |
| 2733 | * @len: the number of bytes to access |
| 2734 | * |
| 2735 | * Check if a memory transaction is allowed. |
| 2736 | * |
| 2737 | * Returns: true if transaction is allowed, false if denied. |
| 2738 | */ |
| 2739 | static bool flatview_access_allowed(MemoryRegion *mr, MemTxAttrs attrs, |
| 2740 | hwaddr addr, hwaddr len) |
| 2741 | { |
| 2742 | if (likely(!attrs.memory)) { |
| 2743 | return true; |
| 2744 | } |
| 2745 | if (memory_region_is_ram(mr)) { |
| 2746 | return true; |
| 2747 | } |
BALATON Zoltan | 678bf8f | 2024-11-02 13:17:35 +0100 | [diff] [blame] | 2748 | qemu_log_mask(LOG_INVALID_MEM, |
Philippe Mathieu-Daudé | 3ab6fdc | 2021-12-15 19:24:21 +0100 | [diff] [blame] | 2749 | "Invalid access to non-RAM device at " |
| 2750 | "addr 0x%" HWADDR_PRIX ", size %" HWADDR_PRIu ", " |
| 2751 | "region '%s'\n", addr, len, memory_region_name(mr)); |
| 2752 | return false; |
| 2753 | } |
| 2754 | |
Jonathan Cameron | e7927d3 | 2024-03-07 15:37:09 +0000 | [diff] [blame] | 2755 | static MemTxResult flatview_write_continue_step(MemTxAttrs attrs, |
| 2756 | const uint8_t *buf, |
| 2757 | hwaddr len, hwaddr mr_addr, |
| 2758 | hwaddr *l, MemoryRegion *mr) |
| 2759 | { |
| 2760 | if (!flatview_access_allowed(mr, attrs, mr_addr, *l)) { |
| 2761 | return MEMTX_ACCESS_ERROR; |
| 2762 | } |
| 2763 | |
| 2764 | if (!memory_access_is_direct(mr, true)) { |
| 2765 | uint64_t val; |
| 2766 | MemTxResult result; |
| 2767 | bool release_lock = prepare_mmio_access(mr); |
| 2768 | |
| 2769 | *l = memory_access_size(mr, *l, mr_addr); |
| 2770 | /* |
| 2771 | * XXX: could force current_cpu to NULL to avoid |
| 2772 | * potential bugs |
| 2773 | */ |
| 2774 | |
| 2775 | /* |
| 2776 | * Assure Coverity (and ourselves) that we are not going to OVERRUN |
| 2777 | * the buffer by following ldn_he_p(). |
| 2778 | */ |
| 2779 | #ifdef QEMU_STATIC_ANALYSIS |
| 2780 | assert((*l == 1 && len >= 1) || |
| 2781 | (*l == 2 && len >= 2) || |
| 2782 | (*l == 4 && len >= 4) || |
| 2783 | (*l == 8 && len >= 8)); |
| 2784 | #endif |
| 2785 | val = ldn_he_p(buf, *l); |
| 2786 | result = memory_region_dispatch_write(mr, mr_addr, val, |
| 2787 | size_memop(*l), attrs); |
| 2788 | if (release_lock) { |
| 2789 | bql_unlock(); |
| 2790 | } |
| 2791 | |
| 2792 | return result; |
| 2793 | } else { |
| 2794 | /* RAM case */ |
| 2795 | uint8_t *ram_ptr = qemu_ram_ptr_length(mr->ram_block, mr_addr, l, |
Edgar E. Iglesias | 5a5585f | 2024-04-30 18:49:35 +0200 | [diff] [blame] | 2796 | false, true); |
Jonathan Cameron | e7927d3 | 2024-03-07 15:37:09 +0000 | [diff] [blame] | 2797 | |
| 2798 | memmove(ram_ptr, buf, *l); |
| 2799 | invalidate_and_set_dirty(mr, mr_addr, *l); |
| 2800 | |
| 2801 | return MEMTX_OK; |
| 2802 | } |
| 2803 | } |
| 2804 | |
Paolo Bonzini | a203ac7 | 2015-12-09 10:18:57 +0100 | [diff] [blame] | 2805 | /* Called within RCU critical section. */ |
Alexey Kardashevskiy | 1662068 | 2017-09-21 18:50:58 +1000 | [diff] [blame] | 2806 | static MemTxResult flatview_write_continue(FlatView *fv, hwaddr addr, |
| 2807 | MemTxAttrs attrs, |
Philippe Mathieu-Daudé | a152be4 | 2020-02-19 19:52:44 +0100 | [diff] [blame] | 2808 | const void *ptr, |
Jonathan Cameron | 4c7c856 | 2024-03-07 15:37:07 +0000 | [diff] [blame] | 2809 | hwaddr len, hwaddr mr_addr, |
Alexey Kardashevskiy | 1662068 | 2017-09-21 18:50:58 +1000 | [diff] [blame] | 2810 | hwaddr l, MemoryRegion *mr) |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 2811 | { |
Peter Maydell | 3b64349 | 2015-04-26 16:49:23 +0100 | [diff] [blame] | 2812 | MemTxResult result = MEMTX_OK; |
Philippe Mathieu-Daudé | a152be4 | 2020-02-19 19:52:44 +0100 | [diff] [blame] | 2813 | const uint8_t *buf = ptr; |
ths | 3b46e62 | 2007-09-17 08:09:54 +0000 | [diff] [blame] | 2814 | |
Paolo Bonzini | a203ac7 | 2015-12-09 10:18:57 +0100 | [diff] [blame] | 2815 | for (;;) { |
Jonathan Cameron | e7927d3 | 2024-03-07 15:37:09 +0000 | [diff] [blame] | 2816 | result |= flatview_write_continue_step(attrs, buf, len, mr_addr, &l, |
| 2817 | mr); |
Jan Kiszka | 4840f10 | 2015-06-18 18:47:22 +0200 | [diff] [blame] | 2818 | |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 2819 | len -= l; |
| 2820 | buf += l; |
| 2821 | addr += l; |
Paolo Bonzini | a203ac7 | 2015-12-09 10:18:57 +0100 | [diff] [blame] | 2822 | |
| 2823 | if (!len) { |
| 2824 | break; |
| 2825 | } |
| 2826 | |
| 2827 | l = len; |
Jonathan Cameron | 4c7c856 | 2024-03-07 15:37:07 +0000 | [diff] [blame] | 2828 | mr = flatview_translate(fv, addr, &mr_addr, &l, true, attrs); |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 2829 | } |
Paolo Bonzini | fd8aaa7 | 2013-05-21 09:56:55 +0200 | [diff] [blame] | 2830 | |
Peter Maydell | 3b64349 | 2015-04-26 16:49:23 +0100 | [diff] [blame] | 2831 | return result; |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 2832 | } |
bellard | 8df1cd0 | 2005-01-28 22:37:22 +0000 | [diff] [blame] | 2833 | |
Paolo Bonzini | 4c6ebbb | 2018-03-05 09:23:56 +0100 | [diff] [blame] | 2834 | /* Called from RCU critical section. */ |
Alexey Kardashevskiy | 1662068 | 2017-09-21 18:50:58 +1000 | [diff] [blame] | 2835 | static MemTxResult flatview_write(FlatView *fv, hwaddr addr, MemTxAttrs attrs, |
Philippe Mathieu-Daudé | a152be4 | 2020-02-19 19:52:44 +0100 | [diff] [blame] | 2836 | const void *buf, hwaddr len) |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 2837 | { |
Paolo Bonzini | eb7eeb8 | 2015-12-09 10:06:31 +0100 | [diff] [blame] | 2838 | hwaddr l; |
Jonathan Cameron | 4c7c856 | 2024-03-07 15:37:07 +0000 | [diff] [blame] | 2839 | hwaddr mr_addr; |
Paolo Bonzini | eb7eeb8 | 2015-12-09 10:06:31 +0100 | [diff] [blame] | 2840 | MemoryRegion *mr; |
Paolo Bonzini | a203ac7 | 2015-12-09 10:18:57 +0100 | [diff] [blame] | 2841 | |
Paolo Bonzini | 4c6ebbb | 2018-03-05 09:23:56 +0100 | [diff] [blame] | 2842 | l = len; |
Jonathan Cameron | 4c7c856 | 2024-03-07 15:37:07 +0000 | [diff] [blame] | 2843 | mr = flatview_translate(fv, addr, &mr_addr, &l, true, attrs); |
Philippe Mathieu-Daudé | 3ab6fdc | 2021-12-15 19:24:21 +0100 | [diff] [blame] | 2844 | if (!flatview_access_allowed(mr, attrs, addr, len)) { |
| 2845 | return MEMTX_ACCESS_ERROR; |
| 2846 | } |
Philippe Mathieu-Daudé | 58e7468 | 2021-12-15 19:24:20 +0100 | [diff] [blame] | 2847 | return flatview_write_continue(fv, addr, attrs, buf, len, |
Jonathan Cameron | 4c7c856 | 2024-03-07 15:37:07 +0000 | [diff] [blame] | 2848 | mr_addr, l, mr); |
Paolo Bonzini | a203ac7 | 2015-12-09 10:18:57 +0100 | [diff] [blame] | 2849 | } |
| 2850 | |
Jonathan Cameron | e7927d3 | 2024-03-07 15:37:09 +0000 | [diff] [blame] | 2851 | static MemTxResult flatview_read_continue_step(MemTxAttrs attrs, uint8_t *buf, |
| 2852 | hwaddr len, hwaddr mr_addr, |
| 2853 | hwaddr *l, |
| 2854 | MemoryRegion *mr) |
| 2855 | { |
| 2856 | if (!flatview_access_allowed(mr, attrs, mr_addr, *l)) { |
| 2857 | return MEMTX_ACCESS_ERROR; |
| 2858 | } |
| 2859 | |
| 2860 | if (!memory_access_is_direct(mr, false)) { |
| 2861 | /* I/O case */ |
| 2862 | uint64_t val; |
| 2863 | MemTxResult result; |
| 2864 | bool release_lock = prepare_mmio_access(mr); |
| 2865 | |
| 2866 | *l = memory_access_size(mr, *l, mr_addr); |
| 2867 | result = memory_region_dispatch_read(mr, mr_addr, &val, size_memop(*l), |
| 2868 | attrs); |
| 2869 | |
| 2870 | /* |
| 2871 | * Assure Coverity (and ourselves) that we are not going to OVERRUN |
| 2872 | * the buffer by following stn_he_p(). |
| 2873 | */ |
| 2874 | #ifdef QEMU_STATIC_ANALYSIS |
| 2875 | assert((*l == 1 && len >= 1) || |
| 2876 | (*l == 2 && len >= 2) || |
| 2877 | (*l == 4 && len >= 4) || |
| 2878 | (*l == 8 && len >= 8)); |
| 2879 | #endif |
| 2880 | stn_he_p(buf, *l, val); |
| 2881 | |
| 2882 | if (release_lock) { |
| 2883 | bql_unlock(); |
| 2884 | } |
| 2885 | return result; |
| 2886 | } else { |
| 2887 | /* RAM case */ |
| 2888 | uint8_t *ram_ptr = qemu_ram_ptr_length(mr->ram_block, mr_addr, l, |
Edgar E. Iglesias | 5a5585f | 2024-04-30 18:49:35 +0200 | [diff] [blame] | 2889 | false, false); |
Jonathan Cameron | e7927d3 | 2024-03-07 15:37:09 +0000 | [diff] [blame] | 2890 | |
| 2891 | memcpy(buf, ram_ptr, *l); |
| 2892 | |
| 2893 | return MEMTX_OK; |
| 2894 | } |
| 2895 | } |
| 2896 | |
Paolo Bonzini | a203ac7 | 2015-12-09 10:18:57 +0100 | [diff] [blame] | 2897 | /* Called within RCU critical section. */ |
Alexey Kardashevskiy | 1662068 | 2017-09-21 18:50:58 +1000 | [diff] [blame] | 2898 | MemTxResult flatview_read_continue(FlatView *fv, hwaddr addr, |
Philippe Mathieu-Daudé | a152be4 | 2020-02-19 19:52:44 +0100 | [diff] [blame] | 2899 | MemTxAttrs attrs, void *ptr, |
Jonathan Cameron | 4c7c856 | 2024-03-07 15:37:07 +0000 | [diff] [blame] | 2900 | hwaddr len, hwaddr mr_addr, hwaddr l, |
Alexey Kardashevskiy | 1662068 | 2017-09-21 18:50:58 +1000 | [diff] [blame] | 2901 | MemoryRegion *mr) |
Paolo Bonzini | a203ac7 | 2015-12-09 10:18:57 +0100 | [diff] [blame] | 2902 | { |
Paolo Bonzini | a203ac7 | 2015-12-09 10:18:57 +0100 | [diff] [blame] | 2903 | MemTxResult result = MEMTX_OK; |
Philippe Mathieu-Daudé | a152be4 | 2020-02-19 19:52:44 +0100 | [diff] [blame] | 2904 | uint8_t *buf = ptr; |
Paolo Bonzini | eb7eeb8 | 2015-12-09 10:06:31 +0100 | [diff] [blame] | 2905 | |
Alexander Bulekov | 7cac7fe | 2021-03-15 10:05:12 -0400 | [diff] [blame] | 2906 | fuzz_dma_read_cb(addr, len, mr); |
Paolo Bonzini | a203ac7 | 2015-12-09 10:18:57 +0100 | [diff] [blame] | 2907 | for (;;) { |
Jonathan Cameron | e7927d3 | 2024-03-07 15:37:09 +0000 | [diff] [blame] | 2908 | result |= flatview_read_continue_step(attrs, buf, len, mr_addr, &l, mr); |
Paolo Bonzini | eb7eeb8 | 2015-12-09 10:06:31 +0100 | [diff] [blame] | 2909 | |
Paolo Bonzini | eb7eeb8 | 2015-12-09 10:06:31 +0100 | [diff] [blame] | 2910 | len -= l; |
| 2911 | buf += l; |
| 2912 | addr += l; |
Paolo Bonzini | a203ac7 | 2015-12-09 10:18:57 +0100 | [diff] [blame] | 2913 | |
| 2914 | if (!len) { |
| 2915 | break; |
| 2916 | } |
| 2917 | |
| 2918 | l = len; |
Jonathan Cameron | 4c7c856 | 2024-03-07 15:37:07 +0000 | [diff] [blame] | 2919 | mr = flatview_translate(fv, addr, &mr_addr, &l, false, attrs); |
Paolo Bonzini | eb7eeb8 | 2015-12-09 10:06:31 +0100 | [diff] [blame] | 2920 | } |
Paolo Bonzini | a203ac7 | 2015-12-09 10:18:57 +0100 | [diff] [blame] | 2921 | |
| 2922 | return result; |
| 2923 | } |
| 2924 | |
Paolo Bonzini | b2a44fc | 2018-03-05 00:19:49 +0100 | [diff] [blame] | 2925 | /* Called from RCU critical section. */ |
| 2926 | static MemTxResult flatview_read(FlatView *fv, hwaddr addr, |
Philippe Mathieu-Daudé | a152be4 | 2020-02-19 19:52:44 +0100 | [diff] [blame] | 2927 | MemTxAttrs attrs, void *buf, hwaddr len) |
Paolo Bonzini | a203ac7 | 2015-12-09 10:18:57 +0100 | [diff] [blame] | 2928 | { |
| 2929 | hwaddr l; |
Jonathan Cameron | 4c7c856 | 2024-03-07 15:37:07 +0000 | [diff] [blame] | 2930 | hwaddr mr_addr; |
Paolo Bonzini | a203ac7 | 2015-12-09 10:18:57 +0100 | [diff] [blame] | 2931 | MemoryRegion *mr; |
Paolo Bonzini | a203ac7 | 2015-12-09 10:18:57 +0100 | [diff] [blame] | 2932 | |
Paolo Bonzini | b2a44fc | 2018-03-05 00:19:49 +0100 | [diff] [blame] | 2933 | l = len; |
Jonathan Cameron | 4c7c856 | 2024-03-07 15:37:07 +0000 | [diff] [blame] | 2934 | mr = flatview_translate(fv, addr, &mr_addr, &l, false, attrs); |
Philippe Mathieu-Daudé | 3ab6fdc | 2021-12-15 19:24:21 +0100 | [diff] [blame] | 2935 | if (!flatview_access_allowed(mr, attrs, addr, len)) { |
| 2936 | return MEMTX_ACCESS_ERROR; |
| 2937 | } |
Paolo Bonzini | b2a44fc | 2018-03-05 00:19:49 +0100 | [diff] [blame] | 2938 | return flatview_read_continue(fv, addr, attrs, buf, len, |
Jonathan Cameron | 4c7c856 | 2024-03-07 15:37:07 +0000 | [diff] [blame] | 2939 | mr_addr, l, mr); |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 2940 | } |
| 2941 | |
Paolo Bonzini | b2a44fc | 2018-03-05 00:19:49 +0100 | [diff] [blame] | 2942 | MemTxResult address_space_read_full(AddressSpace *as, hwaddr addr, |
Philippe Mathieu-Daudé | daa3dda | 2020-02-19 19:54:35 +0100 | [diff] [blame] | 2943 | MemTxAttrs attrs, void *buf, hwaddr len) |
Paolo Bonzini | b2a44fc | 2018-03-05 00:19:49 +0100 | [diff] [blame] | 2944 | { |
| 2945 | MemTxResult result = MEMTX_OK; |
| 2946 | FlatView *fv; |
| 2947 | |
| 2948 | if (len > 0) { |
Dr. David Alan Gilbert | 694ea27 | 2019-10-07 15:36:41 +0100 | [diff] [blame] | 2949 | RCU_READ_LOCK_GUARD(); |
Paolo Bonzini | b2a44fc | 2018-03-05 00:19:49 +0100 | [diff] [blame] | 2950 | fv = address_space_to_flatview(as); |
| 2951 | result = flatview_read(fv, addr, attrs, buf, len); |
Paolo Bonzini | b2a44fc | 2018-03-05 00:19:49 +0100 | [diff] [blame] | 2952 | } |
| 2953 | |
| 2954 | return result; |
| 2955 | } |
| 2956 | |
Paolo Bonzini | 4c6ebbb | 2018-03-05 09:23:56 +0100 | [diff] [blame] | 2957 | MemTxResult address_space_write(AddressSpace *as, hwaddr addr, |
| 2958 | MemTxAttrs attrs, |
Philippe Mathieu-Daudé | daa3dda | 2020-02-19 19:54:35 +0100 | [diff] [blame] | 2959 | const void *buf, hwaddr len) |
Paolo Bonzini | 4c6ebbb | 2018-03-05 09:23:56 +0100 | [diff] [blame] | 2960 | { |
| 2961 | MemTxResult result = MEMTX_OK; |
| 2962 | FlatView *fv; |
| 2963 | |
| 2964 | if (len > 0) { |
Dr. David Alan Gilbert | 694ea27 | 2019-10-07 15:36:41 +0100 | [diff] [blame] | 2965 | RCU_READ_LOCK_GUARD(); |
Paolo Bonzini | 4c6ebbb | 2018-03-05 09:23:56 +0100 | [diff] [blame] | 2966 | fv = address_space_to_flatview(as); |
| 2967 | result = flatview_write(fv, addr, attrs, buf, len); |
Paolo Bonzini | 4c6ebbb | 2018-03-05 09:23:56 +0100 | [diff] [blame] | 2968 | } |
| 2969 | |
| 2970 | return result; |
| 2971 | } |
| 2972 | |
Paolo Bonzini | db84fd9 | 2018-03-05 09:29:04 +0100 | [diff] [blame] | 2973 | MemTxResult address_space_rw(AddressSpace *as, hwaddr addr, MemTxAttrs attrs, |
Philippe Mathieu-Daudé | daa3dda | 2020-02-19 19:54:35 +0100 | [diff] [blame] | 2974 | void *buf, hwaddr len, bool is_write) |
Paolo Bonzini | db84fd9 | 2018-03-05 09:29:04 +0100 | [diff] [blame] | 2975 | { |
| 2976 | if (is_write) { |
| 2977 | return address_space_write(as, addr, attrs, buf, len); |
| 2978 | } else { |
| 2979 | return address_space_read_full(as, addr, attrs, buf, len); |
| 2980 | } |
| 2981 | } |
| 2982 | |
Philippe Mathieu-Daudé | 75f01c6 | 2022-01-15 21:37:23 +0100 | [diff] [blame] | 2983 | MemTxResult address_space_set(AddressSpace *as, hwaddr addr, |
| 2984 | uint8_t c, hwaddr len, MemTxAttrs attrs) |
| 2985 | { |
| 2986 | #define FILLBUF_SIZE 512 |
| 2987 | uint8_t fillbuf[FILLBUF_SIZE]; |
| 2988 | int l; |
| 2989 | MemTxResult error = MEMTX_OK; |
| 2990 | |
| 2991 | memset(fillbuf, c, FILLBUF_SIZE); |
| 2992 | while (len > 0) { |
| 2993 | l = len < FILLBUF_SIZE ? len : FILLBUF_SIZE; |
| 2994 | error |= address_space_write(as, addr, attrs, fillbuf, l); |
| 2995 | len -= l; |
| 2996 | addr += l; |
| 2997 | } |
| 2998 | |
| 2999 | return error; |
| 3000 | } |
| 3001 | |
Philippe Mathieu-Daudé | d7ef71e | 2020-02-19 20:02:11 +0100 | [diff] [blame] | 3002 | void cpu_physical_memory_rw(hwaddr addr, void *buf, |
Philippe Mathieu-Daudé | 28c80bf | 2020-02-19 20:32:30 +0100 | [diff] [blame] | 3003 | hwaddr len, bool is_write) |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 3004 | { |
Peter Maydell | 5c9eb02 | 2015-04-26 16:49:24 +0100 | [diff] [blame] | 3005 | address_space_rw(&address_space_memory, addr, MEMTXATTRS_UNSPECIFIED, |
| 3006 | buf, len, is_write); |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 3007 | } |
| 3008 | |
Alexander Graf | 582b55a | 2013-12-11 14:17:44 +0100 | [diff] [blame] | 3009 | enum write_rom_type { |
| 3010 | WRITE_DATA, |
| 3011 | FLUSH_CACHE, |
| 3012 | }; |
| 3013 | |
Peter Maydell | 75693e1 | 2018-12-14 13:30:48 +0000 | [diff] [blame] | 3014 | static inline MemTxResult address_space_write_rom_internal(AddressSpace *as, |
| 3015 | hwaddr addr, |
| 3016 | MemTxAttrs attrs, |
Philippe Mathieu-Daudé | daa3dda | 2020-02-19 19:54:35 +0100 | [diff] [blame] | 3017 | const void *ptr, |
Li Zhijian | 0c249ff | 2019-01-17 20:49:01 +0800 | [diff] [blame] | 3018 | hwaddr len, |
Peter Maydell | 75693e1 | 2018-12-14 13:30:48 +0000 | [diff] [blame] | 3019 | enum write_rom_type type) |
bellard | d0ecd2a | 2006-04-23 17:14:48 +0000 | [diff] [blame] | 3020 | { |
Paolo Bonzini | 149f54b | 2013-05-24 12:59:37 +0200 | [diff] [blame] | 3021 | hwaddr l; |
Philippe Mathieu-Daudé | 2080467 | 2020-02-19 18:01:32 +0100 | [diff] [blame] | 3022 | uint8_t *ram_ptr; |
Paolo Bonzini | 149f54b | 2013-05-24 12:59:37 +0200 | [diff] [blame] | 3023 | hwaddr addr1; |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 3024 | MemoryRegion *mr; |
Philippe Mathieu-Daudé | daa3dda | 2020-02-19 19:54:35 +0100 | [diff] [blame] | 3025 | const uint8_t *buf = ptr; |
ths | 3b46e62 | 2007-09-17 08:09:54 +0000 | [diff] [blame] | 3026 | |
Dr. David Alan Gilbert | 694ea27 | 2019-10-07 15:36:41 +0100 | [diff] [blame] | 3027 | RCU_READ_LOCK_GUARD(); |
bellard | d0ecd2a | 2006-04-23 17:14:48 +0000 | [diff] [blame] | 3028 | while (len > 0) { |
Paolo Bonzini | 149f54b | 2013-05-24 12:59:37 +0200 | [diff] [blame] | 3029 | l = len; |
Peter Maydell | 75693e1 | 2018-12-14 13:30:48 +0000 | [diff] [blame] | 3030 | mr = address_space_translate(as, addr, &addr1, &l, true, attrs); |
ths | 3b46e62 | 2007-09-17 08:09:54 +0000 | [diff] [blame] | 3031 | |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 3032 | if (!(memory_region_is_ram(mr) || |
| 3033 | memory_region_is_romd(mr))) { |
Paolo Bonzini | b242e0e | 2015-07-04 00:24:51 +0200 | [diff] [blame] | 3034 | l = memory_access_size(mr, l, addr1); |
bellard | d0ecd2a | 2006-04-23 17:14:48 +0000 | [diff] [blame] | 3035 | } else { |
bellard | d0ecd2a | 2006-04-23 17:14:48 +0000 | [diff] [blame] | 3036 | /* ROM/RAM case */ |
Philippe Mathieu-Daudé | 2080467 | 2020-02-19 18:01:32 +0100 | [diff] [blame] | 3037 | ram_ptr = qemu_map_ram_ptr(mr->ram_block, addr1); |
Alexander Graf | 582b55a | 2013-12-11 14:17:44 +0100 | [diff] [blame] | 3038 | switch (type) { |
| 3039 | case WRITE_DATA: |
Philippe Mathieu-Daudé | 2080467 | 2020-02-19 18:01:32 +0100 | [diff] [blame] | 3040 | memcpy(ram_ptr, buf, l); |
Paolo Bonzini | 845b621 | 2015-03-23 11:45:53 +0100 | [diff] [blame] | 3041 | invalidate_and_set_dirty(mr, addr1, l); |
Alexander Graf | 582b55a | 2013-12-11 14:17:44 +0100 | [diff] [blame] | 3042 | break; |
| 3043 | case FLUSH_CACHE: |
Richard Henderson | 1da8de3 | 2020-12-12 10:38:21 -0600 | [diff] [blame] | 3044 | flush_idcache_range((uintptr_t)ram_ptr, (uintptr_t)ram_ptr, l); |
Alexander Graf | 582b55a | 2013-12-11 14:17:44 +0100 | [diff] [blame] | 3045 | break; |
| 3046 | } |
bellard | d0ecd2a | 2006-04-23 17:14:48 +0000 | [diff] [blame] | 3047 | } |
| 3048 | len -= l; |
| 3049 | buf += l; |
| 3050 | addr += l; |
| 3051 | } |
Peter Maydell | 75693e1 | 2018-12-14 13:30:48 +0000 | [diff] [blame] | 3052 | return MEMTX_OK; |
bellard | d0ecd2a | 2006-04-23 17:14:48 +0000 | [diff] [blame] | 3053 | } |
| 3054 | |
Alexander Graf | 582b55a | 2013-12-11 14:17:44 +0100 | [diff] [blame] | 3055 | /* used for ROM loading : can write in RAM and ROM */ |
Peter Maydell | 3c8133f | 2018-12-14 13:30:48 +0000 | [diff] [blame] | 3056 | MemTxResult address_space_write_rom(AddressSpace *as, hwaddr addr, |
| 3057 | MemTxAttrs attrs, |
Philippe Mathieu-Daudé | daa3dda | 2020-02-19 19:54:35 +0100 | [diff] [blame] | 3058 | const void *buf, hwaddr len) |
Alexander Graf | 582b55a | 2013-12-11 14:17:44 +0100 | [diff] [blame] | 3059 | { |
Peter Maydell | 3c8133f | 2018-12-14 13:30:48 +0000 | [diff] [blame] | 3060 | return address_space_write_rom_internal(as, addr, attrs, |
| 3061 | buf, len, WRITE_DATA); |
Alexander Graf | 582b55a | 2013-12-11 14:17:44 +0100 | [diff] [blame] | 3062 | } |
| 3063 | |
Li Zhijian | 0c249ff | 2019-01-17 20:49:01 +0800 | [diff] [blame] | 3064 | void cpu_flush_icache_range(hwaddr start, hwaddr len) |
Alexander Graf | 582b55a | 2013-12-11 14:17:44 +0100 | [diff] [blame] | 3065 | { |
| 3066 | /* |
| 3067 | * This function should do the same thing as an icache flush that was |
| 3068 | * triggered from within the guest. For TCG we are always cache coherent, |
| 3069 | * so there is no need to flush anything. For KVM / Xen we need to flush |
| 3070 | * the host's instruction cache at least. |
| 3071 | */ |
| 3072 | if (tcg_enabled()) { |
| 3073 | return; |
| 3074 | } |
| 3075 | |
Peter Maydell | 75693e1 | 2018-12-14 13:30:48 +0000 | [diff] [blame] | 3076 | address_space_write_rom_internal(&address_space_memory, |
| 3077 | start, MEMTXATTRS_UNSPECIFIED, |
| 3078 | NULL, len, FLUSH_CACHE); |
Alexander Graf | 582b55a | 2013-12-11 14:17:44 +0100 | [diff] [blame] | 3079 | } |
| 3080 | |
Mattias Nissler | 637b0aa | 2024-08-19 06:54:54 -0700 | [diff] [blame] | 3081 | /* |
| 3082 | * A magic value stored in the first 8 bytes of the bounce buffer struct. Used |
| 3083 | * to detect illegal pointers passed to address_space_unmap. |
| 3084 | */ |
| 3085 | #define BOUNCE_BUFFER_MAGIC 0xb4017ceb4ffe12ed |
| 3086 | |
| 3087 | typedef struct { |
| 3088 | uint64_t magic; |
| 3089 | MemoryRegion *mr; |
| 3090 | hwaddr addr; |
| 3091 | size_t len; |
| 3092 | uint8_t buffer[]; |
| 3093 | } BounceBuffer; |
| 3094 | |
Mattias Nissler | 69e78f1 | 2023-09-07 06:04:23 -0700 | [diff] [blame] | 3095 | static void |
| 3096 | address_space_unregister_map_client_do(AddressSpaceMapClient *client) |
aliguori | ba223c2 | 2009-01-22 16:59:16 +0000 | [diff] [blame] | 3097 | { |
Blue Swirl | 72cf2d4 | 2009-09-12 07:36:22 +0000 | [diff] [blame] | 3098 | QLIST_REMOVE(client, link); |
Anthony Liguori | 7267c09 | 2011-08-20 22:09:37 -0500 | [diff] [blame] | 3099 | g_free(client); |
aliguori | ba223c2 | 2009-01-22 16:59:16 +0000 | [diff] [blame] | 3100 | } |
| 3101 | |
Mattias Nissler | 5c62719 | 2023-09-07 06:04:23 -0700 | [diff] [blame] | 3102 | static void address_space_notify_map_clients_locked(AddressSpace *as) |
aliguori | ba223c2 | 2009-01-22 16:59:16 +0000 | [diff] [blame] | 3103 | { |
Mattias Nissler | 69e78f1 | 2023-09-07 06:04:23 -0700 | [diff] [blame] | 3104 | AddressSpaceMapClient *client; |
aliguori | ba223c2 | 2009-01-22 16:59:16 +0000 | [diff] [blame] | 3105 | |
Mattias Nissler | 69e78f1 | 2023-09-07 06:04:23 -0700 | [diff] [blame] | 3106 | while (!QLIST_EMPTY(&as->map_client_list)) { |
| 3107 | client = QLIST_FIRST(&as->map_client_list); |
Fam Zheng | e95205e | 2015-03-16 17:03:37 +0800 | [diff] [blame] | 3108 | qemu_bh_schedule(client->bh); |
Mattias Nissler | 5c62719 | 2023-09-07 06:04:23 -0700 | [diff] [blame] | 3109 | address_space_unregister_map_client_do(client); |
aliguori | ba223c2 | 2009-01-22 16:59:16 +0000 | [diff] [blame] | 3110 | } |
| 3111 | } |
| 3112 | |
Mattias Nissler | 5c62719 | 2023-09-07 06:04:23 -0700 | [diff] [blame] | 3113 | void address_space_register_map_client(AddressSpace *as, QEMUBH *bh) |
bellard | d0ecd2a | 2006-04-23 17:14:48 +0000 | [diff] [blame] | 3114 | { |
Mattias Nissler | 69e78f1 | 2023-09-07 06:04:23 -0700 | [diff] [blame] | 3115 | AddressSpaceMapClient *client = g_malloc(sizeof(*client)); |
bellard | d0ecd2a | 2006-04-23 17:14:48 +0000 | [diff] [blame] | 3116 | |
Mattias Nissler | 69e78f1 | 2023-09-07 06:04:23 -0700 | [diff] [blame] | 3117 | QEMU_LOCK_GUARD(&as->map_client_list_lock); |
Fam Zheng | e95205e | 2015-03-16 17:03:37 +0800 | [diff] [blame] | 3118 | client->bh = bh; |
Mattias Nissler | 69e78f1 | 2023-09-07 06:04:23 -0700 | [diff] [blame] | 3119 | QLIST_INSERT_HEAD(&as->map_client_list, client, link); |
Mattias Nissler | 637b0aa | 2024-08-19 06:54:54 -0700 | [diff] [blame] | 3120 | /* Write map_client_list before reading bounce_buffer_size. */ |
Paolo Bonzini | 33828ca | 2023-03-03 14:36:32 +0100 | [diff] [blame] | 3121 | smp_mb(); |
Mattias Nissler | 637b0aa | 2024-08-19 06:54:54 -0700 | [diff] [blame] | 3122 | if (qatomic_read(&as->bounce_buffer_size) < as->max_bounce_buffer_size) { |
Mattias Nissler | 5c62719 | 2023-09-07 06:04:23 -0700 | [diff] [blame] | 3123 | address_space_notify_map_clients_locked(as); |
Fam Zheng | 33b6c2e | 2015-03-16 17:03:36 +0800 | [diff] [blame] | 3124 | } |
bellard | d0ecd2a | 2006-04-23 17:14:48 +0000 | [diff] [blame] | 3125 | } |
| 3126 | |
Fam Zheng | 38e047b | 2015-03-16 17:03:35 +0800 | [diff] [blame] | 3127 | void cpu_exec_init_all(void) |
| 3128 | { |
| 3129 | qemu_mutex_init(&ram_list.mutex); |
Peter Maydell | 20bccb8 | 2016-10-24 16:26:49 +0100 | [diff] [blame] | 3130 | /* The data structures we set up here depend on knowing the page size, |
| 3131 | * so no more changes can be made after this point. |
| 3132 | * In an ideal world, nothing we did before we had finished the |
| 3133 | * machine setup would care about the target page size, and we could |
| 3134 | * do this much later, rather than requiring board models to state |
| 3135 | * up front what their requirements are. |
| 3136 | */ |
| 3137 | finalize_target_page_bits(); |
Fam Zheng | 38e047b | 2015-03-16 17:03:35 +0800 | [diff] [blame] | 3138 | io_mem_init(); |
Paolo Bonzini | 680a478 | 2015-11-02 09:23:52 +0100 | [diff] [blame] | 3139 | memory_map_init(); |
Fam Zheng | 38e047b | 2015-03-16 17:03:35 +0800 | [diff] [blame] | 3140 | } |
| 3141 | |
Mattias Nissler | 5c62719 | 2023-09-07 06:04:23 -0700 | [diff] [blame] | 3142 | void address_space_unregister_map_client(AddressSpace *as, QEMUBH *bh) |
bellard | d0ecd2a | 2006-04-23 17:14:48 +0000 | [diff] [blame] | 3143 | { |
Mattias Nissler | 69e78f1 | 2023-09-07 06:04:23 -0700 | [diff] [blame] | 3144 | AddressSpaceMapClient *client; |
bellard | d0ecd2a | 2006-04-23 17:14:48 +0000 | [diff] [blame] | 3145 | |
Mattias Nissler | 69e78f1 | 2023-09-07 06:04:23 -0700 | [diff] [blame] | 3146 | QEMU_LOCK_GUARD(&as->map_client_list_lock); |
| 3147 | QLIST_FOREACH(client, &as->map_client_list, link) { |
Fam Zheng | e95205e | 2015-03-16 17:03:37 +0800 | [diff] [blame] | 3148 | if (client->bh == bh) { |
Mattias Nissler | 5c62719 | 2023-09-07 06:04:23 -0700 | [diff] [blame] | 3149 | address_space_unregister_map_client_do(client); |
Fam Zheng | e95205e | 2015-03-16 17:03:37 +0800 | [diff] [blame] | 3150 | break; |
| 3151 | } |
| 3152 | } |
bellard | d0ecd2a | 2006-04-23 17:14:48 +0000 | [diff] [blame] | 3153 | } |
| 3154 | |
Mattias Nissler | 5c62719 | 2023-09-07 06:04:23 -0700 | [diff] [blame] | 3155 | static void address_space_notify_map_clients(AddressSpace *as) |
bellard | d0ecd2a | 2006-04-23 17:14:48 +0000 | [diff] [blame] | 3156 | { |
Mattias Nissler | 69e78f1 | 2023-09-07 06:04:23 -0700 | [diff] [blame] | 3157 | QEMU_LOCK_GUARD(&as->map_client_list_lock); |
Mattias Nissler | 5c62719 | 2023-09-07 06:04:23 -0700 | [diff] [blame] | 3158 | address_space_notify_map_clients_locked(as); |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 3159 | } |
| 3160 | |
Li Zhijian | 0c249ff | 2019-01-17 20:49:01 +0800 | [diff] [blame] | 3161 | static bool flatview_access_valid(FlatView *fv, hwaddr addr, hwaddr len, |
Peter Maydell | eace72b | 2018-05-31 14:50:52 +0100 | [diff] [blame] | 3162 | bool is_write, MemTxAttrs attrs) |
Paolo Bonzini | 51644ab | 2013-04-11 15:40:59 +0200 | [diff] [blame] | 3163 | { |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 3164 | MemoryRegion *mr; |
Paolo Bonzini | 51644ab | 2013-04-11 15:40:59 +0200 | [diff] [blame] | 3165 | hwaddr l, xlat; |
| 3166 | |
| 3167 | while (len > 0) { |
| 3168 | l = len; |
Peter Maydell | efa99a2 | 2018-05-31 14:50:52 +0100 | [diff] [blame] | 3169 | mr = flatview_translate(fv, addr, &xlat, &l, is_write, attrs); |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 3170 | if (!memory_access_is_direct(mr, is_write)) { |
| 3171 | l = memory_access_size(mr, l, addr); |
Peter Maydell | eace72b | 2018-05-31 14:50:52 +0100 | [diff] [blame] | 3172 | if (!memory_region_access_valid(mr, xlat, l, is_write, attrs)) { |
Paolo Bonzini | 51644ab | 2013-04-11 15:40:59 +0200 | [diff] [blame] | 3173 | return false; |
| 3174 | } |
| 3175 | } |
| 3176 | |
| 3177 | len -= l; |
| 3178 | addr += l; |
| 3179 | } |
| 3180 | return true; |
| 3181 | } |
| 3182 | |
Alexey Kardashevskiy | 1662068 | 2017-09-21 18:50:58 +1000 | [diff] [blame] | 3183 | bool address_space_access_valid(AddressSpace *as, hwaddr addr, |
Li Zhijian | 0c249ff | 2019-01-17 20:49:01 +0800 | [diff] [blame] | 3184 | hwaddr len, bool is_write, |
Peter Maydell | fddffa4 | 2018-05-31 14:50:52 +0100 | [diff] [blame] | 3185 | MemTxAttrs attrs) |
Alexey Kardashevskiy | 1662068 | 2017-09-21 18:50:58 +1000 | [diff] [blame] | 3186 | { |
Paolo Bonzini | 11e732a | 2018-03-05 00:23:26 +0100 | [diff] [blame] | 3187 | FlatView *fv; |
Paolo Bonzini | 11e732a | 2018-03-05 00:23:26 +0100 | [diff] [blame] | 3188 | |
Dr. David Alan Gilbert | 694ea27 | 2019-10-07 15:36:41 +0100 | [diff] [blame] | 3189 | RCU_READ_LOCK_GUARD(); |
Paolo Bonzini | 11e732a | 2018-03-05 00:23:26 +0100 | [diff] [blame] | 3190 | fv = address_space_to_flatview(as); |
Philippe Mathieu-Daudé | 58e7468 | 2021-12-15 19:24:20 +0100 | [diff] [blame] | 3191 | return flatview_access_valid(fv, addr, len, is_write, attrs); |
Alexey Kardashevskiy | 1662068 | 2017-09-21 18:50:58 +1000 | [diff] [blame] | 3192 | } |
| 3193 | |
Paolo Bonzini | 715c31e | 2016-11-22 12:04:31 +0100 | [diff] [blame] | 3194 | static hwaddr |
Alexey Kardashevskiy | 1662068 | 2017-09-21 18:50:58 +1000 | [diff] [blame] | 3195 | flatview_extend_translation(FlatView *fv, hwaddr addr, |
Peter Maydell | 53d0790 | 2018-05-31 14:50:52 +0100 | [diff] [blame] | 3196 | hwaddr target_len, |
| 3197 | MemoryRegion *mr, hwaddr base, hwaddr len, |
| 3198 | bool is_write, MemTxAttrs attrs) |
Paolo Bonzini | 715c31e | 2016-11-22 12:04:31 +0100 | [diff] [blame] | 3199 | { |
| 3200 | hwaddr done = 0; |
| 3201 | hwaddr xlat; |
| 3202 | MemoryRegion *this_mr; |
| 3203 | |
| 3204 | for (;;) { |
| 3205 | target_len -= len; |
| 3206 | addr += len; |
| 3207 | done += len; |
| 3208 | if (target_len == 0) { |
| 3209 | return done; |
| 3210 | } |
| 3211 | |
| 3212 | len = target_len; |
Alexey Kardashevskiy | 1662068 | 2017-09-21 18:50:58 +1000 | [diff] [blame] | 3213 | this_mr = flatview_translate(fv, addr, &xlat, |
Peter Maydell | efa99a2 | 2018-05-31 14:50:52 +0100 | [diff] [blame] | 3214 | &len, is_write, attrs); |
Paolo Bonzini | 715c31e | 2016-11-22 12:04:31 +0100 | [diff] [blame] | 3215 | if (this_mr != mr || xlat != base + done) { |
| 3216 | return done; |
| 3217 | } |
| 3218 | } |
| 3219 | } |
| 3220 | |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 3221 | /* Map a physical memory region into a host virtual address. |
| 3222 | * May map a subset of the requested range, given by and returned in *plen. |
| 3223 | * May return NULL if resources needed to perform the mapping are exhausted. |
| 3224 | * Use only for reads OR writes - not for read-modify-write operations. |
Mattias Nissler | 5c62719 | 2023-09-07 06:04:23 -0700 | [diff] [blame] | 3225 | * Use address_space_register_map_client() to know when retrying the map |
| 3226 | * operation is likely to succeed. |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 3227 | */ |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 3228 | void *address_space_map(AddressSpace *as, |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 3229 | hwaddr addr, |
| 3230 | hwaddr *plen, |
Peter Maydell | f26404f | 2018-05-31 14:50:52 +0100 | [diff] [blame] | 3231 | bool is_write, |
| 3232 | MemTxAttrs attrs) |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 3233 | { |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 3234 | hwaddr len = *plen; |
Paolo Bonzini | 715c31e | 2016-11-22 12:04:31 +0100 | [diff] [blame] | 3235 | hwaddr l, xlat; |
| 3236 | MemoryRegion *mr; |
Paolo Bonzini | ad0c60f | 2018-03-05 00:23:26 +0100 | [diff] [blame] | 3237 | FlatView *fv; |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 3238 | |
Alex Bennée | d44fe13 | 2024-07-05 09:40:10 +0100 | [diff] [blame] | 3239 | trace_address_space_map(as, addr, len, is_write, *(uint32_t *) &attrs); |
| 3240 | |
Paolo Bonzini | e3127ae | 2013-06-28 17:29:27 +0200 | [diff] [blame] | 3241 | if (len == 0) { |
| 3242 | return NULL; |
| 3243 | } |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 3244 | |
Paolo Bonzini | e3127ae | 2013-06-28 17:29:27 +0200 | [diff] [blame] | 3245 | l = len; |
Dr. David Alan Gilbert | 694ea27 | 2019-10-07 15:36:41 +0100 | [diff] [blame] | 3246 | RCU_READ_LOCK_GUARD(); |
Paolo Bonzini | ad0c60f | 2018-03-05 00:23:26 +0100 | [diff] [blame] | 3247 | fv = address_space_to_flatview(as); |
Peter Maydell | efa99a2 | 2018-05-31 14:50:52 +0100 | [diff] [blame] | 3248 | mr = flatview_translate(fv, addr, &xlat, &l, is_write, attrs); |
Paolo Bonzini | 41063e1 | 2015-03-18 14:21:43 +0100 | [diff] [blame] | 3249 | |
Paolo Bonzini | e3127ae | 2013-06-28 17:29:27 +0200 | [diff] [blame] | 3250 | if (!memory_access_is_direct(mr, is_write)) { |
Mattias Nissler | 637b0aa | 2024-08-19 06:54:54 -0700 | [diff] [blame] | 3251 | size_t used = qatomic_read(&as->bounce_buffer_size); |
| 3252 | for (;;) { |
| 3253 | hwaddr alloc = MIN(as->max_bounce_buffer_size - used, l); |
| 3254 | size_t new_size = used + alloc; |
| 3255 | size_t actual = |
| 3256 | qatomic_cmpxchg(&as->bounce_buffer_size, used, new_size); |
| 3257 | if (actual == used) { |
| 3258 | l = alloc; |
| 3259 | break; |
| 3260 | } |
| 3261 | used = actual; |
| 3262 | } |
| 3263 | |
| 3264 | if (l == 0) { |
Prasad J Pandit | 77f55ea | 2020-05-26 16:47:43 +0530 | [diff] [blame] | 3265 | *plen = 0; |
Paolo Bonzini | e3127ae | 2013-06-28 17:29:27 +0200 | [diff] [blame] | 3266 | return NULL; |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 3267 | } |
Paolo Bonzini | d3e7155 | 2013-06-28 17:33:29 +0200 | [diff] [blame] | 3268 | |
Mattias Nissler | 637b0aa | 2024-08-19 06:54:54 -0700 | [diff] [blame] | 3269 | BounceBuffer *bounce = g_malloc0(l + sizeof(BounceBuffer)); |
| 3270 | bounce->magic = BOUNCE_BUFFER_MAGIC; |
Paolo Bonzini | d3e7155 | 2013-06-28 17:33:29 +0200 | [diff] [blame] | 3271 | memory_region_ref(mr); |
Mattias Nissler | 637b0aa | 2024-08-19 06:54:54 -0700 | [diff] [blame] | 3272 | bounce->mr = mr; |
| 3273 | bounce->addr = addr; |
| 3274 | bounce->len = l; |
| 3275 | |
Paolo Bonzini | e3127ae | 2013-06-28 17:29:27 +0200 | [diff] [blame] | 3276 | if (!is_write) { |
Fea.Wang | d8d5ca4 | 2024-09-12 15:04:04 +0800 | [diff] [blame] | 3277 | flatview_read(fv, addr, attrs, |
Mattias Nissler | 637b0aa | 2024-08-19 06:54:54 -0700 | [diff] [blame] | 3278 | bounce->buffer, l); |
Stefano Stabellini | 8ab934f | 2011-06-27 18:26:06 +0100 | [diff] [blame] | 3279 | } |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 3280 | |
Paolo Bonzini | e3127ae | 2013-06-28 17:29:27 +0200 | [diff] [blame] | 3281 | *plen = l; |
Mattias Nissler | 637b0aa | 2024-08-19 06:54:54 -0700 | [diff] [blame] | 3282 | return bounce->buffer; |
Paolo Bonzini | e3127ae | 2013-06-28 17:29:27 +0200 | [diff] [blame] | 3283 | } |
| 3284 | |
Paolo Bonzini | d3e7155 | 2013-06-28 17:33:29 +0200 | [diff] [blame] | 3285 | memory_region_ref(mr); |
Alexey Kardashevskiy | 1662068 | 2017-09-21 18:50:58 +1000 | [diff] [blame] | 3286 | *plen = flatview_extend_translation(fv, addr, len, mr, xlat, |
Peter Maydell | 53d0790 | 2018-05-31 14:50:52 +0100 | [diff] [blame] | 3287 | l, is_write, attrs); |
Alexander Bulekov | fc1c834 | 2021-01-20 01:02:55 -0500 | [diff] [blame] | 3288 | fuzz_dma_read_cb(addr, *plen, mr); |
Edgar E. Iglesias | 5a5585f | 2024-04-30 18:49:35 +0200 | [diff] [blame] | 3289 | return qemu_ram_ptr_length(mr->ram_block, xlat, plen, true, is_write); |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 3290 | } |
| 3291 | |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 3292 | /* Unmaps a memory region previously mapped by address_space_map(). |
Philippe Mathieu-Daudé | ae5883a | 2020-02-19 20:12:01 +0100 | [diff] [blame] | 3293 | * Will also mark the memory as dirty if is_write is true. access_len gives |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 3294 | * the amount of memory that was actually read or written by the caller. |
| 3295 | */ |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 3296 | void address_space_unmap(AddressSpace *as, void *buffer, hwaddr len, |
Philippe Mathieu-Daudé | ae5883a | 2020-02-19 20:12:01 +0100 | [diff] [blame] | 3297 | bool is_write, hwaddr access_len) |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 3298 | { |
Mattias Nissler | 637b0aa | 2024-08-19 06:54:54 -0700 | [diff] [blame] | 3299 | MemoryRegion *mr; |
| 3300 | ram_addr_t addr1; |
Paolo Bonzini | d3e7155 | 2013-06-28 17:33:29 +0200 | [diff] [blame] | 3301 | |
Mattias Nissler | 637b0aa | 2024-08-19 06:54:54 -0700 | [diff] [blame] | 3302 | mr = memory_region_from_host(buffer, &addr1); |
| 3303 | if (mr != NULL) { |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 3304 | if (is_write) { |
Paolo Bonzini | 845b621 | 2015-03-23 11:45:53 +0100 | [diff] [blame] | 3305 | invalidate_and_set_dirty(mr, addr1, access_len); |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 3306 | } |
Jan Kiszka | 868bb33 | 2011-06-21 22:59:09 +0200 | [diff] [blame] | 3307 | if (xen_enabled()) { |
Jan Kiszka | e41d7c6 | 2011-06-21 22:59:08 +0200 | [diff] [blame] | 3308 | xen_invalidate_map_cache_entry(buffer); |
Anthony PERARD | 050a0dd | 2010-09-16 13:57:49 +0100 | [diff] [blame] | 3309 | } |
Paolo Bonzini | d3e7155 | 2013-06-28 17:33:29 +0200 | [diff] [blame] | 3310 | memory_region_unref(mr); |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 3311 | return; |
| 3312 | } |
Mattias Nissler | 637b0aa | 2024-08-19 06:54:54 -0700 | [diff] [blame] | 3313 | |
| 3314 | |
| 3315 | BounceBuffer *bounce = container_of(buffer, BounceBuffer, buffer); |
| 3316 | assert(bounce->magic == BOUNCE_BUFFER_MAGIC); |
| 3317 | |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 3318 | if (is_write) { |
Mattias Nissler | 637b0aa | 2024-08-19 06:54:54 -0700 | [diff] [blame] | 3319 | address_space_write(as, bounce->addr, MEMTXATTRS_UNSPECIFIED, |
| 3320 | bounce->buffer, access_len); |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 3321 | } |
Mattias Nissler | 637b0aa | 2024-08-19 06:54:54 -0700 | [diff] [blame] | 3322 | |
| 3323 | qatomic_sub(&as->bounce_buffer_size, bounce->len); |
| 3324 | bounce->magic = ~BOUNCE_BUFFER_MAGIC; |
| 3325 | memory_region_unref(bounce->mr); |
| 3326 | g_free(bounce); |
| 3327 | /* Write bounce_buffer_size before reading map_client_list. */ |
| 3328 | smp_mb(); |
Mattias Nissler | 5c62719 | 2023-09-07 06:04:23 -0700 | [diff] [blame] | 3329 | address_space_notify_map_clients(as); |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 3330 | } |
bellard | d0ecd2a | 2006-04-23 17:14:48 +0000 | [diff] [blame] | 3331 | |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 3332 | void *cpu_physical_memory_map(hwaddr addr, |
| 3333 | hwaddr *plen, |
Philippe Mathieu-Daudé | 28c80bf | 2020-02-19 20:32:30 +0100 | [diff] [blame] | 3334 | bool is_write) |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 3335 | { |
Peter Maydell | f26404f | 2018-05-31 14:50:52 +0100 | [diff] [blame] | 3336 | return address_space_map(&address_space_memory, addr, plen, is_write, |
| 3337 | MEMTXATTRS_UNSPECIFIED); |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 3338 | } |
| 3339 | |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 3340 | void cpu_physical_memory_unmap(void *buffer, hwaddr len, |
Philippe Mathieu-Daudé | 28c80bf | 2020-02-19 20:32:30 +0100 | [diff] [blame] | 3341 | bool is_write, hwaddr access_len) |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 3342 | { |
| 3343 | return address_space_unmap(&address_space_memory, buffer, len, is_write, access_len); |
| 3344 | } |
| 3345 | |
Paolo Bonzini | 0ce265f | 2016-11-22 11:34:02 +0100 | [diff] [blame] | 3346 | #define ARG1_DECL AddressSpace *as |
| 3347 | #define ARG1 as |
| 3348 | #define SUFFIX |
| 3349 | #define TRANSLATE(...) address_space_translate(as, __VA_ARGS__) |
Paolo Bonzini | 0ce265f | 2016-11-22 11:34:02 +0100 | [diff] [blame] | 3350 | #define RCU_READ_LOCK(...) rcu_read_lock() |
| 3351 | #define RCU_READ_UNLOCK(...) rcu_read_unlock() |
Paolo Bonzini | 139c183 | 2020-02-04 12:41:01 +0100 | [diff] [blame] | 3352 | #include "memory_ldst.c.inc" |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 3353 | |
Paolo Bonzini | 1f4e496 | 2016-11-22 12:04:52 +0100 | [diff] [blame] | 3354 | int64_t address_space_cache_init(MemoryRegionCache *cache, |
| 3355 | AddressSpace *as, |
| 3356 | hwaddr addr, |
| 3357 | hwaddr len, |
| 3358 | bool is_write) |
| 3359 | { |
Paolo Bonzini | 4856404 | 2018-03-18 18:26:36 +0100 | [diff] [blame] | 3360 | AddressSpaceDispatch *d; |
| 3361 | hwaddr l; |
| 3362 | MemoryRegion *mr; |
Paolo Bonzini | 4bfb024 | 2020-12-01 09:29:56 -0500 | [diff] [blame] | 3363 | Int128 diff; |
Paolo Bonzini | 4856404 | 2018-03-18 18:26:36 +0100 | [diff] [blame] | 3364 | |
| 3365 | assert(len > 0); |
| 3366 | |
| 3367 | l = len; |
| 3368 | cache->fv = address_space_get_flatview(as); |
| 3369 | d = flatview_to_dispatch(cache->fv); |
| 3370 | cache->mrs = *address_space_translate_internal(d, addr, &cache->xlat, &l, true); |
| 3371 | |
Paolo Bonzini | 4bfb024 | 2020-12-01 09:29:56 -0500 | [diff] [blame] | 3372 | /* |
| 3373 | * cache->xlat is now relative to cache->mrs.mr, not to the section itself. |
| 3374 | * Take that into account to compute how many bytes are there between |
| 3375 | * cache->xlat and the end of the section. |
| 3376 | */ |
| 3377 | diff = int128_sub(cache->mrs.size, |
Yeqi Fu | 48805df | 2023-03-15 11:26:49 +0800 | [diff] [blame] | 3378 | int128_make64(cache->xlat - cache->mrs.offset_within_region)); |
Paolo Bonzini | 4bfb024 | 2020-12-01 09:29:56 -0500 | [diff] [blame] | 3379 | l = int128_get64(int128_min(diff, int128_make64(l))); |
| 3380 | |
Paolo Bonzini | 4856404 | 2018-03-18 18:26:36 +0100 | [diff] [blame] | 3381 | mr = cache->mrs.mr; |
| 3382 | memory_region_ref(mr); |
| 3383 | if (memory_access_is_direct(mr, is_write)) { |
Peter Maydell | 53d0790 | 2018-05-31 14:50:52 +0100 | [diff] [blame] | 3384 | /* We don't care about the memory attributes here as we're only |
| 3385 | * doing this if we found actual RAM, which behaves the same |
| 3386 | * regardless of attributes; so UNSPECIFIED is fine. |
| 3387 | */ |
Paolo Bonzini | 4856404 | 2018-03-18 18:26:36 +0100 | [diff] [blame] | 3388 | l = flatview_extend_translation(cache->fv, addr, len, mr, |
Peter Maydell | 53d0790 | 2018-05-31 14:50:52 +0100 | [diff] [blame] | 3389 | cache->xlat, l, is_write, |
| 3390 | MEMTXATTRS_UNSPECIFIED); |
Edgar E. Iglesias | 5a5585f | 2024-04-30 18:49:35 +0200 | [diff] [blame] | 3391 | cache->ptr = qemu_ram_ptr_length(mr->ram_block, cache->xlat, &l, true, |
| 3392 | is_write); |
Paolo Bonzini | 4856404 | 2018-03-18 18:26:36 +0100 | [diff] [blame] | 3393 | } else { |
| 3394 | cache->ptr = NULL; |
| 3395 | } |
| 3396 | |
| 3397 | cache->len = l; |
| 3398 | cache->is_write = is_write; |
| 3399 | return l; |
Paolo Bonzini | 1f4e496 | 2016-11-22 12:04:52 +0100 | [diff] [blame] | 3400 | } |
| 3401 | |
| 3402 | void address_space_cache_invalidate(MemoryRegionCache *cache, |
| 3403 | hwaddr addr, |
| 3404 | hwaddr access_len) |
| 3405 | { |
Paolo Bonzini | 4856404 | 2018-03-18 18:26:36 +0100 | [diff] [blame] | 3406 | assert(cache->is_write); |
| 3407 | if (likely(cache->ptr)) { |
| 3408 | invalidate_and_set_dirty(cache->mrs.mr, addr + cache->xlat, access_len); |
| 3409 | } |
Paolo Bonzini | 1f4e496 | 2016-11-22 12:04:52 +0100 | [diff] [blame] | 3410 | } |
| 3411 | |
| 3412 | void address_space_cache_destroy(MemoryRegionCache *cache) |
| 3413 | { |
Paolo Bonzini | 4856404 | 2018-03-18 18:26:36 +0100 | [diff] [blame] | 3414 | if (!cache->mrs.mr) { |
| 3415 | return; |
| 3416 | } |
| 3417 | |
| 3418 | if (xen_enabled()) { |
| 3419 | xen_invalidate_map_cache_entry(cache->ptr); |
| 3420 | } |
| 3421 | memory_region_unref(cache->mrs.mr); |
| 3422 | flatview_unref(cache->fv); |
| 3423 | cache->mrs.mr = NULL; |
| 3424 | cache->fv = NULL; |
| 3425 | } |
| 3426 | |
| 3427 | /* Called from RCU critical section. This function has the same |
| 3428 | * semantics as address_space_translate, but it only works on a |
| 3429 | * predefined range of a MemoryRegion that was mapped with |
| 3430 | * address_space_cache_init. |
| 3431 | */ |
| 3432 | static inline MemoryRegion *address_space_translate_cached( |
| 3433 | MemoryRegionCache *cache, hwaddr addr, hwaddr *xlat, |
Peter Maydell | bc6b1ce | 2018-05-31 14:50:52 +0100 | [diff] [blame] | 3434 | hwaddr *plen, bool is_write, MemTxAttrs attrs) |
Paolo Bonzini | 4856404 | 2018-03-18 18:26:36 +0100 | [diff] [blame] | 3435 | { |
| 3436 | MemoryRegionSection section; |
| 3437 | MemoryRegion *mr; |
| 3438 | IOMMUMemoryRegion *iommu_mr; |
| 3439 | AddressSpace *target_as; |
| 3440 | |
| 3441 | assert(!cache->ptr); |
| 3442 | *xlat = addr + cache->xlat; |
| 3443 | |
| 3444 | mr = cache->mrs.mr; |
| 3445 | iommu_mr = memory_region_get_iommu(mr); |
| 3446 | if (!iommu_mr) { |
| 3447 | /* MMIO region. */ |
| 3448 | return mr; |
| 3449 | } |
| 3450 | |
| 3451 | section = address_space_translate_iommu(iommu_mr, xlat, plen, |
| 3452 | NULL, is_write, true, |
Peter Maydell | 2f7b009 | 2018-05-31 14:50:53 +0100 | [diff] [blame] | 3453 | &target_as, attrs); |
Paolo Bonzini | 4856404 | 2018-03-18 18:26:36 +0100 | [diff] [blame] | 3454 | return section.mr; |
| 3455 | } |
| 3456 | |
Jonathan Cameron | 47293c9 | 2024-03-07 15:37:10 +0000 | [diff] [blame] | 3457 | /* Called within RCU critical section. */ |
| 3458 | static MemTxResult address_space_write_continue_cached(MemTxAttrs attrs, |
| 3459 | const void *ptr, |
| 3460 | hwaddr len, |
| 3461 | hwaddr mr_addr, |
| 3462 | hwaddr l, |
| 3463 | MemoryRegion *mr) |
| 3464 | { |
| 3465 | MemTxResult result = MEMTX_OK; |
| 3466 | const uint8_t *buf = ptr; |
| 3467 | |
| 3468 | for (;;) { |
| 3469 | result |= flatview_write_continue_step(attrs, buf, len, mr_addr, &l, |
| 3470 | mr); |
| 3471 | |
| 3472 | len -= l; |
| 3473 | buf += l; |
| 3474 | mr_addr += l; |
| 3475 | |
| 3476 | if (!len) { |
| 3477 | break; |
| 3478 | } |
| 3479 | |
| 3480 | l = len; |
| 3481 | } |
| 3482 | |
| 3483 | return result; |
| 3484 | } |
| 3485 | |
| 3486 | /* Called within RCU critical section. */ |
| 3487 | static MemTxResult address_space_read_continue_cached(MemTxAttrs attrs, |
| 3488 | void *ptr, hwaddr len, |
| 3489 | hwaddr mr_addr, hwaddr l, |
| 3490 | MemoryRegion *mr) |
| 3491 | { |
| 3492 | MemTxResult result = MEMTX_OK; |
| 3493 | uint8_t *buf = ptr; |
| 3494 | |
| 3495 | for (;;) { |
| 3496 | result |= flatview_read_continue_step(attrs, buf, len, mr_addr, &l, mr); |
| 3497 | len -= l; |
| 3498 | buf += l; |
| 3499 | mr_addr += l; |
| 3500 | |
| 3501 | if (!len) { |
| 3502 | break; |
| 3503 | } |
| 3504 | l = len; |
| 3505 | } |
| 3506 | |
| 3507 | return result; |
| 3508 | } |
| 3509 | |
Paolo Bonzini | 4856404 | 2018-03-18 18:26:36 +0100 | [diff] [blame] | 3510 | /* Called from RCU critical section. address_space_read_cached uses this |
| 3511 | * out of line function when the target is an MMIO or IOMMU region. |
| 3512 | */ |
Philippe Mathieu-Daudé | 38df19f | 2020-05-18 17:53:02 +0200 | [diff] [blame] | 3513 | MemTxResult |
Paolo Bonzini | 4856404 | 2018-03-18 18:26:36 +0100 | [diff] [blame] | 3514 | address_space_read_cached_slow(MemoryRegionCache *cache, hwaddr addr, |
Li Zhijian | 0c249ff | 2019-01-17 20:49:01 +0800 | [diff] [blame] | 3515 | void *buf, hwaddr len) |
Paolo Bonzini | 4856404 | 2018-03-18 18:26:36 +0100 | [diff] [blame] | 3516 | { |
Jonathan Cameron | 4c7c856 | 2024-03-07 15:37:07 +0000 | [diff] [blame] | 3517 | hwaddr mr_addr, l; |
Paolo Bonzini | 4856404 | 2018-03-18 18:26:36 +0100 | [diff] [blame] | 3518 | MemoryRegion *mr; |
| 3519 | |
| 3520 | l = len; |
Jonathan Cameron | 4c7c856 | 2024-03-07 15:37:07 +0000 | [diff] [blame] | 3521 | mr = address_space_translate_cached(cache, addr, &mr_addr, &l, false, |
Peter Maydell | bc6b1ce | 2018-05-31 14:50:52 +0100 | [diff] [blame] | 3522 | MEMTXATTRS_UNSPECIFIED); |
Jonathan Cameron | 47293c9 | 2024-03-07 15:37:10 +0000 | [diff] [blame] | 3523 | return address_space_read_continue_cached(MEMTXATTRS_UNSPECIFIED, |
| 3524 | buf, len, mr_addr, l, mr); |
Paolo Bonzini | 4856404 | 2018-03-18 18:26:36 +0100 | [diff] [blame] | 3525 | } |
| 3526 | |
| 3527 | /* Called from RCU critical section. address_space_write_cached uses this |
| 3528 | * out of line function when the target is an MMIO or IOMMU region. |
| 3529 | */ |
Philippe Mathieu-Daudé | 38df19f | 2020-05-18 17:53:02 +0200 | [diff] [blame] | 3530 | MemTxResult |
Paolo Bonzini | 4856404 | 2018-03-18 18:26:36 +0100 | [diff] [blame] | 3531 | address_space_write_cached_slow(MemoryRegionCache *cache, hwaddr addr, |
Li Zhijian | 0c249ff | 2019-01-17 20:49:01 +0800 | [diff] [blame] | 3532 | const void *buf, hwaddr len) |
Paolo Bonzini | 4856404 | 2018-03-18 18:26:36 +0100 | [diff] [blame] | 3533 | { |
Jonathan Cameron | 4c7c856 | 2024-03-07 15:37:07 +0000 | [diff] [blame] | 3534 | hwaddr mr_addr, l; |
Paolo Bonzini | 4856404 | 2018-03-18 18:26:36 +0100 | [diff] [blame] | 3535 | MemoryRegion *mr; |
| 3536 | |
| 3537 | l = len; |
Jonathan Cameron | 4c7c856 | 2024-03-07 15:37:07 +0000 | [diff] [blame] | 3538 | mr = address_space_translate_cached(cache, addr, &mr_addr, &l, true, |
Peter Maydell | bc6b1ce | 2018-05-31 14:50:52 +0100 | [diff] [blame] | 3539 | MEMTXATTRS_UNSPECIFIED); |
Jonathan Cameron | 47293c9 | 2024-03-07 15:37:10 +0000 | [diff] [blame] | 3540 | return address_space_write_continue_cached(MEMTXATTRS_UNSPECIFIED, |
| 3541 | buf, len, mr_addr, l, mr); |
Paolo Bonzini | 1f4e496 | 2016-11-22 12:04:52 +0100 | [diff] [blame] | 3542 | } |
| 3543 | |
| 3544 | #define ARG1_DECL MemoryRegionCache *cache |
| 3545 | #define ARG1 cache |
Paolo Bonzini | 4856404 | 2018-03-18 18:26:36 +0100 | [diff] [blame] | 3546 | #define SUFFIX _cached_slow |
| 3547 | #define TRANSLATE(...) address_space_translate_cached(cache, __VA_ARGS__) |
Paolo Bonzini | 4856404 | 2018-03-18 18:26:36 +0100 | [diff] [blame] | 3548 | #define RCU_READ_LOCK() ((void)0) |
| 3549 | #define RCU_READ_UNLOCK() ((void)0) |
Paolo Bonzini | 139c183 | 2020-02-04 12:41:01 +0100 | [diff] [blame] | 3550 | #include "memory_ldst.c.inc" |
Paolo Bonzini | 1f4e496 | 2016-11-22 12:04:52 +0100 | [diff] [blame] | 3551 | |
aliguori | 5e2972f | 2009-03-28 17:51:36 +0000 | [diff] [blame] | 3552 | /* virtual memory access for debug (includes writing to ROM) */ |
Philippe Mathieu-Daudé | 73842ef | 2022-02-03 02:13:28 +0100 | [diff] [blame] | 3553 | int cpu_memory_rw_debug(CPUState *cpu, vaddr addr, |
| 3554 | void *ptr, size_t len, bool is_write) |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 3555 | { |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 3556 | hwaddr phys_addr; |
Philippe Mathieu-Daudé | 73842ef | 2022-02-03 02:13:28 +0100 | [diff] [blame] | 3557 | vaddr l, page; |
Philippe Mathieu-Daudé | d7ef71e | 2020-02-19 20:02:11 +0100 | [diff] [blame] | 3558 | uint8_t *buf = ptr; |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 3559 | |
Christian Borntraeger | 79ca7a1 | 2017-03-07 15:19:08 +0100 | [diff] [blame] | 3560 | cpu_synchronize_state(cpu); |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 3561 | while (len > 0) { |
Peter Maydell | 5232e4c | 2016-01-21 14:15:06 +0000 | [diff] [blame] | 3562 | int asidx; |
| 3563 | MemTxAttrs attrs; |
Philippe Mathieu-Daudé | ddfc8b9 | 2020-05-18 17:53:03 +0200 | [diff] [blame] | 3564 | MemTxResult res; |
Peter Maydell | 5232e4c | 2016-01-21 14:15:06 +0000 | [diff] [blame] | 3565 | |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 3566 | page = addr & TARGET_PAGE_MASK; |
Peter Maydell | 5232e4c | 2016-01-21 14:15:06 +0000 | [diff] [blame] | 3567 | phys_addr = cpu_get_phys_page_attrs_debug(cpu, page, &attrs); |
| 3568 | asidx = cpu_asidx_from_attrs(cpu, attrs); |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 3569 | /* if no physical page mapped, return an error */ |
| 3570 | if (phys_addr == -1) |
| 3571 | return -1; |
| 3572 | l = (page + TARGET_PAGE_SIZE) - addr; |
| 3573 | if (l > len) |
| 3574 | l = len; |
aliguori | 5e2972f | 2009-03-28 17:51:36 +0000 | [diff] [blame] | 3575 | phys_addr += (addr & ~TARGET_PAGE_MASK); |
Edgar E. Iglesias | 2e38847 | 2013-12-13 16:31:02 +1000 | [diff] [blame] | 3576 | if (is_write) { |
Philippe Mathieu-Daudé | ddfc8b9 | 2020-05-18 17:53:03 +0200 | [diff] [blame] | 3577 | res = address_space_write_rom(cpu->cpu_ases[asidx].as, phys_addr, |
| 3578 | attrs, buf, l); |
Edgar E. Iglesias | 2e38847 | 2013-12-13 16:31:02 +1000 | [diff] [blame] | 3579 | } else { |
Philippe Mathieu-Daudé | ddfc8b9 | 2020-05-18 17:53:03 +0200 | [diff] [blame] | 3580 | res = address_space_read(cpu->cpu_ases[asidx].as, phys_addr, |
| 3581 | attrs, buf, l); |
| 3582 | } |
| 3583 | if (res != MEMTX_OK) { |
| 3584 | return -1; |
Edgar E. Iglesias | 2e38847 | 2013-12-13 16:31:02 +1000 | [diff] [blame] | 3585 | } |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 3586 | len -= l; |
| 3587 | buf += l; |
| 3588 | addr += l; |
| 3589 | } |
| 3590 | return 0; |
| 3591 | } |
Dr. David Alan Gilbert | 038629a | 2015-11-05 18:10:29 +0000 | [diff] [blame] | 3592 | |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 3593 | bool cpu_physical_memory_is_io(hwaddr phys_addr) |
Wen Congyang | 76f3553 | 2012-05-07 12:04:18 +0800 | [diff] [blame] | 3594 | { |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 3595 | MemoryRegion*mr; |
Paolo Bonzini | 149f54b | 2013-05-24 12:59:37 +0200 | [diff] [blame] | 3596 | hwaddr l = 1; |
Wen Congyang | 76f3553 | 2012-05-07 12:04:18 +0800 | [diff] [blame] | 3597 | |
Dr. David Alan Gilbert | 694ea27 | 2019-10-07 15:36:41 +0100 | [diff] [blame] | 3598 | RCU_READ_LOCK_GUARD(); |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 3599 | mr = address_space_translate(&address_space_memory, |
Peter Maydell | bc6b1ce | 2018-05-31 14:50:52 +0100 | [diff] [blame] | 3600 | phys_addr, &phys_addr, &l, false, |
| 3601 | MEMTXATTRS_UNSPECIFIED); |
Wen Congyang | 76f3553 | 2012-05-07 12:04:18 +0800 | [diff] [blame] | 3602 | |
Markus Armbruster | 66997c4 | 2022-11-22 14:49:16 +0100 | [diff] [blame] | 3603 | return !(memory_region_is_ram(mr) || memory_region_is_romd(mr)); |
Wen Congyang | 76f3553 | 2012-05-07 12:04:18 +0800 | [diff] [blame] | 3604 | } |
Michael R. Hines | bd2fa51 | 2013-06-25 21:35:34 -0400 | [diff] [blame] | 3605 | |
Dr. David Alan Gilbert | e380705 | 2015-05-21 13:24:13 +0100 | [diff] [blame] | 3606 | int qemu_ram_foreach_block(RAMBlockIterFunc func, void *opaque) |
Michael R. Hines | bd2fa51 | 2013-06-25 21:35:34 -0400 | [diff] [blame] | 3607 | { |
| 3608 | RAMBlock *block; |
Dr. David Alan Gilbert | e380705 | 2015-05-21 13:24:13 +0100 | [diff] [blame] | 3609 | int ret = 0; |
Michael R. Hines | bd2fa51 | 2013-06-25 21:35:34 -0400 | [diff] [blame] | 3610 | |
Dr. David Alan Gilbert | 694ea27 | 2019-10-07 15:36:41 +0100 | [diff] [blame] | 3611 | RCU_READ_LOCK_GUARD(); |
Peter Xu | 99e1558 | 2017-05-12 12:17:39 +0800 | [diff] [blame] | 3612 | RAMBLOCK_FOREACH(block) { |
Yury Kotov | 754cb9c | 2019-02-15 20:45:44 +0300 | [diff] [blame] | 3613 | ret = func(block, opaque); |
Dr. David Alan Gilbert | e380705 | 2015-05-21 13:24:13 +0100 | [diff] [blame] | 3614 | if (ret) { |
| 3615 | break; |
| 3616 | } |
Michael R. Hines | bd2fa51 | 2013-06-25 21:35:34 -0400 | [diff] [blame] | 3617 | } |
Dr. David Alan Gilbert | e380705 | 2015-05-21 13:24:13 +0100 | [diff] [blame] | 3618 | return ret; |
Michael R. Hines | bd2fa51 | 2013-06-25 21:35:34 -0400 | [diff] [blame] | 3619 | } |
Dr. David Alan Gilbert | d3a5038 | 2017-02-24 18:28:32 +0000 | [diff] [blame] | 3620 | |
| 3621 | /* |
| 3622 | * Unmap pages of memory from start to start+length such that |
| 3623 | * they a) read as 0, b) Trigger whatever fault mechanism |
| 3624 | * the OS provides for postcopy. |
| 3625 | * The pages must be unmapped by the end of the function. |
| 3626 | * Returns: 0 on success, none-0 on failure |
| 3627 | * |
| 3628 | */ |
| 3629 | int ram_block_discard_range(RAMBlock *rb, uint64_t start, size_t length) |
| 3630 | { |
| 3631 | int ret = -1; |
| 3632 | |
| 3633 | uint8_t *host_startaddr = rb->host + start; |
| 3634 | |
Marc-André Lureau | 619bd31 | 2020-01-03 11:39:58 +0400 | [diff] [blame] | 3635 | if (!QEMU_PTR_IS_ALIGNED(host_startaddr, rb->page_size)) { |
Xiaoyao Li | ea18be7 | 2024-01-24 21:33:28 -0500 | [diff] [blame] | 3636 | error_report("%s: Unaligned start address: %p", |
| 3637 | __func__, host_startaddr); |
Dr. David Alan Gilbert | d3a5038 | 2017-02-24 18:28:32 +0000 | [diff] [blame] | 3638 | goto err; |
| 3639 | } |
| 3640 | |
David Hildenbrand | dcdc460 | 2021-04-29 13:27:03 +0200 | [diff] [blame] | 3641 | if ((start + length) <= rb->max_length) { |
Dr. David Alan Gilbert | db144f7 | 2018-03-12 17:20:56 +0000 | [diff] [blame] | 3642 | bool need_madvise, need_fallocate; |
Marc-André Lureau | 619bd31 | 2020-01-03 11:39:58 +0400 | [diff] [blame] | 3643 | if (!QEMU_IS_ALIGNED(length, rb->page_size)) { |
Xiaoyao Li | ea18be7 | 2024-01-24 21:33:28 -0500 | [diff] [blame] | 3644 | error_report("%s: Unaligned length: %zx", __func__, length); |
Dr. David Alan Gilbert | d3a5038 | 2017-02-24 18:28:32 +0000 | [diff] [blame] | 3645 | goto err; |
| 3646 | } |
| 3647 | |
| 3648 | errno = ENOTSUP; /* If we are missing MADVISE etc */ |
| 3649 | |
Dr. David Alan Gilbert | db144f7 | 2018-03-12 17:20:56 +0000 | [diff] [blame] | 3650 | /* The logic here is messy; |
| 3651 | * madvise DONTNEED fails for hugepages |
| 3652 | * fallocate works on hugepages and shmem |
David Hildenbrand | cdfa56c | 2021-04-06 10:01:25 +0200 | [diff] [blame] | 3653 | * shared anonymous memory requires madvise REMOVE |
Dr. David Alan Gilbert | db144f7 | 2018-03-12 17:20:56 +0000 | [diff] [blame] | 3654 | */ |
Richard Henderson | 80c3aee | 2024-01-02 12:57:48 +1100 | [diff] [blame] | 3655 | need_madvise = (rb->page_size == qemu_real_host_page_size()); |
Dr. David Alan Gilbert | db144f7 | 2018-03-12 17:20:56 +0000 | [diff] [blame] | 3656 | need_fallocate = rb->fd != -1; |
| 3657 | if (need_fallocate) { |
| 3658 | /* For a file, this causes the area of the file to be zero'd |
| 3659 | * if read, and for hugetlbfs also causes it to be unmapped |
| 3660 | * so a userfault will trigger. |
Dr. David Alan Gilbert | e2fa71f | 2017-02-24 18:28:33 +0000 | [diff] [blame] | 3661 | */ |
| 3662 | #ifdef CONFIG_FALLOCATE_PUNCH_HOLE |
David Hildenbrand | 1d44ff5 | 2023-07-06 09:56:06 +0200 | [diff] [blame] | 3663 | /* |
David Hildenbrand | b2cccb5 | 2023-09-06 14:04:57 +0200 | [diff] [blame] | 3664 | * fallocate() will fail with readonly files. Let's print a |
| 3665 | * proper error message. |
| 3666 | */ |
| 3667 | if (rb->flags & RAM_READONLY_FD) { |
Xiaoyao Li | ea18be7 | 2024-01-24 21:33:28 -0500 | [diff] [blame] | 3668 | error_report("%s: Discarding RAM with readonly files is not" |
| 3669 | " supported", __func__); |
David Hildenbrand | b2cccb5 | 2023-09-06 14:04:57 +0200 | [diff] [blame] | 3670 | goto err; |
| 3671 | |
| 3672 | } |
| 3673 | /* |
David Hildenbrand | 1d44ff5 | 2023-07-06 09:56:06 +0200 | [diff] [blame] | 3674 | * We'll discard data from the actual file, even though we only |
| 3675 | * have a MAP_PRIVATE mapping, possibly messing with other |
| 3676 | * MAP_PRIVATE/MAP_SHARED mappings. There is no easy way to |
| 3677 | * change that behavior whithout violating the promised |
| 3678 | * semantics of ram_block_discard_range(). |
| 3679 | * |
| 3680 | * Only warn, because it works as long as nobody else uses that |
| 3681 | * file. |
| 3682 | */ |
| 3683 | if (!qemu_ram_is_shared(rb)) { |
Xiaoyao Li | ea18be7 | 2024-01-24 21:33:28 -0500 | [diff] [blame] | 3684 | warn_report_once("%s: Discarding RAM" |
David Hildenbrand | 1d44ff5 | 2023-07-06 09:56:06 +0200 | [diff] [blame] | 3685 | " in private file mappings is possibly" |
| 3686 | " dangerous, because it will modify the" |
| 3687 | " underlying file and will affect other" |
Xiaoyao Li | ea18be7 | 2024-01-24 21:33:28 -0500 | [diff] [blame] | 3688 | " users of the file", __func__); |
David Hildenbrand | 1d44ff5 | 2023-07-06 09:56:06 +0200 | [diff] [blame] | 3689 | } |
| 3690 | |
Dr. David Alan Gilbert | e2fa71f | 2017-02-24 18:28:33 +0000 | [diff] [blame] | 3691 | ret = fallocate(rb->fd, FALLOC_FL_PUNCH_HOLE | FALLOC_FL_KEEP_SIZE, |
| 3692 | start, length); |
Dr. David Alan Gilbert | db144f7 | 2018-03-12 17:20:56 +0000 | [diff] [blame] | 3693 | if (ret) { |
| 3694 | ret = -errno; |
Xiaoyao Li | ea18be7 | 2024-01-24 21:33:28 -0500 | [diff] [blame] | 3695 | error_report("%s: Failed to fallocate %s:%" PRIx64 " +%zx (%d)", |
| 3696 | __func__, rb->idstr, start, length, ret); |
Dr. David Alan Gilbert | db144f7 | 2018-03-12 17:20:56 +0000 | [diff] [blame] | 3697 | goto err; |
| 3698 | } |
| 3699 | #else |
| 3700 | ret = -ENOSYS; |
Xiaoyao Li | ea18be7 | 2024-01-24 21:33:28 -0500 | [diff] [blame] | 3701 | error_report("%s: fallocate not available/file" |
Dr. David Alan Gilbert | d3a5038 | 2017-02-24 18:28:32 +0000 | [diff] [blame] | 3702 | "%s:%" PRIx64 " +%zx (%d)", |
Xiaoyao Li | ea18be7 | 2024-01-24 21:33:28 -0500 | [diff] [blame] | 3703 | __func__, rb->idstr, start, length, ret); |
Dr. David Alan Gilbert | db144f7 | 2018-03-12 17:20:56 +0000 | [diff] [blame] | 3704 | goto err; |
| 3705 | #endif |
Dr. David Alan Gilbert | d3a5038 | 2017-02-24 18:28:32 +0000 | [diff] [blame] | 3706 | } |
Dr. David Alan Gilbert | db144f7 | 2018-03-12 17:20:56 +0000 | [diff] [blame] | 3707 | if (need_madvise) { |
| 3708 | /* For normal RAM this causes it to be unmapped, |
| 3709 | * for shared memory it causes the local mapping to disappear |
| 3710 | * and to fall back on the file contents (which we just |
| 3711 | * fallocate'd away). |
| 3712 | */ |
| 3713 | #if defined(CONFIG_MADVISE) |
David Hildenbrand | cdfa56c | 2021-04-06 10:01:25 +0200 | [diff] [blame] | 3714 | if (qemu_ram_is_shared(rb) && rb->fd < 0) { |
| 3715 | ret = madvise(host_startaddr, length, QEMU_MADV_REMOVE); |
| 3716 | } else { |
| 3717 | ret = madvise(host_startaddr, length, QEMU_MADV_DONTNEED); |
| 3718 | } |
Dr. David Alan Gilbert | db144f7 | 2018-03-12 17:20:56 +0000 | [diff] [blame] | 3719 | if (ret) { |
| 3720 | ret = -errno; |
Xiaoyao Li | ea18be7 | 2024-01-24 21:33:28 -0500 | [diff] [blame] | 3721 | error_report("%s: Failed to discard range " |
Dr. David Alan Gilbert | db144f7 | 2018-03-12 17:20:56 +0000 | [diff] [blame] | 3722 | "%s:%" PRIx64 " +%zx (%d)", |
Xiaoyao Li | ea18be7 | 2024-01-24 21:33:28 -0500 | [diff] [blame] | 3723 | __func__, rb->idstr, start, length, ret); |
Dr. David Alan Gilbert | db144f7 | 2018-03-12 17:20:56 +0000 | [diff] [blame] | 3724 | goto err; |
| 3725 | } |
| 3726 | #else |
| 3727 | ret = -ENOSYS; |
Xiaoyao Li | ea18be7 | 2024-01-24 21:33:28 -0500 | [diff] [blame] | 3728 | error_report("%s: MADVISE not available %s:%" PRIx64 " +%zx (%d)", |
| 3729 | __func__, rb->idstr, start, length, ret); |
Dr. David Alan Gilbert | db144f7 | 2018-03-12 17:20:56 +0000 | [diff] [blame] | 3730 | goto err; |
| 3731 | #endif |
| 3732 | } |
| 3733 | trace_ram_block_discard_range(rb->idstr, host_startaddr, length, |
| 3734 | need_madvise, need_fallocate, ret); |
Dr. David Alan Gilbert | d3a5038 | 2017-02-24 18:28:32 +0000 | [diff] [blame] | 3735 | } else { |
Xiaoyao Li | ea18be7 | 2024-01-24 21:33:28 -0500 | [diff] [blame] | 3736 | error_report("%s: Overrun block '%s' (%" PRIu64 "/%zx/" RAM_ADDR_FMT")", |
| 3737 | __func__, rb->idstr, start, length, rb->max_length); |
Dr. David Alan Gilbert | d3a5038 | 2017-02-24 18:28:32 +0000 | [diff] [blame] | 3738 | } |
| 3739 | |
| 3740 | err: |
| 3741 | return ret; |
| 3742 | } |
| 3743 | |
Xiaoyao Li | b2e9426 | 2024-03-20 03:39:07 -0500 | [diff] [blame] | 3744 | int ram_block_discard_guest_memfd_range(RAMBlock *rb, uint64_t start, |
| 3745 | size_t length) |
| 3746 | { |
| 3747 | int ret = -1; |
| 3748 | |
| 3749 | #ifdef CONFIG_FALLOCATE_PUNCH_HOLE |
| 3750 | ret = fallocate(rb->guest_memfd, FALLOC_FL_PUNCH_HOLE | FALLOC_FL_KEEP_SIZE, |
| 3751 | start, length); |
| 3752 | |
| 3753 | if (ret) { |
| 3754 | ret = -errno; |
| 3755 | error_report("%s: Failed to fallocate %s:%" PRIx64 " +%zx (%d)", |
| 3756 | __func__, rb->idstr, start, length, ret); |
| 3757 | } |
| 3758 | #else |
| 3759 | ret = -ENOSYS; |
| 3760 | error_report("%s: fallocate not available %s:%" PRIx64 " +%zx (%d)", |
| 3761 | __func__, rb->idstr, start, length, ret); |
| 3762 | #endif |
| 3763 | |
| 3764 | return ret; |
| 3765 | } |
| 3766 | |
Junyan He | a4de855 | 2018-07-18 15:48:00 +0800 | [diff] [blame] | 3767 | bool ramblock_is_pmem(RAMBlock *rb) |
| 3768 | { |
| 3769 | return rb->flags & RAM_PMEM; |
| 3770 | } |
| 3771 | |
Markus Armbruster | b6b71cb | 2019-04-17 21:17:56 +0200 | [diff] [blame] | 3772 | static void mtree_print_phys_entries(int start, int end, int skip, int ptr) |
Alexey Kardashevskiy | 5e8fd94 | 2017-09-21 18:51:06 +1000 | [diff] [blame] | 3773 | { |
| 3774 | if (start == end - 1) { |
Markus Armbruster | b6b71cb | 2019-04-17 21:17:56 +0200 | [diff] [blame] | 3775 | qemu_printf("\t%3d ", start); |
Alexey Kardashevskiy | 5e8fd94 | 2017-09-21 18:51:06 +1000 | [diff] [blame] | 3776 | } else { |
Markus Armbruster | b6b71cb | 2019-04-17 21:17:56 +0200 | [diff] [blame] | 3777 | qemu_printf("\t%3d..%-3d ", start, end - 1); |
Alexey Kardashevskiy | 5e8fd94 | 2017-09-21 18:51:06 +1000 | [diff] [blame] | 3778 | } |
Markus Armbruster | b6b71cb | 2019-04-17 21:17:56 +0200 | [diff] [blame] | 3779 | qemu_printf(" skip=%d ", skip); |
Alexey Kardashevskiy | 5e8fd94 | 2017-09-21 18:51:06 +1000 | [diff] [blame] | 3780 | if (ptr == PHYS_MAP_NODE_NIL) { |
Markus Armbruster | b6b71cb | 2019-04-17 21:17:56 +0200 | [diff] [blame] | 3781 | qemu_printf(" ptr=NIL"); |
Alexey Kardashevskiy | 5e8fd94 | 2017-09-21 18:51:06 +1000 | [diff] [blame] | 3782 | } else if (!skip) { |
Markus Armbruster | b6b71cb | 2019-04-17 21:17:56 +0200 | [diff] [blame] | 3783 | qemu_printf(" ptr=#%d", ptr); |
Alexey Kardashevskiy | 5e8fd94 | 2017-09-21 18:51:06 +1000 | [diff] [blame] | 3784 | } else { |
Markus Armbruster | b6b71cb | 2019-04-17 21:17:56 +0200 | [diff] [blame] | 3785 | qemu_printf(" ptr=[%d]", ptr); |
Alexey Kardashevskiy | 5e8fd94 | 2017-09-21 18:51:06 +1000 | [diff] [blame] | 3786 | } |
Markus Armbruster | b6b71cb | 2019-04-17 21:17:56 +0200 | [diff] [blame] | 3787 | qemu_printf("\n"); |
Alexey Kardashevskiy | 5e8fd94 | 2017-09-21 18:51:06 +1000 | [diff] [blame] | 3788 | } |
| 3789 | |
| 3790 | #define MR_SIZE(size) (int128_nz(size) ? (hwaddr)int128_get64( \ |
| 3791 | int128_sub((size), int128_one())) : 0) |
| 3792 | |
Markus Armbruster | b6b71cb | 2019-04-17 21:17:56 +0200 | [diff] [blame] | 3793 | void mtree_print_dispatch(AddressSpaceDispatch *d, MemoryRegion *root) |
Alexey Kardashevskiy | 5e8fd94 | 2017-09-21 18:51:06 +1000 | [diff] [blame] | 3794 | { |
| 3795 | int i; |
| 3796 | |
Markus Armbruster | b6b71cb | 2019-04-17 21:17:56 +0200 | [diff] [blame] | 3797 | qemu_printf(" Dispatch\n"); |
| 3798 | qemu_printf(" Physical sections\n"); |
Alexey Kardashevskiy | 5e8fd94 | 2017-09-21 18:51:06 +1000 | [diff] [blame] | 3799 | |
| 3800 | for (i = 0; i < d->map.sections_nb; ++i) { |
| 3801 | MemoryRegionSection *s = d->map.sections + i; |
| 3802 | const char *names[] = { " [unassigned]", " [not dirty]", |
| 3803 | " [ROM]", " [watch]" }; |
| 3804 | |
Philippe Mathieu-Daudé | 883f2c5 | 2023-01-10 22:29:47 +0100 | [diff] [blame] | 3805 | qemu_printf(" #%d @" HWADDR_FMT_plx ".." HWADDR_FMT_plx |
Markus Armbruster | b6b71cb | 2019-04-17 21:17:56 +0200 | [diff] [blame] | 3806 | " %s%s%s%s%s", |
Alexey Kardashevskiy | 5e8fd94 | 2017-09-21 18:51:06 +1000 | [diff] [blame] | 3807 | i, |
| 3808 | s->offset_within_address_space, |
Zhenzhong Duan | f9c307c | 2022-06-22 17:59:12 +0800 | [diff] [blame] | 3809 | s->offset_within_address_space + MR_SIZE(s->size), |
Alexey Kardashevskiy | 5e8fd94 | 2017-09-21 18:51:06 +1000 | [diff] [blame] | 3810 | s->mr->name ? s->mr->name : "(noname)", |
| 3811 | i < ARRAY_SIZE(names) ? names[i] : "", |
| 3812 | s->mr == root ? " [ROOT]" : "", |
| 3813 | s == d->mru_section ? " [MRU]" : "", |
| 3814 | s->mr->is_iommu ? " [iommu]" : ""); |
| 3815 | |
| 3816 | if (s->mr->alias) { |
Markus Armbruster | b6b71cb | 2019-04-17 21:17:56 +0200 | [diff] [blame] | 3817 | qemu_printf(" alias=%s", s->mr->alias->name ? |
Alexey Kardashevskiy | 5e8fd94 | 2017-09-21 18:51:06 +1000 | [diff] [blame] | 3818 | s->mr->alias->name : "noname"); |
| 3819 | } |
Markus Armbruster | b6b71cb | 2019-04-17 21:17:56 +0200 | [diff] [blame] | 3820 | qemu_printf("\n"); |
Alexey Kardashevskiy | 5e8fd94 | 2017-09-21 18:51:06 +1000 | [diff] [blame] | 3821 | } |
| 3822 | |
Markus Armbruster | b6b71cb | 2019-04-17 21:17:56 +0200 | [diff] [blame] | 3823 | qemu_printf(" Nodes (%d bits per level, %d levels) ptr=[%d] skip=%d\n", |
Alexey Kardashevskiy | 5e8fd94 | 2017-09-21 18:51:06 +1000 | [diff] [blame] | 3824 | P_L2_BITS, P_L2_LEVELS, d->phys_map.ptr, d->phys_map.skip); |
| 3825 | for (i = 0; i < d->map.nodes_nb; ++i) { |
| 3826 | int j, jprev; |
| 3827 | PhysPageEntry prev; |
| 3828 | Node *n = d->map.nodes + i; |
| 3829 | |
Markus Armbruster | b6b71cb | 2019-04-17 21:17:56 +0200 | [diff] [blame] | 3830 | qemu_printf(" [%d]\n", i); |
Alexey Kardashevskiy | 5e8fd94 | 2017-09-21 18:51:06 +1000 | [diff] [blame] | 3831 | |
| 3832 | for (j = 0, jprev = 0, prev = *n[0]; j < ARRAY_SIZE(*n); ++j) { |
| 3833 | PhysPageEntry *pe = *n + j; |
| 3834 | |
| 3835 | if (pe->ptr == prev.ptr && pe->skip == prev.skip) { |
| 3836 | continue; |
| 3837 | } |
| 3838 | |
Markus Armbruster | b6b71cb | 2019-04-17 21:17:56 +0200 | [diff] [blame] | 3839 | mtree_print_phys_entries(jprev, j, prev.skip, prev.ptr); |
Alexey Kardashevskiy | 5e8fd94 | 2017-09-21 18:51:06 +1000 | [diff] [blame] | 3840 | |
| 3841 | jprev = j; |
| 3842 | prev = *pe; |
| 3843 | } |
| 3844 | |
| 3845 | if (jprev != ARRAY_SIZE(*n)) { |
Markus Armbruster | b6b71cb | 2019-04-17 21:17:56 +0200 | [diff] [blame] | 3846 | mtree_print_phys_entries(jprev, j, prev.skip, prev.ptr); |
Alexey Kardashevskiy | 5e8fd94 | 2017-09-21 18:51:06 +1000 | [diff] [blame] | 3847 | } |
| 3848 | } |
| 3849 | } |
| 3850 | |
David Hildenbrand | 7e6d32e | 2021-04-13 11:55:29 +0200 | [diff] [blame] | 3851 | /* Require any discards to work. */ |
David Hildenbrand | 98da491 | 2021-04-13 11:55:28 +0200 | [diff] [blame] | 3852 | static unsigned int ram_block_discard_required_cnt; |
David Hildenbrand | 7e6d32e | 2021-04-13 11:55:29 +0200 | [diff] [blame] | 3853 | /* Require only coordinated discards to work. */ |
| 3854 | static unsigned int ram_block_coordinated_discard_required_cnt; |
| 3855 | /* Disable any discards. */ |
David Hildenbrand | 98da491 | 2021-04-13 11:55:28 +0200 | [diff] [blame] | 3856 | static unsigned int ram_block_discard_disabled_cnt; |
David Hildenbrand | 7e6d32e | 2021-04-13 11:55:29 +0200 | [diff] [blame] | 3857 | /* Disable only uncoordinated discards. */ |
| 3858 | static unsigned int ram_block_uncoordinated_discard_disabled_cnt; |
David Hildenbrand | 98da491 | 2021-04-13 11:55:28 +0200 | [diff] [blame] | 3859 | static QemuMutex ram_block_discard_disable_mutex; |
| 3860 | |
| 3861 | static void ram_block_discard_disable_mutex_lock(void) |
| 3862 | { |
| 3863 | static gsize initialized; |
| 3864 | |
| 3865 | if (g_once_init_enter(&initialized)) { |
| 3866 | qemu_mutex_init(&ram_block_discard_disable_mutex); |
| 3867 | g_once_init_leave(&initialized, 1); |
| 3868 | } |
| 3869 | qemu_mutex_lock(&ram_block_discard_disable_mutex); |
| 3870 | } |
| 3871 | |
| 3872 | static void ram_block_discard_disable_mutex_unlock(void) |
| 3873 | { |
| 3874 | qemu_mutex_unlock(&ram_block_discard_disable_mutex); |
| 3875 | } |
David Hildenbrand | d24f31d | 2020-06-26 09:22:29 +0200 | [diff] [blame] | 3876 | |
| 3877 | int ram_block_discard_disable(bool state) |
| 3878 | { |
David Hildenbrand | 98da491 | 2021-04-13 11:55:28 +0200 | [diff] [blame] | 3879 | int ret = 0; |
David Hildenbrand | d24f31d | 2020-06-26 09:22:29 +0200 | [diff] [blame] | 3880 | |
David Hildenbrand | 98da491 | 2021-04-13 11:55:28 +0200 | [diff] [blame] | 3881 | ram_block_discard_disable_mutex_lock(); |
David Hildenbrand | d24f31d | 2020-06-26 09:22:29 +0200 | [diff] [blame] | 3882 | if (!state) { |
David Hildenbrand | 98da491 | 2021-04-13 11:55:28 +0200 | [diff] [blame] | 3883 | ram_block_discard_disabled_cnt--; |
David Hildenbrand | 7e6d32e | 2021-04-13 11:55:29 +0200 | [diff] [blame] | 3884 | } else if (ram_block_discard_required_cnt || |
| 3885 | ram_block_coordinated_discard_required_cnt) { |
David Hildenbrand | 98da491 | 2021-04-13 11:55:28 +0200 | [diff] [blame] | 3886 | ret = -EBUSY; |
David Hildenbrand | 7e6d32e | 2021-04-13 11:55:29 +0200 | [diff] [blame] | 3887 | } else { |
| 3888 | ram_block_discard_disabled_cnt++; |
| 3889 | } |
| 3890 | ram_block_discard_disable_mutex_unlock(); |
| 3891 | return ret; |
| 3892 | } |
| 3893 | |
| 3894 | int ram_block_uncoordinated_discard_disable(bool state) |
| 3895 | { |
| 3896 | int ret = 0; |
| 3897 | |
| 3898 | ram_block_discard_disable_mutex_lock(); |
| 3899 | if (!state) { |
| 3900 | ram_block_uncoordinated_discard_disabled_cnt--; |
| 3901 | } else if (ram_block_discard_required_cnt) { |
| 3902 | ret = -EBUSY; |
| 3903 | } else { |
| 3904 | ram_block_uncoordinated_discard_disabled_cnt++; |
David Hildenbrand | d24f31d | 2020-06-26 09:22:29 +0200 | [diff] [blame] | 3905 | } |
David Hildenbrand | 98da491 | 2021-04-13 11:55:28 +0200 | [diff] [blame] | 3906 | ram_block_discard_disable_mutex_unlock(); |
| 3907 | return ret; |
David Hildenbrand | d24f31d | 2020-06-26 09:22:29 +0200 | [diff] [blame] | 3908 | } |
| 3909 | |
| 3910 | int ram_block_discard_require(bool state) |
| 3911 | { |
David Hildenbrand | 98da491 | 2021-04-13 11:55:28 +0200 | [diff] [blame] | 3912 | int ret = 0; |
David Hildenbrand | d24f31d | 2020-06-26 09:22:29 +0200 | [diff] [blame] | 3913 | |
David Hildenbrand | 98da491 | 2021-04-13 11:55:28 +0200 | [diff] [blame] | 3914 | ram_block_discard_disable_mutex_lock(); |
David Hildenbrand | d24f31d | 2020-06-26 09:22:29 +0200 | [diff] [blame] | 3915 | if (!state) { |
David Hildenbrand | 98da491 | 2021-04-13 11:55:28 +0200 | [diff] [blame] | 3916 | ram_block_discard_required_cnt--; |
David Hildenbrand | 7e6d32e | 2021-04-13 11:55:29 +0200 | [diff] [blame] | 3917 | } else if (ram_block_discard_disabled_cnt || |
| 3918 | ram_block_uncoordinated_discard_disabled_cnt) { |
David Hildenbrand | 98da491 | 2021-04-13 11:55:28 +0200 | [diff] [blame] | 3919 | ret = -EBUSY; |
David Hildenbrand | 7e6d32e | 2021-04-13 11:55:29 +0200 | [diff] [blame] | 3920 | } else { |
| 3921 | ram_block_discard_required_cnt++; |
| 3922 | } |
| 3923 | ram_block_discard_disable_mutex_unlock(); |
| 3924 | return ret; |
| 3925 | } |
| 3926 | |
| 3927 | int ram_block_coordinated_discard_require(bool state) |
| 3928 | { |
| 3929 | int ret = 0; |
| 3930 | |
| 3931 | ram_block_discard_disable_mutex_lock(); |
| 3932 | if (!state) { |
| 3933 | ram_block_coordinated_discard_required_cnt--; |
| 3934 | } else if (ram_block_discard_disabled_cnt) { |
| 3935 | ret = -EBUSY; |
| 3936 | } else { |
| 3937 | ram_block_coordinated_discard_required_cnt++; |
David Hildenbrand | d24f31d | 2020-06-26 09:22:29 +0200 | [diff] [blame] | 3938 | } |
David Hildenbrand | 98da491 | 2021-04-13 11:55:28 +0200 | [diff] [blame] | 3939 | ram_block_discard_disable_mutex_unlock(); |
| 3940 | return ret; |
David Hildenbrand | d24f31d | 2020-06-26 09:22:29 +0200 | [diff] [blame] | 3941 | } |
| 3942 | |
| 3943 | bool ram_block_discard_is_disabled(void) |
| 3944 | { |
David Hildenbrand | 7e6d32e | 2021-04-13 11:55:29 +0200 | [diff] [blame] | 3945 | return qatomic_read(&ram_block_discard_disabled_cnt) || |
| 3946 | qatomic_read(&ram_block_uncoordinated_discard_disabled_cnt); |
David Hildenbrand | d24f31d | 2020-06-26 09:22:29 +0200 | [diff] [blame] | 3947 | } |
| 3948 | |
| 3949 | bool ram_block_discard_is_required(void) |
| 3950 | { |
David Hildenbrand | 7e6d32e | 2021-04-13 11:55:29 +0200 | [diff] [blame] | 3951 | return qatomic_read(&ram_block_discard_required_cnt) || |
| 3952 | qatomic_read(&ram_block_coordinated_discard_required_cnt); |
David Hildenbrand | d24f31d | 2020-06-26 09:22:29 +0200 | [diff] [blame] | 3953 | } |