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ths5fafdf22007-09-16 21:08:06 +00001/*
pbrook0ff596d2007-05-23 00:03:59 +00002 * QEMU SMBus device emulation.
3 *
4 * Copyright (c) 2007 CodeSourcery.
5 * Written by Paul Brook
6 *
Matthew Fernandez8e31bf32011-06-26 12:21:35 +10007 * This code is licensed under the LGPL.
pbrook0ff596d2007-05-23 00:03:59 +00008 */
9
10/* TODO: Implement PEC. */
11
Peter Maydell04308912016-01-26 18:17:30 +000012#include "qemu/osdep.h"
Paolo Bonzini83c9f4c2013-02-04 15:40:22 +010013#include "hw/hw.h"
Paolo Bonzini0d09e412013-02-05 17:06:20 +010014#include "hw/i2c/i2c.h"
15#include "hw/i2c/smbus.h"
pbrook0ff596d2007-05-23 00:03:59 +000016
17//#define DEBUG_SMBUS 1
18
19#ifdef DEBUG_SMBUS
Blue Swirl001faf32009-05-13 17:53:17 +000020#define DPRINTF(fmt, ...) \
21do { printf("smbus(%02x): " fmt , dev->i2c.address, ## __VA_ARGS__); } while (0)
22#define BADF(fmt, ...) \
23do { fprintf(stderr, "smbus: error: " fmt , ## __VA_ARGS__); exit(1);} while (0)
pbrook0ff596d2007-05-23 00:03:59 +000024#else
Blue Swirl001faf32009-05-13 17:53:17 +000025#define DPRINTF(fmt, ...) do {} while(0)
26#define BADF(fmt, ...) \
27do { fprintf(stderr, "smbus: error: " fmt , ## __VA_ARGS__);} while (0)
pbrook0ff596d2007-05-23 00:03:59 +000028#endif
29
30enum {
31 SMBUS_IDLE,
32 SMBUS_WRITE_DATA,
33 SMBUS_RECV_BYTE,
34 SMBUS_READ_DATA,
35 SMBUS_DONE,
36 SMBUS_CONFUSED = -1
37};
38
39static void smbus_do_quick_cmd(SMBusDevice *dev, int recv)
40{
Anthony Liguorib5ea9322011-12-04 20:39:20 -060041 SMBusDeviceClass *sc = SMBUS_DEVICE_GET_CLASS(dev);
Paul Brook1ea96672009-05-14 22:35:08 +010042
pbrook0ff596d2007-05-23 00:03:59 +000043 DPRINTF("Quick Command %d\n", recv);
Anthony Liguorib5ea9322011-12-04 20:39:20 -060044 if (sc->quick_cmd) {
45 sc->quick_cmd(dev, recv);
46 }
pbrook0ff596d2007-05-23 00:03:59 +000047}
48
49static void smbus_do_write(SMBusDevice *dev)
50{
Anthony Liguorib5ea9322011-12-04 20:39:20 -060051 SMBusDeviceClass *sc = SMBUS_DEVICE_GET_CLASS(dev);
Paul Brook1ea96672009-05-14 22:35:08 +010052
pbrook0ff596d2007-05-23 00:03:59 +000053 if (dev->data_len == 0) {
54 smbus_do_quick_cmd(dev, 0);
55 } else if (dev->data_len == 1) {
56 DPRINTF("Send Byte\n");
Anthony Liguorib5ea9322011-12-04 20:39:20 -060057 if (sc->send_byte) {
58 sc->send_byte(dev, dev->data_buf[0]);
pbrook0ff596d2007-05-23 00:03:59 +000059 }
60 } else {
61 dev->command = dev->data_buf[0];
62 DPRINTF("Command %d len %d\n", dev->command, dev->data_len - 1);
Anthony Liguorib5ea9322011-12-04 20:39:20 -060063 if (sc->write_data) {
64 sc->write_data(dev, dev->command, dev->data_buf + 1,
65 dev->data_len - 1);
pbrook0ff596d2007-05-23 00:03:59 +000066 }
67 }
68}
69
Corey Minyardd307c282017-01-09 11:40:20 +000070static int smbus_i2c_event(I2CSlave *s, enum i2c_event event)
pbrook0ff596d2007-05-23 00:03:59 +000071{
Anthony Liguorib5ea9322011-12-04 20:39:20 -060072 SMBusDevice *dev = SMBUS_DEVICE(s);
Paul Brook1ea96672009-05-14 22:35:08 +010073
pbrook0ff596d2007-05-23 00:03:59 +000074 switch (event) {
75 case I2C_START_SEND:
76 switch (dev->mode) {
77 case SMBUS_IDLE:
78 DPRINTF("Incoming data\n");
79 dev->mode = SMBUS_WRITE_DATA;
80 break;
81 default:
82 BADF("Unexpected send start condition in state %d\n", dev->mode);
83 dev->mode = SMBUS_CONFUSED;
84 break;
85 }
86 break;
87
88 case I2C_START_RECV:
89 switch (dev->mode) {
90 case SMBUS_IDLE:
91 DPRINTF("Read mode\n");
92 dev->mode = SMBUS_RECV_BYTE;
93 break;
94 case SMBUS_WRITE_DATA:
95 if (dev->data_len == 0) {
96 BADF("Read after write with no data\n");
97 dev->mode = SMBUS_CONFUSED;
98 } else {
99 if (dev->data_len > 1) {
100 smbus_do_write(dev);
101 } else {
102 dev->command = dev->data_buf[0];
103 DPRINTF("%02x: Command %d\n", dev->i2c.address,
104 dev->command);
105 }
106 DPRINTF("Read mode\n");
107 dev->data_len = 0;
108 dev->mode = SMBUS_READ_DATA;
109 }
110 break;
111 default:
112 BADF("Unexpected recv start condition in state %d\n", dev->mode);
113 dev->mode = SMBUS_CONFUSED;
114 break;
115 }
116 break;
117
118 case I2C_FINISH:
119 switch (dev->mode) {
120 case SMBUS_WRITE_DATA:
121 smbus_do_write(dev);
122 break;
123 case SMBUS_RECV_BYTE:
124 smbus_do_quick_cmd(dev, 1);
125 break;
126 case SMBUS_READ_DATA:
127 BADF("Unexpected stop during receive\n");
128 break;
129 default:
130 /* Nothing to do. */
131 break;
132 }
133 dev->mode = SMBUS_IDLE;
134 dev->data_len = 0;
135 break;
136
137 case I2C_NACK:
138 switch (dev->mode) {
139 case SMBUS_DONE:
140 /* Nothing to do. */
141 break;
142 case SMBUS_READ_DATA:
143 dev->mode = SMBUS_DONE;
144 break;
145 default:
146 BADF("Unexpected NACK in state %d\n", dev->mode);
147 dev->mode = SMBUS_CONFUSED;
148 break;
149 }
150 }
Corey Minyardd307c282017-01-09 11:40:20 +0000151
152 return 0;
pbrook0ff596d2007-05-23 00:03:59 +0000153}
154
Anthony Liguori9e07bdf2011-12-04 20:28:27 -0600155static int smbus_i2c_recv(I2CSlave *s)
pbrook0ff596d2007-05-23 00:03:59 +0000156{
Anthony Liguorib5ea9322011-12-04 20:39:20 -0600157 SMBusDevice *dev = SMBUS_DEVICE(s);
158 SMBusDeviceClass *sc = SMBUS_DEVICE_GET_CLASS(dev);
pbrook0ff596d2007-05-23 00:03:59 +0000159 int ret;
160
161 switch (dev->mode) {
162 case SMBUS_RECV_BYTE:
Anthony Liguorib5ea9322011-12-04 20:39:20 -0600163 if (sc->receive_byte) {
164 ret = sc->receive_byte(dev);
pbrook0ff596d2007-05-23 00:03:59 +0000165 } else {
166 ret = 0;
167 }
168 DPRINTF("Receive Byte %02x\n", ret);
169 dev->mode = SMBUS_DONE;
170 break;
171 case SMBUS_READ_DATA:
Anthony Liguorib5ea9322011-12-04 20:39:20 -0600172 if (sc->read_data) {
173 ret = sc->read_data(dev, dev->command, dev->data_len);
pbrook0ff596d2007-05-23 00:03:59 +0000174 dev->data_len++;
175 } else {
176 ret = 0;
177 }
178 DPRINTF("Read data %02x\n", ret);
179 break;
180 default:
181 BADF("Unexpected read in state %d\n", dev->mode);
182 dev->mode = SMBUS_CONFUSED;
183 ret = 0;
184 break;
185 }
186 return ret;
187}
188
Anthony Liguori9e07bdf2011-12-04 20:28:27 -0600189static int smbus_i2c_send(I2CSlave *s, uint8_t data)
pbrook0ff596d2007-05-23 00:03:59 +0000190{
Anthony Liguorib5ea9322011-12-04 20:39:20 -0600191 SMBusDevice *dev = SMBUS_DEVICE(s);
Paul Brook1ea96672009-05-14 22:35:08 +0100192
pbrook0ff596d2007-05-23 00:03:59 +0000193 switch (dev->mode) {
194 case SMBUS_WRITE_DATA:
195 DPRINTF("Write data %02x\n", data);
196 dev->data_buf[dev->data_len++] = data;
197 break;
198 default:
199 BADF("Unexpected write in state %d\n", dev->mode);
200 break;
201 }
202 return 0;
203}
204
Anthony Liguori9e07bdf2011-12-04 20:28:27 -0600205static int smbus_device_init(I2CSlave *i2c)
pbrook0ff596d2007-05-23 00:03:59 +0000206{
Anthony Liguorib5ea9322011-12-04 20:39:20 -0600207 SMBusDevice *dev = SMBUS_DEVICE(i2c);
208 SMBusDeviceClass *sc = SMBUS_DEVICE_GET_CLASS(dev);
pbrook0ff596d2007-05-23 00:03:59 +0000209
Anthony Liguorib5ea9322011-12-04 20:39:20 -0600210 return sc->init(dev);
Paul Brook1ea96672009-05-14 22:35:08 +0100211}
balrog3f582262007-05-23 21:47:51 +0000212
pbrook0ff596d2007-05-23 00:03:59 +0000213/* Master device commands. */
Paolo Bonzini046a1842014-03-31 18:26:30 +0200214int smbus_quick_command(I2CBus *bus, uint8_t addr, int read)
pbrook0ff596d2007-05-23 00:03:59 +0000215{
Paolo Bonzini046a1842014-03-31 18:26:30 +0200216 if (i2c_start_transfer(bus, addr, read)) {
217 return -1;
218 }
pbrook0ff596d2007-05-23 00:03:59 +0000219 i2c_end_transfer(bus);
Paolo Bonzini046a1842014-03-31 18:26:30 +0200220 return 0;
pbrook0ff596d2007-05-23 00:03:59 +0000221}
222
Paolo Bonzini285364e2014-03-31 18:26:29 +0200223int smbus_receive_byte(I2CBus *bus, uint8_t addr)
pbrook0ff596d2007-05-23 00:03:59 +0000224{
225 uint8_t data;
226
Paolo Bonzini046a1842014-03-31 18:26:30 +0200227 if (i2c_start_transfer(bus, addr, 1)) {
228 return -1;
229 }
pbrook0ff596d2007-05-23 00:03:59 +0000230 data = i2c_recv(bus);
231 i2c_nack(bus);
232 i2c_end_transfer(bus);
233 return data;
234}
235
Paolo Bonzini046a1842014-03-31 18:26:30 +0200236int smbus_send_byte(I2CBus *bus, uint8_t addr, uint8_t data)
pbrook0ff596d2007-05-23 00:03:59 +0000237{
Paolo Bonzini046a1842014-03-31 18:26:30 +0200238 if (i2c_start_transfer(bus, addr, 0)) {
239 return -1;
240 }
pbrook0ff596d2007-05-23 00:03:59 +0000241 i2c_send(bus, data);
242 i2c_end_transfer(bus);
Paolo Bonzini046a1842014-03-31 18:26:30 +0200243 return 0;
pbrook0ff596d2007-05-23 00:03:59 +0000244}
245
Paolo Bonzini285364e2014-03-31 18:26:29 +0200246int smbus_read_byte(I2CBus *bus, uint8_t addr, uint8_t command)
pbrook0ff596d2007-05-23 00:03:59 +0000247{
248 uint8_t data;
Paolo Bonzini046a1842014-03-31 18:26:30 +0200249 if (i2c_start_transfer(bus, addr, 0)) {
250 return -1;
251 }
pbrook0ff596d2007-05-23 00:03:59 +0000252 i2c_send(bus, command);
Corey Minyardcc083d82016-10-24 10:42:33 -0500253 if (i2c_start_transfer(bus, addr, 1)) {
Corey Minyardd307c282017-01-09 11:40:20 +0000254 i2c_end_transfer(bus);
255 return -1;
Corey Minyardcc083d82016-10-24 10:42:33 -0500256 }
pbrook0ff596d2007-05-23 00:03:59 +0000257 data = i2c_recv(bus);
258 i2c_nack(bus);
259 i2c_end_transfer(bus);
260 return data;
261}
262
Paolo Bonzini046a1842014-03-31 18:26:30 +0200263int smbus_write_byte(I2CBus *bus, uint8_t addr, uint8_t command, uint8_t data)
pbrook0ff596d2007-05-23 00:03:59 +0000264{
Paolo Bonzini046a1842014-03-31 18:26:30 +0200265 if (i2c_start_transfer(bus, addr, 0)) {
266 return -1;
267 }
pbrook0ff596d2007-05-23 00:03:59 +0000268 i2c_send(bus, command);
269 i2c_send(bus, data);
270 i2c_end_transfer(bus);
Paolo Bonzini046a1842014-03-31 18:26:30 +0200271 return 0;
pbrook0ff596d2007-05-23 00:03:59 +0000272}
273
Paolo Bonzini285364e2014-03-31 18:26:29 +0200274int smbus_read_word(I2CBus *bus, uint8_t addr, uint8_t command)
pbrook0ff596d2007-05-23 00:03:59 +0000275{
276 uint16_t data;
Paolo Bonzini046a1842014-03-31 18:26:30 +0200277 if (i2c_start_transfer(bus, addr, 0)) {
278 return -1;
279 }
pbrook0ff596d2007-05-23 00:03:59 +0000280 i2c_send(bus, command);
Corey Minyardcc083d82016-10-24 10:42:33 -0500281 if (i2c_start_transfer(bus, addr, 1)) {
Corey Minyardd307c282017-01-09 11:40:20 +0000282 i2c_end_transfer(bus);
283 return -1;
Corey Minyardcc083d82016-10-24 10:42:33 -0500284 }
pbrook0ff596d2007-05-23 00:03:59 +0000285 data = i2c_recv(bus);
286 data |= i2c_recv(bus) << 8;
287 i2c_nack(bus);
288 i2c_end_transfer(bus);
289 return data;
290}
291
Paolo Bonzini046a1842014-03-31 18:26:30 +0200292int smbus_write_word(I2CBus *bus, uint8_t addr, uint8_t command, uint16_t data)
pbrook0ff596d2007-05-23 00:03:59 +0000293{
Paolo Bonzini046a1842014-03-31 18:26:30 +0200294 if (i2c_start_transfer(bus, addr, 0)) {
295 return -1;
296 }
pbrook0ff596d2007-05-23 00:03:59 +0000297 i2c_send(bus, command);
298 i2c_send(bus, data & 0xff);
299 i2c_send(bus, data >> 8);
300 i2c_end_transfer(bus);
Paolo Bonzini046a1842014-03-31 18:26:30 +0200301 return 0;
pbrook0ff596d2007-05-23 00:03:59 +0000302}
303
Andreas Färbera5c82852013-08-03 00:18:51 +0200304int smbus_read_block(I2CBus *bus, uint8_t addr, uint8_t command, uint8_t *data)
pbrook0ff596d2007-05-23 00:03:59 +0000305{
306 int len;
307 int i;
308
Paolo Bonzini046a1842014-03-31 18:26:30 +0200309 if (i2c_start_transfer(bus, addr, 0)) {
310 return -1;
311 }
pbrook0ff596d2007-05-23 00:03:59 +0000312 i2c_send(bus, command);
Corey Minyardcc083d82016-10-24 10:42:33 -0500313 if (i2c_start_transfer(bus, addr, 1)) {
Corey Minyardd307c282017-01-09 11:40:20 +0000314 i2c_end_transfer(bus);
315 return -1;
Corey Minyardcc083d82016-10-24 10:42:33 -0500316 }
pbrook0ff596d2007-05-23 00:03:59 +0000317 len = i2c_recv(bus);
Paolo Bonzini046a1842014-03-31 18:26:30 +0200318 if (len > 32) {
pbrook0ff596d2007-05-23 00:03:59 +0000319 len = 0;
Paolo Bonzini046a1842014-03-31 18:26:30 +0200320 }
321 for (i = 0; i < len; i++) {
pbrook0ff596d2007-05-23 00:03:59 +0000322 data[i] = i2c_recv(bus);
Paolo Bonzini046a1842014-03-31 18:26:30 +0200323 }
pbrook0ff596d2007-05-23 00:03:59 +0000324 i2c_nack(bus);
325 i2c_end_transfer(bus);
326 return len;
327}
328
Paolo Bonzini046a1842014-03-31 18:26:30 +0200329int smbus_write_block(I2CBus *bus, uint8_t addr, uint8_t command, uint8_t *data,
330 int len)
pbrook0ff596d2007-05-23 00:03:59 +0000331{
332 int i;
333
334 if (len > 32)
335 len = 32;
336
Paolo Bonzini046a1842014-03-31 18:26:30 +0200337 if (i2c_start_transfer(bus, addr, 0)) {
338 return -1;
339 }
pbrook0ff596d2007-05-23 00:03:59 +0000340 i2c_send(bus, command);
341 i2c_send(bus, len);
Paolo Bonzini046a1842014-03-31 18:26:30 +0200342 for (i = 0; i < len; i++) {
pbrook0ff596d2007-05-23 00:03:59 +0000343 i2c_send(bus, data[i]);
Paolo Bonzini046a1842014-03-31 18:26:30 +0200344 }
pbrook0ff596d2007-05-23 00:03:59 +0000345 i2c_end_transfer(bus);
Paolo Bonzini046a1842014-03-31 18:26:30 +0200346 return 0;
pbrook0ff596d2007-05-23 00:03:59 +0000347}
Anthony Liguorib5ea9322011-12-04 20:39:20 -0600348
349static void smbus_device_class_init(ObjectClass *klass, void *data)
350{
351 I2CSlaveClass *sc = I2C_SLAVE_CLASS(klass);
352
353 sc->init = smbus_device_init;
354 sc->event = smbus_i2c_event;
355 sc->recv = smbus_i2c_recv;
356 sc->send = smbus_i2c_send;
357}
358
Andreas Färber8c43a6f2013-01-10 16:19:07 +0100359static const TypeInfo smbus_device_type_info = {
Anthony Liguorib5ea9322011-12-04 20:39:20 -0600360 .name = TYPE_SMBUS_DEVICE,
361 .parent = TYPE_I2C_SLAVE,
362 .instance_size = sizeof(SMBusDevice),
363 .abstract = true,
364 .class_size = sizeof(SMBusDeviceClass),
365 .class_init = smbus_device_class_init,
366};
367
Andreas Färber83f7d432012-02-09 15:20:55 +0100368static void smbus_device_register_types(void)
Anthony Liguorib5ea9322011-12-04 20:39:20 -0600369{
370 type_register_static(&smbus_device_type_info);
371}
372
Andreas Färber83f7d432012-02-09 15:20:55 +0100373type_init(smbus_device_register_types)