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Jia Liub6a71ef2012-07-20 15:50:41 +08001/*
2 * OpenRISC interrupt helper routines
3 *
4 * Copyright (c) 2011-2012 Jia Liu <proljc@gmail.com>
5 * Feng Gao <gf91597@gmail.com>
6 *
7 * This library is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU Lesser General Public
9 * License as published by the Free Software Foundation; either
10 * version 2 of the License, or (at your option) any later version.
11 *
12 * This library is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * Lesser General Public License for more details.
16 *
17 * You should have received a copy of the GNU Lesser General Public
18 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
19 */
20
Peter Maydelled2decc2016-01-26 18:17:22 +000021#include "qemu/osdep.h"
Jia Liub6a71ef2012-07-20 15:50:41 +080022#include "cpu.h"
Paolo Bonzini63c91552016-03-15 13:18:37 +010023#include "exec/exec-all.h"
Richard Henderson2ef61752014-04-07 22:31:41 -070024#include "exec/helper-proto.h"
Jia Liub6a71ef2012-07-20 15:50:41 +080025
26void HELPER(rfe)(CPUOpenRISCState *env)
27{
Andreas Färberdd51dc52013-01-17 17:30:08 +010028 OpenRISCCPU *cpu = openrisc_env_get_cpu(env);
Andreas Färber259186a2013-01-17 18:51:17 +010029 CPUState *cs = CPU(cpu);
Jia Liub6a71ef2012-07-20 15:50:41 +080030#ifndef CONFIG_USER_ONLY
31 int need_flush_tlb = (cpu->env.sr & (SR_SM | SR_IME | SR_DME)) ^
32 (cpu->env.esr & (SR_SM | SR_IME | SR_DME));
33#endif
34 cpu->env.pc = cpu->env.epcr;
35 cpu->env.npc = cpu->env.epcr;
36 cpu->env.sr = cpu->env.esr;
37
38#ifndef CONFIG_USER_ONLY
39 if (cpu->env.sr & SR_DME) {
40 cpu->env.tlb->cpu_openrisc_map_address_data =
41 &cpu_openrisc_get_phys_data;
42 } else {
43 cpu->env.tlb->cpu_openrisc_map_address_data =
44 &cpu_openrisc_get_phys_nommu;
45 }
46
47 if (cpu->env.sr & SR_IME) {
48 cpu->env.tlb->cpu_openrisc_map_address_code =
49 &cpu_openrisc_get_phys_code;
50 } else {
51 cpu->env.tlb->cpu_openrisc_map_address_code =
52 &cpu_openrisc_get_phys_nommu;
53 }
54
55 if (need_flush_tlb) {
Andreas Färber00c8cb02013-09-04 02:19:44 +020056 tlb_flush(cs, 1);
Jia Liub6a71ef2012-07-20 15:50:41 +080057 }
58#endif
Andreas Färber259186a2013-01-17 18:51:17 +010059 cs->interrupt_request |= CPU_INTERRUPT_EXITTB;
Jia Liub6a71ef2012-07-20 15:50:41 +080060}