blob: 6519e260ed522a964ddee59f2c554cbe26953397 [file] [log] [blame]
ths5fafdf22007-09-16 21:08:06 +00001/*
pbrook69db0ac2006-07-17 18:45:34 +00002 * Arm PrimeCell PL050 Keyboard / Mouse Interface
pbrookcdbdb642006-04-09 01:32:52 +00003 *
pbrook9e61ec32007-04-30 02:39:55 +00004 * Copyright (c) 2006-2007 CodeSourcery.
pbrookcdbdb642006-04-09 01:32:52 +00005 * Written by Paul Brook
6 *
Matthew Fernandez8e31bf32011-06-26 12:21:35 +10007 * This code is licensed under the GPL.
pbrookcdbdb642006-04-09 01:32:52 +00008 */
9
Mark Cave-Ayland1d9d4b02022-06-24 14:40:52 +010010/*
11 * QEMU interface:
12 * + sysbus MMIO region 0: MemoryRegion defining the PL050 registers
13 * + Named GPIO input "ps2-input-irq": set to 1 if the downstream PS2 device
14 * has asserted its irq
15 * + sysbus IRQ 0: PL050 output irq
16 */
17
Peter Maydell8ef94f02016-01-26 18:17:05 +000018#include "qemu/osdep.h"
Paolo Bonzini83c9f4c2013-02-04 15:40:22 +010019#include "hw/sysbus.h"
Markus Armbrusterd6454272019-08-12 07:23:45 +020020#include "migration/vmstate.h"
Paolo Bonzini0d09e412013-02-05 17:06:20 +010021#include "hw/input/ps2.h"
Mark Cave-Aylandbce0e9c2022-07-12 22:52:12 +010022#include "hw/input/pl050.h"
Markus Armbruster64552b62019-08-12 07:23:42 +020023#include "hw/irq.h"
Paolo Bonzini03dd0242015-12-15 13:16:16 +010024#include "qemu/log.h"
Markus Armbruster0b8fa322019-05-23 16:35:07 +020025#include "qemu/module.h"
Eduardo Habkostdb1015e2020-09-03 16:43:22 -040026#include "qom/object.h"
pbrookcdbdb642006-04-09 01:32:52 +000027
pbrookcdbdb642006-04-09 01:32:52 +000028
Peter Maydelld6ac1722010-12-23 17:19:54 +000029static const VMStateDescription vmstate_pl050 = {
30 .name = "pl050",
Peter Maydelle8945b42013-04-05 16:17:58 +010031 .version_id = 2,
32 .minimum_version_id = 2,
Richard Hendersonaf0f07d2023-12-21 14:16:14 +110033 .fields = (const VMStateField[]) {
Andreas Färbere607f252013-07-26 18:40:25 +020034 VMSTATE_UINT32(cr, PL050State),
35 VMSTATE_UINT32(clk, PL050State),
36 VMSTATE_UINT32(last, PL050State),
37 VMSTATE_INT32(pending, PL050State),
Peter Maydelld6ac1722010-12-23 17:19:54 +000038 VMSTATE_END_OF_LIST()
39 }
40};
41
pbrook9e61ec32007-04-30 02:39:55 +000042#define PL050_TXEMPTY (1 << 6)
43#define PL050_TXBUSY (1 << 5)
44#define PL050_RXFULL (1 << 4)
45#define PL050_RXBUSY (1 << 3)
46#define PL050_RXPARITY (1 << 2)
47#define PL050_KMIC (1 << 1)
48#define PL050_KMID (1 << 0)
49
Mark Cave-Ayland600f7112022-06-24 14:40:29 +010050static const unsigned char pl050_id[] = {
51 0x50, 0x10, 0x04, 0x00, 0x0d, 0xf0, 0x05, 0xb1
52};
pbrookcdbdb642006-04-09 01:32:52 +000053
Mark Cave-Aylandeca9e872022-06-24 14:40:30 +010054static void pl050_update_irq(PL050State *s)
55{
56 int level = (s->pending && (s->cr & 0x10) != 0)
57 || (s->cr & 0x08) != 0;
58
59 qemu_set_irq(s->irq, level);
60}
61
Mark Cave-Ayland423bcb22022-06-24 14:40:51 +010062static void pl050_set_irq(void *opaque, int n, int level)
pbrookcdbdb642006-04-09 01:32:52 +000063{
Andreas Färbere607f252013-07-26 18:40:25 +020064 PL050State *s = (PL050State *)opaque;
pbrookcdbdb642006-04-09 01:32:52 +000065
66 s->pending = level;
Mark Cave-Aylandeca9e872022-06-24 14:40:30 +010067 pl050_update_irq(s);
pbrookcdbdb642006-04-09 01:32:52 +000068}
69
Avi Kivitya8170e52012-10-23 12:30:10 +020070static uint64_t pl050_read(void *opaque, hwaddr offset,
Avi Kivityb8f7a732011-10-10 17:18:44 +020071 unsigned size)
pbrookcdbdb642006-04-09 01:32:52 +000072{
Andreas Färbere607f252013-07-26 18:40:25 +020073 PL050State *s = (PL050State *)opaque;
Mark Cave-Ayland600f7112022-06-24 14:40:29 +010074
75 if (offset >= 0xfe0 && offset < 0x1000) {
pbrookcdbdb642006-04-09 01:32:52 +000076 return pl050_id[(offset - 0xfe0) >> 2];
Mark Cave-Ayland600f7112022-06-24 14:40:29 +010077 }
pbrookcdbdb642006-04-09 01:32:52 +000078
79 switch (offset >> 2) {
80 case 0: /* KMICR */
81 return s->cr;
82 case 1: /* KMISTAT */
pbrook9e61ec32007-04-30 02:39:55 +000083 {
84 uint8_t val;
85 uint32_t stat;
86
87 val = s->last;
88 val = val ^ (val >> 4);
89 val = val ^ (val >> 2);
90 val = (val ^ (val >> 1)) & 1;
91
92 stat = PL050_TXEMPTY;
Mark Cave-Ayland600f7112022-06-24 14:40:29 +010093 if (val) {
pbrook9e61ec32007-04-30 02:39:55 +000094 stat |= PL050_RXPARITY;
Mark Cave-Ayland600f7112022-06-24 14:40:29 +010095 }
96 if (s->pending) {
pbrook9e61ec32007-04-30 02:39:55 +000097 stat |= PL050_RXFULL;
Mark Cave-Ayland600f7112022-06-24 14:40:29 +010098 }
pbrook9e61ec32007-04-30 02:39:55 +000099
100 return stat;
pbrookcdbdb642006-04-09 01:32:52 +0000101 }
102 case 2: /* KMIDATA */
Mark Cave-Ayland600f7112022-06-24 14:40:29 +0100103 if (s->pending) {
Mark Cave-Ayland33e09582022-07-12 22:52:14 +0100104 s->last = ps2_read_data(s->ps2dev);
Mark Cave-Ayland600f7112022-06-24 14:40:29 +0100105 }
pbrookcdbdb642006-04-09 01:32:52 +0000106 return s->last;
107 case 3: /* KMICLKDIV */
108 return s->clk;
109 case 4: /* KMIIR */
110 return s->pending | 2;
111 default:
Peter Maydellfbfecf42012-10-30 07:45:08 +0000112 qemu_log_mask(LOG_GUEST_ERROR,
113 "pl050_read: Bad offset %x\n", (int)offset);
pbrookcdbdb642006-04-09 01:32:52 +0000114 return 0;
115 }
116}
117
Avi Kivitya8170e52012-10-23 12:30:10 +0200118static void pl050_write(void *opaque, hwaddr offset,
Avi Kivityb8f7a732011-10-10 17:18:44 +0200119 uint64_t value, unsigned size)
pbrookcdbdb642006-04-09 01:32:52 +0000120{
Andreas Färbere607f252013-07-26 18:40:25 +0200121 PL050State *s = (PL050State *)opaque;
Mark Cave-Ayland600f7112022-06-24 14:40:29 +0100122
pbrookcdbdb642006-04-09 01:32:52 +0000123 switch (offset >> 2) {
124 case 0: /* KMICR */
125 s->cr = value;
Mark Cave-Aylandeca9e872022-06-24 14:40:30 +0100126 pl050_update_irq(s);
pbrookcdbdb642006-04-09 01:32:52 +0000127 /* ??? Need to implement the enable/disable bit. */
128 break;
129 case 2: /* KMIDATA */
130 /* ??? This should toggle the TX interrupt line. */
131 /* ??? This means kbd/mouse can block each other. */
132 if (s->is_mouse) {
Mark Cave-Ayland33e09582022-07-12 22:52:14 +0100133 ps2_write_mouse(PS2_MOUSE_DEVICE(s->ps2dev), value);
pbrookcdbdb642006-04-09 01:32:52 +0000134 } else {
Mark Cave-Ayland33e09582022-07-12 22:52:14 +0100135 ps2_write_keyboard(PS2_KBD_DEVICE(s->ps2dev), value);
pbrookcdbdb642006-04-09 01:32:52 +0000136 }
137 break;
138 case 3: /* KMICLKDIV */
139 s->clk = value;
140 return;
141 default:
Peter Maydellfbfecf42012-10-30 07:45:08 +0000142 qemu_log_mask(LOG_GUEST_ERROR,
143 "pl050_write: Bad offset %x\n", (int)offset);
pbrookcdbdb642006-04-09 01:32:52 +0000144 }
145}
Avi Kivityb8f7a732011-10-10 17:18:44 +0200146static const MemoryRegionOps pl050_ops = {
147 .read = pl050_read,
148 .write = pl050_write,
149 .endianness = DEVICE_NATIVE_ENDIAN,
pbrookcdbdb642006-04-09 01:32:52 +0000150};
151
Mao Zhongyi988e5012018-12-13 13:47:59 +0000152static void pl050_realize(DeviceState *dev, Error **errp)
pbrookcdbdb642006-04-09 01:32:52 +0000153{
Andreas Färber3e5dd362013-07-26 18:49:24 +0200154 PL050State *s = PL050(dev);
pbrookcdbdb642006-04-09 01:32:52 +0000155
Mark Cave-Ayland33e09582022-07-12 22:52:14 +0100156 qdev_connect_gpio_out(DEVICE(s->ps2dev), PS2_DEVICE_IRQ,
Mark Cave-Ayland423bcb22022-06-24 14:40:51 +0100157 qdev_get_gpio_in_named(dev, "ps2-input-irq", 0));
pbrookcdbdb642006-04-09 01:32:52 +0000158}
Paul Brook86394e92009-05-14 22:35:07 +0100159
Mark Cave-Ayland87efd282022-07-12 22:52:19 +0100160static void pl050_kbd_realize(DeviceState *dev, Error **errp)
161{
162 PL050DeviceClass *pdc = PL050_GET_CLASS(dev);
Mark Cave-Ayland6a05d0b2022-07-12 22:52:21 +0100163 PL050KbdState *s = PL050_KBD_DEVICE(dev);
Mark Cave-Ayland87efd282022-07-12 22:52:19 +0100164 PL050State *ps = PL050(dev);
165
Mark Cave-Ayland6a05d0b2022-07-12 22:52:21 +0100166 if (!sysbus_realize(SYS_BUS_DEVICE(&s->kbd), errp)) {
167 return;
168 }
169
170 ps->ps2dev = PS2_DEVICE(&s->kbd);
Mark Cave-Ayland87efd282022-07-12 22:52:19 +0100171 pdc->parent_realize(dev, errp);
172}
173
Mark Cave-Aylandb6c575d2022-07-12 22:52:13 +0100174static void pl050_kbd_init(Object *obj)
Paul Brook86394e92009-05-14 22:35:07 +0100175{
Mark Cave-Ayland6a05d0b2022-07-12 22:52:21 +0100176 PL050KbdState *s = PL050_KBD_DEVICE(obj);
177 PL050State *ps = PL050(obj);
Andreas Färber3e5dd362013-07-26 18:49:24 +0200178
Mark Cave-Ayland6a05d0b2022-07-12 22:52:21 +0100179 ps->is_mouse = false;
180 object_initialize_child(obj, "kbd", &s->kbd, TYPE_PS2_KBD_DEVICE);
Paul Brook86394e92009-05-14 22:35:07 +0100181}
182
Mark Cave-Ayland5b0138b2022-07-12 22:52:20 +0100183static void pl050_mouse_realize(DeviceState *dev, Error **errp)
184{
185 PL050DeviceClass *pdc = PL050_GET_CLASS(dev);
Mark Cave-Ayland6f9f2452022-07-12 22:52:22 +0100186 PL050MouseState *s = PL050_MOUSE_DEVICE(dev);
Mark Cave-Ayland5b0138b2022-07-12 22:52:20 +0100187 PL050State *ps = PL050(dev);
188
Mark Cave-Ayland6f9f2452022-07-12 22:52:22 +0100189 if (!sysbus_realize(SYS_BUS_DEVICE(&s->mouse), errp)) {
190 return;
191 }
192
193 ps->ps2dev = PS2_DEVICE(&s->mouse);
Mark Cave-Ayland5b0138b2022-07-12 22:52:20 +0100194 pdc->parent_realize(dev, errp);
195}
196
Andreas Färber3e5dd362013-07-26 18:49:24 +0200197static void pl050_mouse_init(Object *obj)
Paul Brook86394e92009-05-14 22:35:07 +0100198{
Mark Cave-Ayland6f9f2452022-07-12 22:52:22 +0100199 PL050MouseState *s = PL050_MOUSE_DEVICE(obj);
200 PL050State *ps = PL050(obj);
Paul Brook86394e92009-05-14 22:35:07 +0100201
Mark Cave-Ayland6f9f2452022-07-12 22:52:22 +0100202 ps->is_mouse = true;
203 object_initialize_child(obj, "mouse", &s->mouse, TYPE_PS2_MOUSE_DEVICE);
Anthony Liguori999e12b2012-01-24 13:12:29 -0600204}
205
Mark Cave-Ayland87efd282022-07-12 22:52:19 +0100206static void pl050_kbd_class_init(ObjectClass *oc, void *data)
207{
208 DeviceClass *dc = DEVICE_CLASS(oc);
209 PL050DeviceClass *pdc = PL050_CLASS(oc);
210
211 device_class_set_parent_realize(dc, pl050_kbd_realize,
212 &pdc->parent_realize);
213}
214
Andreas Färber8c43a6f2013-01-10 16:19:07 +0100215static const TypeInfo pl050_kbd_info = {
Mark Cave-Ayland1d593152022-07-12 22:52:15 +0100216 .name = TYPE_PL050_KBD_DEVICE,
Andreas Färber3e5dd362013-07-26 18:49:24 +0200217 .parent = TYPE_PL050,
Mark Cave-Aylandb6c575d2022-07-12 22:52:13 +0100218 .instance_init = pl050_kbd_init,
Mark Cave-Ayland1d593152022-07-12 22:52:15 +0100219 .instance_size = sizeof(PL050KbdState),
Mark Cave-Ayland87efd282022-07-12 22:52:19 +0100220 .class_init = pl050_kbd_class_init,
Peter Maydelld6ac1722010-12-23 17:19:54 +0000221};
222
Mark Cave-Ayland5b0138b2022-07-12 22:52:20 +0100223static void pl050_mouse_class_init(ObjectClass *oc, void *data)
224{
225 DeviceClass *dc = DEVICE_CLASS(oc);
226 PL050DeviceClass *pdc = PL050_CLASS(oc);
227
228 device_class_set_parent_realize(dc, pl050_mouse_realize,
229 &pdc->parent_realize);
230}
231
Andreas Färber8c43a6f2013-01-10 16:19:07 +0100232static const TypeInfo pl050_mouse_info = {
Mark Cave-Ayland0a3c1e12022-07-12 22:52:16 +0100233 .name = TYPE_PL050_MOUSE_DEVICE,
Andreas Färber3e5dd362013-07-26 18:49:24 +0200234 .parent = TYPE_PL050,
235 .instance_init = pl050_mouse_init,
Mark Cave-Ayland0a3c1e12022-07-12 22:52:16 +0100236 .instance_size = sizeof(PL050MouseState),
Mark Cave-Ayland5b0138b2022-07-12 22:52:20 +0100237 .class_init = pl050_mouse_class_init,
Andreas Färber3e5dd362013-07-26 18:49:24 +0200238};
239
Mark Cave-Ayland423bcb22022-06-24 14:40:51 +0100240static void pl050_init(Object *obj)
241{
Mark Cave-Ayland3d5e0992022-07-12 22:52:17 +0100242 PL050State *s = PL050(obj);
243 SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
244
245 memory_region_init_io(&s->iomem, obj, &pl050_ops, s, "pl050", 0x1000);
246 sysbus_init_mmio(sbd, &s->iomem);
247 sysbus_init_irq(sbd, &s->irq);
248
Mark Cave-Ayland423bcb22022-06-24 14:40:51 +0100249 qdev_init_gpio_in_named(DEVICE(obj), pl050_set_irq, "ps2-input-irq", 1);
250}
251
Andreas Färber3e5dd362013-07-26 18:49:24 +0200252static void pl050_class_init(ObjectClass *oc, void *data)
253{
254 DeviceClass *dc = DEVICE_CLASS(oc);
Andreas Färber3e5dd362013-07-26 18:49:24 +0200255
Mao Zhongyi988e5012018-12-13 13:47:59 +0000256 dc->realize = pl050_realize;
Andreas Färber3e5dd362013-07-26 18:49:24 +0200257 dc->vmsd = &vmstate_pl050;
258}
259
260static const TypeInfo pl050_type_info = {
261 .name = TYPE_PL050,
Anthony Liguori39bffca2011-12-07 21:34:16 -0600262 .parent = TYPE_SYS_BUS_DEVICE,
Mark Cave-Ayland423bcb22022-06-24 14:40:51 +0100263 .instance_init = pl050_init,
Andreas Färbere607f252013-07-26 18:40:25 +0200264 .instance_size = sizeof(PL050State),
Mark Cave-Ayland475a4d42022-07-12 22:52:18 +0100265 .class_init = pl050_class_init,
266 .class_size = sizeof(PL050DeviceClass),
Andreas Färber3e5dd362013-07-26 18:49:24 +0200267 .abstract = true,
268 .class_init = pl050_class_init,
Peter Maydelld6ac1722010-12-23 17:19:54 +0000269};
270
Andreas Färber83f7d432012-02-09 15:20:55 +0100271static void pl050_register_types(void)
Paul Brook86394e92009-05-14 22:35:07 +0100272{
Andreas Färber3e5dd362013-07-26 18:49:24 +0200273 type_register_static(&pl050_type_info);
Anthony Liguori39bffca2011-12-07 21:34:16 -0600274 type_register_static(&pl050_kbd_info);
275 type_register_static(&pl050_mouse_info);
Paul Brook86394e92009-05-14 22:35:07 +0100276}
277
Andreas Färber83f7d432012-02-09 15:20:55 +0100278type_init(pl050_register_types)