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Paolo Bonzini78e87792016-10-06 16:12:11 +02001@node Implementation notes
2@appendix Implementation notes
bellarddebc7062006-04-30 21:58:41 +00003
4@menu
Paolo Bonzini77d47e12016-10-06 16:49:03 +02005* CPU emulation::
6* Translator Internals::
Paolo Bonzini77d47e12016-10-06 16:49:03 +02007* QEMU compared to other emulators::
8* Bibliography::
bellarddebc7062006-04-30 21:58:41 +00009@end menu
bellarddebc7062006-04-30 21:58:41 +000010
Paolo Bonzini77d47e12016-10-06 16:49:03 +020011@node CPU emulation
Paolo Bonzini78e87792016-10-06 16:12:11 +020012@section CPU emulation
bellard1f673132004-04-04 15:21:17 +000013
bellarddebc7062006-04-30 21:58:41 +000014@menu
Paolo Bonzini77d47e12016-10-06 16:49:03 +020015* x86:: x86 and x86-64 emulation
16* ARM:: ARM emulation
17* MIPS:: MIPS emulation
18* PPC:: PowerPC emulation
19* SPARC:: Sparc32 and Sparc64 emulation
20* Xtensa:: Xtensa emulation
bellarddebc7062006-04-30 21:58:41 +000021@end menu
22
Paolo Bonzini77d47e12016-10-06 16:49:03 +020023@node x86
Paolo Bonzini78e87792016-10-06 16:12:11 +020024@subsection x86 and x86-64 emulation
bellard1f673132004-04-04 15:21:17 +000025
26QEMU x86 target features:
27
ths5fafdf22007-09-16 21:08:06 +000028@itemize
bellard1f673132004-04-04 15:21:17 +000029
ths5fafdf22007-09-16 21:08:06 +000030@item The virtual x86 CPU supports 16 bit and 32 bit addressing with segmentation.
blueswir1998a0502008-10-09 18:52:04 +000031LDT/GDT and IDT are emulated. VM86 mode is also supported to run
32DOSEMU. There is some support for MMX/3DNow!, SSE, SSE2, SSE3, SSSE3,
33and SSE4 as well as x86-64 SVM.
bellard1f673132004-04-04 15:21:17 +000034
35@item Support of host page sizes bigger than 4KB in user mode emulation.
36
37@item QEMU can emulate itself on x86.
38
ths5fafdf22007-09-16 21:08:06 +000039@item An extensive Linux x86 CPU test program is included @file{tests/test-i386}.
bellard1f673132004-04-04 15:21:17 +000040It can be used to test other x86 virtual CPUs.
41
42@end itemize
43
44Current QEMU limitations:
45
ths5fafdf22007-09-16 21:08:06 +000046@itemize
bellard1f673132004-04-04 15:21:17 +000047
blueswir1998a0502008-10-09 18:52:04 +000048@item Limited x86-64 support.
bellard1f673132004-04-04 15:21:17 +000049
50@item IPC syscalls are missing.
51
ths5fafdf22007-09-16 21:08:06 +000052@item The x86 segment limits and access rights are not tested at every
bellard1f673132004-04-04 15:21:17 +000053memory access (yet). Hopefully, very few OSes seem to rely on that for
54normal use.
55
bellard1f673132004-04-04 15:21:17 +000056@end itemize
57
Paolo Bonzini77d47e12016-10-06 16:49:03 +020058@node ARM
Paolo Bonzini78e87792016-10-06 16:12:11 +020059@subsection ARM emulation
bellard1f673132004-04-04 15:21:17 +000060
61@itemize
62
63@item Full ARM 7 user emulation.
64
65@item NWFPE FPU support included in user Linux emulation.
66
67@item Can run most ARM Linux binaries.
68
69@end itemize
70
Paolo Bonzini77d47e12016-10-06 16:49:03 +020071@node MIPS
Paolo Bonzini78e87792016-10-06 16:12:11 +020072@subsection MIPS emulation
ths24d4de42007-07-11 10:24:28 +000073
74@itemize
75
76@item The system emulation allows full MIPS32/MIPS64 Release 2 emulation,
77including privileged instructions, FPU and MMU, in both little and big
78endian modes.
79
80@item The Linux userland emulation can run many 32 bit MIPS Linux binaries.
81
82@end itemize
83
84Current QEMU limitations:
85
86@itemize
87
88@item Self-modifying code is not always handled correctly.
89
90@item 64 bit userland emulation is not implemented.
91
92@item The system emulation is not complete enough to run real firmware.
93
thsb1f45232007-07-12 09:03:30 +000094@item The watchpoint debug facility is not implemented.
95
ths24d4de42007-07-11 10:24:28 +000096@end itemize
97
Paolo Bonzini77d47e12016-10-06 16:49:03 +020098@node PPC
Paolo Bonzini78e87792016-10-06 16:12:11 +020099@subsection PowerPC emulation
bellard1f673132004-04-04 15:21:17 +0000100
101@itemize
102
ths5fafdf22007-09-16 21:08:06 +0000103@item Full PowerPC 32 bit emulation, including privileged instructions,
bellard1f673132004-04-04 15:21:17 +0000104FPU and MMU.
105
106@item Can run most PowerPC Linux binaries.
107
108@end itemize
109
Paolo Bonzini77d47e12016-10-06 16:49:03 +0200110@node SPARC
Paolo Bonzini78e87792016-10-06 16:12:11 +0200111@subsection Sparc32 and Sparc64 emulation
bellard1f673132004-04-04 15:21:17 +0000112
113@itemize
114
blueswir1f6b647c2007-04-05 18:40:23 +0000115@item Full SPARC V8 emulation, including privileged
bellard34751872005-07-02 14:31:34 +0000116instructions, FPU and MMU. SPARC V9 emulation includes most privileged
blueswir1a785e422007-10-20 08:09:05 +0000117and VIS instructions, FPU and I/D MMU. Alignment is fully enforced.
bellard1f673132004-04-04 15:21:17 +0000118
blueswir1a785e422007-10-20 08:09:05 +0000119@item Can run most 32-bit SPARC Linux binaries, SPARC32PLUS Linux binaries and
120some 64-bit SPARC Linux binaries.
bellard34751872005-07-02 14:31:34 +0000121
122@end itemize
123
124Current QEMU limitations:
125
ths5fafdf22007-09-16 21:08:06 +0000126@itemize
bellard34751872005-07-02 14:31:34 +0000127
bellard34751872005-07-02 14:31:34 +0000128@item IPC syscalls are missing.
129
blueswir11f587322007-11-25 18:40:20 +0000130@item Floating point exception support is buggy.
bellard34751872005-07-02 14:31:34 +0000131
132@item Atomic instructions are not correctly implemented.
133
blueswir1998a0502008-10-09 18:52:04 +0000134@item There are still some problems with Sparc64 emulators.
bellard1f673132004-04-04 15:21:17 +0000135
136@end itemize
137
Paolo Bonzini77d47e12016-10-06 16:49:03 +0200138@node Xtensa
Paolo Bonzini78e87792016-10-06 16:12:11 +0200139@subsection Xtensa emulation
Max Filippov3aeaea62011-10-10 14:48:23 +0400140
141@itemize
142
143@item Core Xtensa ISA emulation, including most options: code density,
144loop, extended L32R, 16- and 32-bit multiplication, 32-bit division,
Max Filippov044d0032012-11-29 19:53:20 +0400145MAC16, miscellaneous operations, boolean, FP coprocessor, coprocessor
146context, debug, multiprocessor synchronization,
Max Filippov3aeaea62011-10-10 14:48:23 +0400147conditional store, exceptions, relocatable vectors, unaligned exception,
148interrupts (including high priority and timer), hardware alignment,
149region protection, region translation, MMU, windowed registers, thread
150pointer, processor ID.
151
Max Filippov044d0032012-11-29 19:53:20 +0400152@item Not implemented options: data/instruction cache (including cache
153prefetch and locking), XLMI, processor interface. Also options not
154covered by the core ISA (e.g. FLIX, wide branches) are not implemented.
Max Filippov3aeaea62011-10-10 14:48:23 +0400155
156@item Can run most Xtensa Linux binaries.
157
158@item New core configuration that requires no additional instructions
159may be created from overlay with minimal amount of hand-written code.
160
161@end itemize
162
Paolo Bonzini77d47e12016-10-06 16:49:03 +0200163@node Translator Internals
Paolo Bonzini78e87792016-10-06 16:12:11 +0200164@section Translator Internals
bellard1f673132004-04-04 15:21:17 +0000165
bellard1f673132004-04-04 15:21:17 +0000166QEMU is a dynamic translator. When it first encounters a piece of code,
167it converts it to the host instruction set. Usually dynamic translators
168are very complicated and highly CPU dependent. QEMU uses some tricks
169which make it relatively easily portable and simple while achieving good
170performances.
171
Paolo Bonzinibf28a692016-10-06 15:10:10 +0200172QEMU's dynamic translation backend is called TCG, for "Tiny Code
173Generator". For more information, please take a look at @code{tcg/README}.
bellard1f673132004-04-04 15:21:17 +0000174
Paolo Bonzini36e49702016-10-06 16:25:12 +0200175Some notable features of QEMU's dynamic translator are:
bellard1f673132004-04-04 15:21:17 +0000176
Paolo Bonzini36e49702016-10-06 16:25:12 +0200177@table @strong
178
179@item CPU state optimisations:
blueswir1998a0502008-10-09 18:52:04 +0000180The target CPUs have many internal states which change the way it
181evaluates instructions. In order to achieve a good speed, the
182translation phase considers that some state information of the virtual
183CPU cannot change in it. The state is recorded in the Translation
184Block (TB). If the state changes (e.g. privilege level), a new TB will
185be generated and the previous TB won't be used anymore until the state
Paolo Bonzini36e49702016-10-06 16:25:12 +0200186matches the state recorded in the previous TB. The same idea can be applied
187to other aspects of the CPU state. For example, on x86, if the SS,
blueswir1998a0502008-10-09 18:52:04 +0000188DS and ES segments have a zero base, then the translator does not even
189generate an addition for the segment base.
bellard1f673132004-04-04 15:21:17 +0000190
Paolo Bonzini36e49702016-10-06 16:25:12 +0200191@item Direct block chaining:
bellard1f673132004-04-04 15:21:17 +0000192After each translated basic block is executed, QEMU uses the simulated
Gongleid274e072015-07-03 17:50:57 +0800193Program Counter (PC) and other cpu state information (such as the CS
bellard1f673132004-04-04 15:21:17 +0000194segment base value) to find the next basic block.
195
196In order to accelerate the most common cases where the new simulated PC
197is known, QEMU can patch a basic block so that it jumps directly to the
198next one.
199
200The most portable code uses an indirect jump. An indirect jump makes
201it easier to make the jump target modification atomic. On some host
202architectures (such as x86 or PowerPC), the @code{JUMP} opcode is
203directly patched so that the block chaining has no overhead.
204
Paolo Bonzini36e49702016-10-06 16:25:12 +0200205@item Self-modifying code and translated code invalidation:
bellard1f673132004-04-04 15:21:17 +0000206Self-modifying code is a special challenge in x86 emulation because no
207instruction cache invalidation is signaled by the application when code
208is modified.
209
Paolo Bonzini36e49702016-10-06 16:25:12 +0200210User-mode emulation marks a host page as write-protected (if it is
211not already read-only) every time translated code is generated for a
212basic block. Then, if a write access is done to the page, Linux raises
213a SEGV signal. QEMU then invalidates all the translated code in the page
214and enables write accesses to the page. For system emulation, write
215protection is achieved through the software MMU.
bellard1f673132004-04-04 15:21:17 +0000216
217Correct translated code invalidation is done efficiently by maintaining
218a linked list of every translated block contained in a given page. Other
ths5fafdf22007-09-16 21:08:06 +0000219linked lists are also maintained to undo direct block chaining.
bellard1f673132004-04-04 15:21:17 +0000220
blueswir1998a0502008-10-09 18:52:04 +0000221On RISC targets, correctly written software uses memory barriers and
222cache flushes, so some of the protection above would not be
223necessary. However, QEMU still requires that the generated code always
224matches the target instructions in memory in order to handle
225exceptions correctly.
bellard1f673132004-04-04 15:21:17 +0000226
Paolo Bonzini36e49702016-10-06 16:25:12 +0200227@item Exception support:
bellard1f673132004-04-04 15:21:17 +0000228longjmp() is used when an exception such as division by zero is
ths5fafdf22007-09-16 21:08:06 +0000229encountered.
bellard1f673132004-04-04 15:21:17 +0000230
231The host SIGSEGV and SIGBUS signal handlers are used to get invalid
Paolo Bonzini36e49702016-10-06 16:25:12 +0200232memory accesses. QEMU keeps a map from host program counter to
233target program counter, and looks up where the exception happened
234based on the host program counter at the exception point.
bellard1f673132004-04-04 15:21:17 +0000235
Paolo Bonzini36e49702016-10-06 16:25:12 +0200236On some targets, some bits of the virtual CPU's state are not flushed to the
237memory until the end of the translation block. This is done for internal
238emulation state that is rarely accessed directly by the program and/or changes
239very often throughout the execution of a translation block---this includes
240condition codes on x86, delay slots on SPARC, conditional execution on
241ARM, and so on. This state is stored for each target instruction, and
242looked up on exceptions.
bellard1f673132004-04-04 15:21:17 +0000243
Paolo Bonzini36e49702016-10-06 16:25:12 +0200244@item MMU emulation:
245For system emulation QEMU uses a software MMU. In that mode, the MMU
blueswir1998a0502008-10-09 18:52:04 +0000246virtual to physical address translation is done at every memory
Paolo Bonzini36e49702016-10-06 16:25:12 +0200247access.
bellard1f673132004-04-04 15:21:17 +0000248
Paolo Bonzini36e49702016-10-06 16:25:12 +0200249QEMU uses an address translation cache (TLB) to speed up the translation.
bellard1f673132004-04-04 15:21:17 +0000250In order to avoid flushing the translated code each time the MMU
Paolo Bonzini36e49702016-10-06 16:25:12 +0200251mappings change, all caches in QEMU are physically indexed. This
ths5fafdf22007-09-16 21:08:06 +0000252means that each basic block is indexed with its physical address.
bellard1f673132004-04-04 15:21:17 +0000253
Paolo Bonzini36e49702016-10-06 16:25:12 +0200254In order to avoid invalidating the basic block chain when MMU mappings
255change, chaining is only performed when the destination of the jump
256shares a page with the basic block that is performing the jump.
bellard1f673132004-04-04 15:21:17 +0000257
Paolo Bonzini36e49702016-10-06 16:25:12 +0200258The MMU can also distinguish RAM and ROM memory areas from MMIO memory
259areas. Access is faster for RAM and ROM because the translation cache also
260hosts the offset between guest address and host memory. Accessing MMIO
261memory areas instead calls out to C code for device emulation.
262Finally, the MMU helps tracking dirty pages and pages pointed to by
263translation blocks.
264@end table
blueswir1998a0502008-10-09 18:52:04 +0000265
Paolo Bonzini77d47e12016-10-06 16:49:03 +0200266@node QEMU compared to other emulators
Paolo Bonzini78e87792016-10-06 16:12:11 +0200267@section QEMU compared to other emulators
Paolo Bonzini77d47e12016-10-06 16:49:03 +0200268
269Like bochs [1], QEMU emulates an x86 CPU. But QEMU is much faster than
270bochs as it uses dynamic compilation. Bochs is closely tied to x86 PC
271emulation while QEMU can emulate several processors.
272
273Like Valgrind [2], QEMU does user space emulation and dynamic
274translation. Valgrind is mainly a memory debugger while QEMU has no
275support for it (QEMU could be used to detect out of bound memory
276accesses as Valgrind, but it has no support to track uninitialised data
277as Valgrind does). The Valgrind dynamic translator generates better code
278than QEMU (in particular it does register allocation) but it is closely
279tied to an x86 host and target and has no support for precise exceptions
280and system emulation.
281
282EM86 [3] is the closest project to user space QEMU (and QEMU still uses
283some of its code, in particular the ELF file loader). EM86 was limited
284to an alpha host and used a proprietary and slow interpreter (the
285interpreter part of the FX!32 Digital Win32 code translator [4]).
286
287TWIN from Willows Software was a Windows API emulator like Wine. It is less
288accurate than Wine but includes a protected mode x86 interpreter to launch
289x86 Windows executables. Such an approach has greater potential because most
290of the Windows API is executed natively but it is far more difficult to
291develop because all the data structures and function parameters exchanged
292between the API and the x86 code must be converted.
293
294User mode Linux [5] was the only solution before QEMU to launch a
295Linux kernel as a process while not needing any host kernel
296patches. However, user mode Linux requires heavy kernel patches while
297QEMU accepts unpatched Linux kernels. The price to pay is that QEMU is
298slower.
299
300The Plex86 [6] PC virtualizer is done in the same spirit as the now
301obsolete qemu-fast system emulator. It requires a patched Linux kernel
302to work (you cannot launch the same kernel on your PC), but the
303patches are really small. As it is a PC virtualizer (no emulation is
304done except for some privileged instructions), it has the potential of
305being faster than QEMU. The downside is that a complicated (and
306potentially unsafe) host kernel patch is needed.
307
308The commercial PC Virtualizers (VMWare [7], VirtualPC [8]) are faster
309than QEMU (without virtualization), but they all need specific, proprietary
310and potentially unsafe host drivers. Moreover, they are unable to
311provide cycle exact simulation as an emulator can.
312
313VirtualBox [9], Xen [10] and KVM [11] are based on QEMU. QEMU-SystemC
314[12] uses QEMU to simulate a system where some hardware devices are
315developed in SystemC.
316
bellarddebc7062006-04-30 21:58:41 +0000317@node Bibliography
Paolo Bonzini78e87792016-10-06 16:12:11 +0200318@section Bibliography
bellard1f673132004-04-04 15:21:17 +0000319
320@table @asis
321
ths5fafdf22007-09-16 21:08:06 +0000322@item [1]
bellard1f673132004-04-04 15:21:17 +0000323@url{http://bochs.sourceforge.net/}, the Bochs IA-32 Emulator Project,
324by Kevin Lawton et al.
325
Thomas Huth8e9620a2015-09-25 11:38:36 +0200326@item [2]
327@url{http://www.valgrind.org/}, Valgrind, an open-source memory debugger
328for GNU/Linux.
bellard1f673132004-04-04 15:21:17 +0000329
Thomas Huth8e9620a2015-09-25 11:38:36 +0200330@item [3]
331@url{http://ftp.dreamtime.org/pub/linux/Linux-Alpha/em86/v0.2/docs/em86.html},
332the EM86 x86 emulator on Alpha-Linux.
333
334@item [4]
bellarddebc7062006-04-30 21:58:41 +0000335@url{http://www.usenix.org/publications/library/proceedings/usenix-nt97/@/full_papers/chernoff/chernoff.pdf},
bellard1f673132004-04-04 15:21:17 +0000336DIGITAL FX!32: Running 32-Bit x86 Applications on Alpha NT, by Anton
337Chernoff and Ray Hookway.
338
Thomas Huth8e9620a2015-09-25 11:38:36 +0200339@item [5]
ths5fafdf22007-09-16 21:08:06 +0000340@url{http://user-mode-linux.sourceforge.net/},
bellard1f673132004-04-04 15:21:17 +0000341The User-mode Linux Kernel.
342
Thomas Huth8e9620a2015-09-25 11:38:36 +0200343@item [6]
ths5fafdf22007-09-16 21:08:06 +0000344@url{http://www.plex86.org/},
bellard1f673132004-04-04 15:21:17 +0000345The new Plex86 project.
346
Thomas Huth8e9620a2015-09-25 11:38:36 +0200347@item [7]
ths5fafdf22007-09-16 21:08:06 +0000348@url{http://www.vmware.com/},
bellard1f673132004-04-04 15:21:17 +0000349The VMWare PC virtualizer.
350
Thomas Huth8e9620a2015-09-25 11:38:36 +0200351@item [8]
352@url{https://www.microsoft.com/download/details.aspx?id=3702},
bellard1f673132004-04-04 15:21:17 +0000353The VirtualPC PC virtualizer.
354
Thomas Huth8e9620a2015-09-25 11:38:36 +0200355@item [9]
blueswir1998a0502008-10-09 18:52:04 +0000356@url{http://virtualbox.org/},
357The VirtualBox PC virtualizer.
358
Thomas Huth8e9620a2015-09-25 11:38:36 +0200359@item [10]
blueswir1998a0502008-10-09 18:52:04 +0000360@url{http://www.xen.org/},
361The Xen hypervisor.
362
Thomas Huth8e9620a2015-09-25 11:38:36 +0200363@item [11]
364@url{http://www.linux-kvm.org/},
blueswir1998a0502008-10-09 18:52:04 +0000365Kernel Based Virtual Machine (KVM).
366
Thomas Huth8e9620a2015-09-25 11:38:36 +0200367@item [12]
blueswir1998a0502008-10-09 18:52:04 +0000368@url{http://www.greensocs.com/projects/QEMUSystemC},
369QEMU-SystemC, a hardware co-simulator.
370
bellard1f673132004-04-04 15:21:17 +0000371@end table