commit ff8263a951c5ce22bef919c792d20e5cbf5066b3
author bellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162> Fri May 13 22:45:23 2005 +0000
committer bellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162> Fri May 13 22:45:23 2005 +0000
tree 1a1eef28450d113a8d054660fd5bbdeda62e00a3
parent 04d81be884925127e2ebee994e4a89ce44eab06e

ARM saturating arithmetic fixes (Paul Brook)


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1431 c046a42c-6fe2-441c-8c8c-71466251a162

target-arm/translate.c

diff --git a/target-arm/translate.c b/target-arm/translate.c
index 2965741..2a62c56 100644
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -1019,20 +1019,15 @@
         case 0x5: /* saturating add/subtract */
             rd = (insn >> 12) & 0xf;
             rn = (insn >> 16) & 0xf;
-            gen_movl_T0_reg(s, rn);
-            if (op1 & 2) {
-                gen_movl_T1_reg(s, rn);
-                if (op1 & 1) 
-                    gen_op_subl_T0_T1_saturate();
-                else
-                    gen_op_addl_T0_T1_saturate();
-            }
-            gen_movl_T1_reg(s, rm);
+            gen_movl_T0_reg(s, rm);
+            gen_movl_T1_reg(s, rn);
+            if (op1 & 2)
+                gen_op_double_T1_saturate();
             if (op1 & 1)
                 gen_op_subl_T0_T1_saturate();
             else
                 gen_op_addl_T0_T1_saturate();
-            gen_movl_reg_T0(s, rn);
+            gen_movl_reg_T0(s, rd);
             break;
         case 0x8: /* signed multiply */
         case 0xa: