target-mips: remove identical code in different branch
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
diff --git a/target-mips/translate.c b/target-mips/translate.c
index a2dbad5..7d9f2da 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -11852,11 +11852,7 @@
* when in debug mode...
*/
check_insn(ctx, ISA_MIPS32);
- if (!(ctx->hflags & MIPS_HFLAG_DM)) {
- generate_exception(ctx, EXCP_DBp);
- } else {
- generate_exception(ctx, EXCP_DBp);
- }
+ generate_exception(ctx, EXCP_DBp);
break;
case RR_SLT:
gen_slt(ctx, OPC_SLT, 24, rx, ry);
@@ -12707,11 +12703,7 @@
* when in debug mode...
*/
check_insn(ctx, ISA_MIPS32);
- if (!(ctx->hflags & MIPS_HFLAG_DM)) {
- generate_exception(ctx, EXCP_DBp);
- } else {
- generate_exception(ctx, EXCP_DBp);
- }
+ generate_exception(ctx, EXCP_DBp);
break;
case JRADDIUSP + 0:
case JRADDIUSP + 1:
@@ -13076,11 +13068,7 @@
break;
case SDBBP:
check_insn(ctx, ISA_MIPS32);
- if (!(ctx->hflags & MIPS_HFLAG_DM)) {
- generate_exception(ctx, EXCP_DBp);
- } else {
- generate_exception(ctx, EXCP_DBp);
- }
+ generate_exception(ctx, EXCP_DBp);
break;
default:
goto pool32axf_invalid;
@@ -16849,12 +16837,7 @@
* when in debug mode...
*/
check_insn(ctx, ISA_MIPS32);
- if (!(ctx->hflags & MIPS_HFLAG_DM)) {
- generate_exception(ctx, EXCP_DBp);
- } else {
- generate_exception(ctx, EXCP_DBp);
- }
- /* Treat as NOP. */
+ generate_exception(ctx, EXCP_DBp);
break;
#if defined(TARGET_MIPS64)
case OPC_DCLO: